regression: updated stats
This commit is contained in:
Derek Hower
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fbf7391bb0
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4 changed files with 501 additions and 491 deletions
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@ -1,76 +1,76 @@
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["-r", "tests/configs/../../src/mem/ruby/config/MI_example-homogeneous.rb", "-p", "8", "-m", "1", "-s", "1024"]
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print config: 1
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system.cpu1: completed 10000 read accesses @3663630
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system.cpu2: completed 10000 read accesses @3663638
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system.cpu5: completed 10000 read accesses @3680002
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system.cpu7: completed 10000 read accesses @3691164
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system.cpu3: completed 10000 read accesses @3698130
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system.cpu4: completed 10000 read accesses @3701748
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system.cpu6: completed 10000 read accesses @3704092
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system.cpu0: completed 10000 read accesses @3742302
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system.cpu2: completed 20000 read accesses @6788966
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system.cpu7: completed 20000 read accesses @6816416
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system.cpu5: completed 20000 read accesses @6822351
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system.cpu4: completed 20000 read accesses @6824056
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system.cpu1: completed 20000 read accesses @6825604
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system.cpu3: completed 20000 read accesses @6829578
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system.cpu6: completed 20000 read accesses @6857232
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system.cpu0: completed 20000 read accesses @6872452
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system.cpu5: completed 30000 read accesses @9928492
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system.cpu2: completed 30000 read accesses @9933192
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system.cpu7: completed 30000 read accesses @9950074
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system.cpu4: completed 30000 read accesses @9965775
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system.cpu6: completed 30000 read accesses @9978835
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system.cpu0: completed 30000 read accesses @9993926
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system.cpu1: completed 30000 read accesses @9994767
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system.cpu3: completed 30000 read accesses @9996366
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system.cpu5: completed 40000 read accesses @13012070
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system.cpu2: completed 40000 read accesses @13044972
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system.cpu7: completed 40000 read accesses @13077010
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system.cpu4: completed 40000 read accesses @13081178
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system.cpu1: completed 40000 read accesses @13100740
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system.cpu0: completed 40000 read accesses @13111135
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system.cpu6: completed 40000 read accesses @13147706
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system.cpu3: completed 40000 read accesses @13153176
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system.cpu5: completed 50000 read accesses @16120762
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system.cpu2: completed 50000 read accesses @16176586
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system.cpu7: completed 50000 read accesses @16213417
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system.cpu4: completed 50000 read accesses @16219872
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system.cpu6: completed 50000 read accesses @16231538
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system.cpu1: completed 50000 read accesses @16246976
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system.cpu3: completed 50000 read accesses @16276612
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system.cpu0: completed 50000 read accesses @16293234
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system.cpu5: completed 60000 read accesses @19263804
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system.cpu4: completed 60000 read accesses @19313220
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system.cpu2: completed 60000 read accesses @19330470
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system.cpu7: completed 60000 read accesses @19340197
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system.cpu6: completed 60000 read accesses @19399766
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system.cpu0: completed 60000 read accesses @19424570
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system.cpu1: completed 60000 read accesses @19425712
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system.cpu3: completed 60000 read accesses @19444952
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system.cpu5: completed 70000 read accesses @22408750
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system.cpu4: completed 70000 read accesses @22449746
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system.cpu7: completed 70000 read accesses @22451736
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system.cpu2: completed 70000 read accesses @22461052
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system.cpu0: completed 70000 read accesses @22554296
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system.cpu1: completed 70000 read accesses @22555310
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system.cpu3: completed 70000 read accesses @22588935
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system.cpu6: completed 70000 read accesses @22602456
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system.cpu5: completed 80000 read accesses @25540598
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system.cpu4: completed 80000 read accesses @25577430
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system.cpu7: completed 80000 read accesses @25617532
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system.cpu1: completed 80000 read accesses @25644879
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system.cpu2: completed 80000 read accesses @25660256
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system.cpu0: completed 80000 read accesses @25710799
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system.cpu3: completed 80000 read accesses @25716714
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system.cpu6: completed 80000 read accesses @25776606
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system.cpu5: completed 90000 read accesses @28693458
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system.cpu4: completed 90000 read accesses @28705416
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system.cpu7: completed 90000 read accesses @28729734
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system.cpu1: completed 90000 read accesses @28778532
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system.cpu2: completed 90000 read accesses @28801770
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system.cpu0: completed 90000 read accesses @28857559
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system.cpu6: completed 90000 read accesses @28885159
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system.cpu3: completed 90000 read accesses @28894168
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system.cpu7: completed 100000 read accesses @31814464
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system.cpu4: completed 10000 read accesses @3654068
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system.cpu1: completed 10000 read accesses @3658672
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system.cpu6: completed 10000 read accesses @3667702
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system.cpu0: completed 10000 read accesses @3693712
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system.cpu2: completed 10000 read accesses @3695692
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system.cpu7: completed 10000 read accesses @3702934
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system.cpu3: completed 10000 read accesses @3713843
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system.cpu5: completed 10000 read accesses @3747976
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system.cpu4: completed 20000 read accesses @6783252
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system.cpu6: completed 20000 read accesses @6788574
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system.cpu1: completed 20000 read accesses @6811444
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system.cpu2: completed 20000 read accesses @6811575
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system.cpu7: completed 20000 read accesses @6823208
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system.cpu3: completed 20000 read accesses @6833412
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system.cpu0: completed 20000 read accesses @6842332
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system.cpu5: completed 20000 read accesses @6892128
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system.cpu4: completed 30000 read accesses @9900552
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system.cpu6: completed 30000 read accesses @9919466
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system.cpu7: completed 30000 read accesses @9934195
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system.cpu3: completed 30000 read accesses @9940524
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system.cpu2: completed 30000 read accesses @9940526
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system.cpu0: completed 30000 read accesses @9949032
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system.cpu1: completed 30000 read accesses @10008962
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system.cpu5: completed 30000 read accesses @10013847
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system.cpu0: completed 40000 read accesses @12997824
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system.cpu3: completed 40000 read accesses @13026659
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system.cpu4: completed 40000 read accesses @13029141
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system.cpu6: completed 40000 read accesses @13053052
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system.cpu7: completed 40000 read accesses @13057445
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system.cpu2: completed 40000 read accesses @13075320
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system.cpu5: completed 40000 read accesses @13152513
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system.cpu1: completed 40000 read accesses @13163064
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system.cpu3: completed 50000 read accesses @16170822
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system.cpu0: completed 50000 read accesses @16183660
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system.cpu4: completed 50000 read accesses @16197183
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system.cpu6: completed 50000 read accesses @16212971
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system.cpu7: completed 50000 read accesses @16214970
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system.cpu5: completed 50000 read accesses @16230286
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system.cpu2: completed 50000 read accesses @16247930
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system.cpu1: completed 50000 read accesses @16329114
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system.cpu3: completed 60000 read accesses @19272882
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system.cpu7: completed 60000 read accesses @19345830
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system.cpu4: completed 60000 read accesses @19346068
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system.cpu6: completed 60000 read accesses @19382538
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system.cpu0: completed 60000 read accesses @19393516
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system.cpu2: completed 60000 read accesses @19397285
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system.cpu5: completed 60000 read accesses @19426724
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system.cpu1: completed 60000 read accesses @19469424
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system.cpu3: completed 70000 read accesses @22377862
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system.cpu4: completed 70000 read accesses @22461180
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system.cpu2: completed 70000 read accesses @22521889
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system.cpu6: completed 70000 read accesses @22522406
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system.cpu5: completed 70000 read accesses @22529566
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system.cpu7: completed 70000 read accesses @22543033
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system.cpu0: completed 70000 read accesses @22547582
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system.cpu1: completed 70000 read accesses @22584856
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system.cpu3: completed 80000 read accesses @25551111
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system.cpu4: completed 80000 read accesses @25606550
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system.cpu6: completed 80000 read accesses @25616752
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system.cpu2: completed 80000 read accesses @25647434
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system.cpu5: completed 80000 read accesses @25665443
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system.cpu0: completed 80000 read accesses @25669616
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system.cpu1: completed 80000 read accesses @25693304
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system.cpu7: completed 80000 read accesses @25704210
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system.cpu3: completed 90000 read accesses @28724260
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system.cpu6: completed 90000 read accesses @28724466
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system.cpu5: completed 90000 read accesses @28743404
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system.cpu4: completed 90000 read accesses @28745769
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system.cpu2: completed 90000 read accesses @28803478
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system.cpu0: completed 90000 read accesses @28806136
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system.cpu1: completed 90000 read accesses @28823872
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system.cpu7: completed 90000 read accesses @28858910
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system.cpu3: completed 100000 read accesses @31871402
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hack: be nice to actually delete the event here
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@ -5,11 +5,11 @@ The Regents of The University of Michigan
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All Rights Reserved
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M5 compiled Jul 29 2009 15:19:07
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M5 revision a6e8795b73de+ 6384+ default tip
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M5 started Jul 29 2009 15:19:16
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M5 compiled Aug 5 2009 13:36:56
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M5 revision 26abdfe2d980+ 6439+ default tip
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M5 started Aug 5 2009 13:37:49
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M5 executing on clover-02.cs.wisc.edu
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command line: build/ALPHA_SE/m5.fast -d build/ALPHA_SE/tests/fast/quick/50.memtest/alpha/linux/memtest-ruby -re tests/run.py build/ALPHA_SE/tests/fast/quick/50.memtest/alpha/linux/memtest-ruby
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Global frequency set at 1000000000000 ticks per second
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info: Entering event queue @ 0. Starting simulation...
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Exiting @ tick 31814464 because maximum number of loads reached
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Exiting @ tick 31871402 because maximum number of loads reached
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@ -1,34 +1,34 @@
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---------- Begin Simulation Statistics ----------
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host_mem_usage 1538672 # Number of bytes of host memory used
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host_seconds 1279.29 # Real time elapsed on the host
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host_tick_rate 24869 # Simulator tick rate (ticks/s)
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host_mem_usage 1538648 # Number of bytes of host memory used
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host_seconds 1657.04 # Real time elapsed on the host
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host_tick_rate 19234 # Simulator tick rate (ticks/s)
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sim_freq 1000000000000 # Frequency of simulated ticks
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sim_seconds 0.000032 # Number of seconds simulated
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sim_ticks 31814464 # Number of ticks simulated
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sim_ticks 31871402 # Number of ticks simulated
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system.cpu0.num_copies 0 # number of copy accesses completed
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system.cpu0.num_reads 99342 # number of read accesses completed
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system.cpu0.num_writes 53699 # number of write accesses completed
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system.cpu0.num_reads 99819 # number of read accesses completed
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system.cpu0.num_writes 53816 # number of write accesses completed
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system.cpu1.num_copies 0 # number of copy accesses completed
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system.cpu1.num_reads 99812 # number of read accesses completed
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system.cpu1.num_writes 53757 # number of write accesses completed
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system.cpu1.num_reads 99606 # number of read accesses completed
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system.cpu1.num_writes 53868 # number of write accesses completed
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system.cpu2.num_copies 0 # number of copy accesses completed
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system.cpu2.num_reads 99597 # number of read accesses completed
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system.cpu2.num_writes 53671 # number of write accesses completed
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system.cpu2.num_reads 99741 # number of read accesses completed
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system.cpu2.num_writes 53973 # number of write accesses completed
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system.cpu3.num_copies 0 # number of copy accesses completed
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system.cpu3.num_reads 99365 # number of read accesses completed
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system.cpu3.num_writes 53444 # number of write accesses completed
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system.cpu3.num_reads 100000 # number of read accesses completed
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system.cpu3.num_writes 53819 # number of write accesses completed
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system.cpu4.num_copies 0 # number of copy accesses completed
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system.cpu4.num_reads 99713 # number of read accesses completed
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system.cpu4.num_writes 54044 # number of write accesses completed
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system.cpu4.num_reads 99858 # number of read accesses completed
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system.cpu4.num_writes 53805 # number of write accesses completed
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system.cpu5.num_copies 0 # number of copy accesses completed
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system.cpu5.num_reads 99943 # number of read accesses completed
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system.cpu5.num_writes 53789 # number of write accesses completed
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system.cpu5.num_reads 99895 # number of read accesses completed
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system.cpu5.num_writes 53573 # number of write accesses completed
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system.cpu6.num_copies 0 # number of copy accesses completed
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system.cpu6.num_reads 99307 # number of read accesses completed
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system.cpu6.num_writes 53603 # number of write accesses completed
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system.cpu6.num_reads 99989 # number of read accesses completed
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system.cpu6.num_writes 53856 # number of write accesses completed
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system.cpu7.num_copies 0 # number of copy accesses completed
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system.cpu7.num_reads 100000 # number of read accesses completed
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system.cpu7.num_writes 53881 # number of write accesses completed
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system.cpu7.num_reads 99668 # number of read accesses completed
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system.cpu7.num_writes 53858 # number of write accesses completed
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---------- End Simulation Statistics ----------
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