stats: update eio stats for recent changes
This commit is contained in:
parent
c4e91289ae
commit
8649757135
18 changed files with 1553 additions and 1058 deletions
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@ -68,9 +68,6 @@ max_loads_any_thread=0
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numThreads=1
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numThreads=1
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profile=0
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profile=0
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progress_interval=0
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progress_interval=0
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simpoint_interval=100000000
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simpoint_profile=false
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simpoint_profile_file=simpoint.bb.gz
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simpoint_start_insts=
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simpoint_start_insts=
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simulate_data_stalls=false
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simulate_data_stalls=false
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simulate_inst_stalls=false
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simulate_inst_stalls=false
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@ -111,11 +108,12 @@ type=EioProcess
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chkpt=
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chkpt=
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errout=cerr
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errout=cerr
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eventq_index=0
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eventq_index=0
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file=/scratch/nilay/GEM5/gem5/tests/test-progs/anagram/bin/alpha/eio/anagram-vshort.eio.gz
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file=/dist/m5/regression/test-progs/anagram/bin/alpha/eio/anagram-vshort.eio.gz
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input=None
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input=None
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max_stack_size=67108864
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max_stack_size=67108864
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output=cout
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output=cout
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system=system
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system=system
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useArchPT=false
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[system.cpu_clk_domain]
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[system.cpu_clk_domain]
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type=SrcClockDomain
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type=SrcClockDomain
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@ -134,10 +132,11 @@ sys_clk_domain=system.clk_domain
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transition_latency=100000000
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transition_latency=100000000
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[system.membus]
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[system.membus]
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type=CoherentBus
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type=CoherentXBar
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clk_domain=system.clk_domain
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clk_domain=system.clk_domain
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eventq_index=0
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eventq_index=0
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header_cycles=1
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header_cycles=1
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snoop_filter=Null
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system=system
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system=system
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use_default_range=false
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use_default_range=false
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width=8
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width=8
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@ -2,6 +2,8 @@
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"name": null,
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"name": null,
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"sim_quantum": 0,
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"sim_quantum": 0,
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"system": {
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"system": {
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"kernel": "",
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"kernel_addr_check": true,
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"membus": {
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"membus": {
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"slave": {
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"slave": {
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"peer": [
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"peer": [
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@ -12,7 +14,10 @@
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"role": "SLAVE"
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"role": "SLAVE"
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},
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},
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"name": "membus",
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"name": "membus",
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"snoop_filter": null,
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"clk_domain": "system.clk_domain",
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"header_cycles": 1,
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"header_cycles": 1,
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"system": "system",
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"width": 8,
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"width": 8,
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"eventq_index": 0,
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"eventq_index": 0,
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"master": {
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"master": {
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@ -21,17 +26,68 @@
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],
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],
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"role": "MASTER"
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"role": "MASTER"
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},
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},
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"cxx_class": "CoherentBus",
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"cxx_class": "CoherentXBar",
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"path": "system.membus",
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"path": "system.membus",
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"type": "CoherentBus",
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"type": "CoherentXBar",
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"use_default_range": false
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"use_default_range": false
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},
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},
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"kernel_addr_check": true,
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"symbolfile": "",
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"readfile": "",
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"cxx_class": "System",
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"load_offset": 0,
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"work_end_ckpt_count": 0,
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"memories": [
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"system.physmem"
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],
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"work_begin_ckpt_count": 0,
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"clk_domain": {
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"name": "clk_domain",
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"clock": [
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1000
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],
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"init_perf_level": 0,
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"voltage_domain": "system.voltage_domain",
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"eventq_index": 0,
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"cxx_class": "SrcClockDomain",
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"path": "system.clk_domain",
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"type": "SrcClockDomain",
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"domain_id": -1
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},
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"mem_ranges": [],
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"eventq_index": 0,
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"dvfs_handler": {
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"enable": false,
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"name": "dvfs_handler",
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"sys_clk_domain": "system.clk_domain",
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"transition_latency": 100000000,
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"eventq_index": 0,
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"cxx_class": "DVFSHandler",
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"domains": [],
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"path": "system.dvfs_handler",
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"type": "DVFSHandler"
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},
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"work_end_exit_count": 0,
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"type": "System",
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"voltage_domain": {
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"name": "voltage_domain",
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"eventq_index": 0,
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"voltage": [
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"1.0"
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],
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"cxx_class": "VoltageDomain",
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"path": "system.voltage_domain",
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"type": "VoltageDomain"
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},
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"cache_line_size": 64,
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"boot_osflags": "a",
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"physmem": {
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"physmem": {
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"latency": 3.0000000000000004e-08,
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"range": "0:134217727",
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"latency": 30000,
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"name": "physmem",
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"name": "physmem",
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"eventq_index": 0,
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"eventq_index": 0,
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"latency_var": 0.0,
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"clk_domain": "system.clk_domain",
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"latency_var": 0,
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"bandwidth": "73.000000",
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"conf_table_reported": true,
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"conf_table_reported": true,
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"cxx_class": "SimpleMemory",
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"cxx_class": "SimpleMemory",
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"path": "system.physmem",
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"path": "system.physmem",
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@ -43,45 +99,16 @@
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},
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},
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"in_addr_map": true
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"in_addr_map": true
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},
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},
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"cxx_class": "System",
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"load_offset": 0,
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"work_end_ckpt_count": 0,
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"work_begin_ckpt_count": 0,
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"clk_domain": {
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"name": "clk_domain",
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"init_perf_level": 0,
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"eventq_index": 0,
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"cxx_class": "SrcClockDomain",
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"path": "system.clk_domain",
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"type": "SrcClockDomain",
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"domain_id": -1
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},
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"eventq_index": 0,
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"dvfs_handler": {
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"enable": false,
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"name": "dvfs_handler",
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"transition_latency": 9.999999999999999e-05,
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"eventq_index": 0,
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"cxx_class": "DVFSHandler",
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"path": "system.dvfs_handler",
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"type": "DVFSHandler"
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},
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"work_end_exit_count": 0,
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"type": "System",
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"voltage_domain": {
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"eventq_index": 0,
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"path": "system.voltage_domain",
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"type": "VoltageDomain",
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"name": "voltage_domain",
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"cxx_class": "VoltageDomain"
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},
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"cache_line_size": 64,
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"work_cpus_ckpt_count": 0,
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"work_cpus_ckpt_count": 0,
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"work_begin_exit_count": 0,
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"work_begin_exit_count": 0,
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"path": "system",
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"path": "system",
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"cpu_clk_domain": {
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"cpu_clk_domain": {
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"name": "cpu_clk_domain",
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"name": "cpu_clk_domain",
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"clock": [
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500
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],
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"init_perf_level": 0,
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"init_perf_level": 0,
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"voltage_domain": "system.voltage_domain",
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"eventq_index": 0,
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"eventq_index": 0,
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"cxx_class": "SrcClockDomain",
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"cxx_class": "SrcClockDomain",
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"path": "system.cpu_clk_domain",
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"path": "system.cpu_clk_domain",
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@ -96,11 +123,8 @@
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"role": "MASTER"
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"role": "MASTER"
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},
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},
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"load_addr_mask": 1099511627775,
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"load_addr_mask": 1099511627775,
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"work_item_id": -1,
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"num_work_ids": 16,
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"cpu": [
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"cpu": [
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{
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{
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"simpoint_interval": 100000000,
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"do_statistics_insts": true,
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"do_statistics_insts": true,
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"numThreads": 1,
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"numThreads": 1,
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"itb": {
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"itb": {
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@ -111,20 +135,22 @@
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"type": "AlphaTLB",
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"type": "AlphaTLB",
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"size": 48
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"size": 48
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},
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},
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"simulate_data_stalls": false,
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"function_trace": false,
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"function_trace": false,
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"do_checkpoint_insts": true,
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"do_checkpoint_insts": true,
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"cxx_class": "AtomicSimpleCPU",
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"cxx_class": "AtomicSimpleCPU",
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"max_loads_all_threads": 0,
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"max_loads_all_threads": 0,
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"simpoint_profile": false,
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"system": "system",
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"simulate_data_stalls": false,
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"clk_domain": "system.cpu_clk_domain",
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"function_trace_start": 0,
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"function_trace_start": 0,
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"cpu_id": 0,
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"cpu_id": 0,
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"width": 1,
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"width": 1,
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"checker": null,
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"eventq_index": 0,
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"eventq_index": 0,
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"do_quiesce": true,
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"do_quiesce": true,
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"type": "AtomicSimpleCPU",
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"type": "AtomicSimpleCPU",
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"fastmem": false,
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"fastmem": false,
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"profile": 0.0,
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"profile": 0,
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"icache_port": {
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"icache_port": {
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"peer": "system.membus.slave[1]",
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"peer": "system.membus.slave[1]",
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"role": "MASTER"
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"role": "MASTER"
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@ -136,27 +162,30 @@
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"name": "interrupts",
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"name": "interrupts",
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"cxx_class": "AlphaISA::Interrupts"
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"cxx_class": "AlphaISA::Interrupts"
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},
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},
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"dcache_port": {
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"peer": "system.membus.slave[2]",
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"role": "MASTER"
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},
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"socket_id": 0,
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"socket_id": 0,
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"max_insts_all_threads": 0,
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"max_insts_all_threads": 0,
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"path": "system.cpu",
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"path": "system.cpu",
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"isa": [
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"max_loads_any_thread": 0,
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{
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"eventq_index": 0,
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"path": "system.cpu.isa",
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"type": "AlphaISA",
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"name": "isa",
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"cxx_class": "AlphaISA::ISA"
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}
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],
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"switched_out": false,
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"switched_out": false,
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"workload": [
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"workload": [
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{
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{
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"name": "workload",
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"name": "workload",
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"output": "cout",
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"chkpt": "",
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"errout": "cerr",
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"system": "system",
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"useArchPT": false,
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"eventq_index": 0,
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"eventq_index": 0,
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"file": "/dist/m5/regression/test-progs/anagram/bin/alpha/eio/anagram-vshort.eio.gz",
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"cxx_class": "EioProcess",
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"cxx_class": "EioProcess",
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"path": "system.cpu.workload",
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"path": "system.cpu.workload",
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"max_stack_size": 67108864,
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"max_stack_size": 67108864,
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"type": "EioProcess"
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"type": "EioProcess",
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"input": "None"
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}
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}
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],
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],
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"name": "cpu",
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"name": "cpu",
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@ -168,14 +197,21 @@
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"type": "AlphaTLB",
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"type": "AlphaTLB",
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"size": 64
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"size": 64
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},
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},
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"simpoint_start_insts": [],
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"max_insts_any_thread": 500000,
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"max_insts_any_thread": 500000,
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"simulate_inst_stalls": false,
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"simulate_inst_stalls": false,
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"progress_interval": 0.0,
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"progress_interval": 0,
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"dcache_port": {
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"branchPred": null,
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"peer": "system.membus.slave[2]",
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"isa": [
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"role": "MASTER"
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{
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},
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"name": "isa",
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"max_loads_any_thread": 0,
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"system": "system",
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"eventq_index": 0,
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"cxx_class": "AlphaISA::ISA",
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"path": "system.cpu.isa",
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"type": "AlphaISA"
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}
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],
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"tracer": {
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"tracer": {
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"eventq_index": 0,
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"eventq_index": 0,
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"path": "system.cpu.tracer",
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"path": "system.cpu.tracer",
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@ -185,11 +221,13 @@
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}
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}
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}
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}
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],
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],
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"num_work_ids": 16,
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"work_item_id": -1,
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"work_begin_cpu_id_exit": -1
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"work_begin_cpu_id_exit": -1
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},
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},
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"time_sync_period": 0.1,
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"time_sync_period": 100000000000,
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"eventq_index": 0,
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"eventq_index": 0,
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"time_sync_spin_threshold": 9.999999999999999e-05,
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"time_sync_spin_threshold": 100000000,
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"cxx_class": "Root",
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"cxx_class": "Root",
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"path": "root",
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"path": "root",
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"time_sync_enable": false,
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"time_sync_enable": false,
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@ -1,8 +1,8 @@
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gem5 Simulator System. http://gem5.org
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gem5 Simulator System. http://gem5.org
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gem5 is copyrighted software; use the --copyright option for details.
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gem5 is copyrighted software; use the --copyright option for details.
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gem5 compiled May 10 2014 16:25:16
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gem5 compiled Sep 21 2014 15:53:23
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gem5 started May 10 2014 16:56:07
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gem5 started Sep 21 2014 16:10:49
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gem5 executing on zizzer
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gem5 executing on zizzer
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command line: build/ALPHA/gem5.opt -d build/ALPHA/tests/opt/quick/se/20.eio-short/alpha/eio/simple-atomic -re /z/stever/hg/gem5/tests/run.py build/ALPHA/tests/opt/quick/se/20.eio-short/alpha/eio/simple-atomic
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command line: build/ALPHA/gem5.opt -d build/ALPHA/tests/opt/quick/se/20.eio-short/alpha/eio/simple-atomic -re /z/stever/hg/gem5/tests/run.py build/ALPHA/tests/opt/quick/se/20.eio-short/alpha/eio/simple-atomic
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Global frequency set at 1000000000000 ticks per second
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Global frequency set at 1000000000000 ticks per second
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@ -4,11 +4,11 @@ sim_seconds 0.000250 # Nu
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sim_ticks 250015500 # Number of ticks simulated
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sim_ticks 250015500 # Number of ticks simulated
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final_tick 250015500 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
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final_tick 250015500 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
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sim_freq 1000000000000 # Frequency of simulated ticks
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sim_freq 1000000000000 # Frequency of simulated ticks
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host_inst_rate 2753718 # Simulator instruction rate (inst/s)
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host_inst_rate 2577407 # Simulator instruction rate (inst/s)
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host_op_rate 2753463 # Simulator op (including micro ops) rate (op/s)
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host_op_rate 2577191 # Simulator op (including micro ops) rate (op/s)
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host_tick_rate 1376691607 # Simulator tick rate (ticks/s)
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host_tick_rate 1288569274 # Simulator tick rate (ticks/s)
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host_mem_usage 219892 # Number of bytes of host memory used
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host_mem_usage 218888 # Number of bytes of host memory used
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host_seconds 0.18 # Real time elapsed on the host
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host_seconds 0.19 # Real time elapsed on the host
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sim_insts 500001 # Number of instructions simulated
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sim_insts 500001 # Number of instructions simulated
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sim_ops 500001 # Number of ops (including micro ops) simulated
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sim_ops 500001 # Number of ops (including micro ops) simulated
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system.voltage_domain.voltage 1 # Voltage in Volts
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system.voltage_domain.voltage 1 # Voltage in Volts
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||||||
|
@ -35,9 +35,27 @@ system.physmem.bw_write::total 1670144451 # Wr
|
||||||
system.physmem.bw_total::cpu.inst 7999808012 # Total bandwidth to/from this memory (bytes/s)
|
system.physmem.bw_total::cpu.inst 7999808012 # Total bandwidth to/from this memory (bytes/s)
|
||||||
system.physmem.bw_total::cpu.data 5160328060 # Total bandwidth to/from this memory (bytes/s)
|
system.physmem.bw_total::cpu.data 5160328060 # Total bandwidth to/from this memory (bytes/s)
|
||||||
system.physmem.bw_total::total 13160136072 # Total bandwidth to/from this memory (bytes/s)
|
system.physmem.bw_total::total 13160136072 # Total bandwidth to/from this memory (bytes/s)
|
||||||
system.membus.throughput 13160136072 # Throughput (bytes/s)
|
system.membus.trans_dist::ReadReq 624454 # Transaction distribution
|
||||||
system.membus.data_through_bus 3290238 # Total data (bytes)
|
system.membus.trans_dist::ReadResp 624454 # Transaction distribution
|
||||||
system.membus.snoop_data_through_bus 0 # Total snoop data (bytes)
|
system.membus.trans_dist::WriteReq 56340 # Transaction distribution
|
||||||
|
system.membus.trans_dist::WriteResp 56340 # Transaction distribution
|
||||||
|
system.membus.pkt_count_system.cpu.icache_port::system.physmem.port 1000038 # Packet count per connected master and slave (bytes)
|
||||||
|
system.membus.pkt_count_system.cpu.dcache_port::system.physmem.port 361550 # Packet count per connected master and slave (bytes)
|
||||||
|
system.membus.pkt_count::total 1361588 # Packet count per connected master and slave (bytes)
|
||||||
|
system.membus.pkt_size_system.cpu.icache_port::system.physmem.port 2000076 # Cumulative packet size per connected master and slave (bytes)
|
||||||
|
system.membus.pkt_size_system.cpu.dcache_port::system.physmem.port 1290162 # Cumulative packet size per connected master and slave (bytes)
|
||||||
|
system.membus.pkt_size::total 3290238 # Cumulative packet size per connected master and slave (bytes)
|
||||||
|
system.membus.snoops 0 # Total snoops (count)
|
||||||
|
system.membus.snoop_fanout::samples 680794 # Request fanout histogram
|
||||||
|
system.membus.snoop_fanout::mean 0.734464 # Request fanout histogram
|
||||||
|
system.membus.snoop_fanout::stdev 0.441618 # Request fanout histogram
|
||||||
|
system.membus.snoop_fanout::underflows 0 0.00% 0.00% # Request fanout histogram
|
||||||
|
system.membus.snoop_fanout::0 180775 26.55% 26.55% # Request fanout histogram
|
||||||
|
system.membus.snoop_fanout::1 500019 73.45% 100.00% # Request fanout histogram
|
||||||
|
system.membus.snoop_fanout::overflows 0 0.00% 100.00% # Request fanout histogram
|
||||||
|
system.membus.snoop_fanout::min_value 0 # Request fanout histogram
|
||||||
|
system.membus.snoop_fanout::max_value 1 # Request fanout histogram
|
||||||
|
system.membus.snoop_fanout::total 680794 # Request fanout histogram
|
||||||
system.cpu_clk_domain.clock 500 # Clock period in ticks
|
system.cpu_clk_domain.clock 500 # Clock period in ticks
|
||||||
system.cpu.dtb.fetch_hits 0 # ITB hits
|
system.cpu.dtb.fetch_hits 0 # ITB hits
|
||||||
system.cpu.dtb.fetch_misses 0 # ITB misses
|
system.cpu.dtb.fetch_misses 0 # ITB misses
|
||||||
|
|
|
@ -201,10 +201,11 @@ sequential_access=false
|
||||||
size=2097152
|
size=2097152
|
||||||
|
|
||||||
[system.cpu.toL2Bus]
|
[system.cpu.toL2Bus]
|
||||||
type=CoherentBus
|
type=CoherentXBar
|
||||||
clk_domain=system.cpu_clk_domain
|
clk_domain=system.cpu_clk_domain
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
header_cycles=1
|
header_cycles=1
|
||||||
|
snoop_filter=Null
|
||||||
system=system
|
system=system
|
||||||
use_default_range=false
|
use_default_range=false
|
||||||
width=32
|
width=32
|
||||||
|
@ -220,11 +221,12 @@ type=EioProcess
|
||||||
chkpt=
|
chkpt=
|
||||||
errout=cerr
|
errout=cerr
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
file=/scratch/nilay/GEM5/gem5/tests/test-progs/anagram/bin/alpha/eio/anagram-vshort.eio.gz
|
file=/dist/m5/regression/test-progs/anagram/bin/alpha/eio/anagram-vshort.eio.gz
|
||||||
input=None
|
input=None
|
||||||
max_stack_size=67108864
|
max_stack_size=67108864
|
||||||
output=cout
|
output=cout
|
||||||
system=system
|
system=system
|
||||||
|
useArchPT=false
|
||||||
|
|
||||||
[system.cpu_clk_domain]
|
[system.cpu_clk_domain]
|
||||||
type=SrcClockDomain
|
type=SrcClockDomain
|
||||||
|
@ -243,10 +245,11 @@ sys_clk_domain=system.clk_domain
|
||||||
transition_latency=100000000
|
transition_latency=100000000
|
||||||
|
|
||||||
[system.membus]
|
[system.membus]
|
||||||
type=CoherentBus
|
type=CoherentXBar
|
||||||
clk_domain=system.clk_domain
|
clk_domain=system.clk_domain
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
header_cycles=1
|
header_cycles=1
|
||||||
|
snoop_filter=Null
|
||||||
system=system
|
system=system
|
||||||
use_default_range=false
|
use_default_range=false
|
||||||
width=8
|
width=8
|
||||||
|
|
|
@ -2,6 +2,8 @@
|
||||||
"name": null,
|
"name": null,
|
||||||
"sim_quantum": 0,
|
"sim_quantum": 0,
|
||||||
"system": {
|
"system": {
|
||||||
|
"kernel": "",
|
||||||
|
"kernel_addr_check": true,
|
||||||
"membus": {
|
"membus": {
|
||||||
"slave": {
|
"slave": {
|
||||||
"peer": [
|
"peer": [
|
||||||
|
@ -11,7 +13,10 @@
|
||||||
"role": "SLAVE"
|
"role": "SLAVE"
|
||||||
},
|
},
|
||||||
"name": "membus",
|
"name": "membus",
|
||||||
|
"snoop_filter": null,
|
||||||
|
"clk_domain": "system.clk_domain",
|
||||||
"header_cycles": 1,
|
"header_cycles": 1,
|
||||||
|
"system": "system",
|
||||||
"width": 8,
|
"width": 8,
|
||||||
"eventq_index": 0,
|
"eventq_index": 0,
|
||||||
"master": {
|
"master": {
|
||||||
|
@ -20,17 +25,68 @@
|
||||||
],
|
],
|
||||||
"role": "MASTER"
|
"role": "MASTER"
|
||||||
},
|
},
|
||||||
"cxx_class": "CoherentBus",
|
"cxx_class": "CoherentXBar",
|
||||||
"path": "system.membus",
|
"path": "system.membus",
|
||||||
"type": "CoherentBus",
|
"type": "CoherentXBar",
|
||||||
"use_default_range": false
|
"use_default_range": false
|
||||||
},
|
},
|
||||||
"kernel_addr_check": true,
|
"symbolfile": "",
|
||||||
|
"readfile": "",
|
||||||
|
"cxx_class": "System",
|
||||||
|
"load_offset": 0,
|
||||||
|
"work_end_ckpt_count": 0,
|
||||||
|
"memories": [
|
||||||
|
"system.physmem"
|
||||||
|
],
|
||||||
|
"work_begin_ckpt_count": 0,
|
||||||
|
"clk_domain": {
|
||||||
|
"name": "clk_domain",
|
||||||
|
"clock": [
|
||||||
|
1000
|
||||||
|
],
|
||||||
|
"init_perf_level": 0,
|
||||||
|
"voltage_domain": "system.voltage_domain",
|
||||||
|
"eventq_index": 0,
|
||||||
|
"cxx_class": "SrcClockDomain",
|
||||||
|
"path": "system.clk_domain",
|
||||||
|
"type": "SrcClockDomain",
|
||||||
|
"domain_id": -1
|
||||||
|
},
|
||||||
|
"mem_ranges": [],
|
||||||
|
"eventq_index": 0,
|
||||||
|
"dvfs_handler": {
|
||||||
|
"enable": false,
|
||||||
|
"name": "dvfs_handler",
|
||||||
|
"sys_clk_domain": "system.clk_domain",
|
||||||
|
"transition_latency": 100000000,
|
||||||
|
"eventq_index": 0,
|
||||||
|
"cxx_class": "DVFSHandler",
|
||||||
|
"domains": [],
|
||||||
|
"path": "system.dvfs_handler",
|
||||||
|
"type": "DVFSHandler"
|
||||||
|
},
|
||||||
|
"work_end_exit_count": 0,
|
||||||
|
"type": "System",
|
||||||
|
"voltage_domain": {
|
||||||
|
"name": "voltage_domain",
|
||||||
|
"eventq_index": 0,
|
||||||
|
"voltage": [
|
||||||
|
"1.0"
|
||||||
|
],
|
||||||
|
"cxx_class": "VoltageDomain",
|
||||||
|
"path": "system.voltage_domain",
|
||||||
|
"type": "VoltageDomain"
|
||||||
|
},
|
||||||
|
"cache_line_size": 64,
|
||||||
|
"boot_osflags": "a",
|
||||||
"physmem": {
|
"physmem": {
|
||||||
"latency": 3.0000000000000004e-08,
|
"range": "0:134217727",
|
||||||
|
"latency": 30000,
|
||||||
"name": "physmem",
|
"name": "physmem",
|
||||||
"eventq_index": 0,
|
"eventq_index": 0,
|
||||||
"latency_var": 0.0,
|
"clk_domain": "system.clk_domain",
|
||||||
|
"latency_var": 0,
|
||||||
|
"bandwidth": "73.000000",
|
||||||
"conf_table_reported": true,
|
"conf_table_reported": true,
|
||||||
"cxx_class": "SimpleMemory",
|
"cxx_class": "SimpleMemory",
|
||||||
"path": "system.physmem",
|
"path": "system.physmem",
|
||||||
|
@ -42,45 +98,16 @@
|
||||||
},
|
},
|
||||||
"in_addr_map": true
|
"in_addr_map": true
|
||||||
},
|
},
|
||||||
"cxx_class": "System",
|
|
||||||
"load_offset": 0,
|
|
||||||
"work_end_ckpt_count": 0,
|
|
||||||
"work_begin_ckpt_count": 0,
|
|
||||||
"clk_domain": {
|
|
||||||
"name": "clk_domain",
|
|
||||||
"init_perf_level": 0,
|
|
||||||
"eventq_index": 0,
|
|
||||||
"cxx_class": "SrcClockDomain",
|
|
||||||
"path": "system.clk_domain",
|
|
||||||
"type": "SrcClockDomain",
|
|
||||||
"domain_id": -1
|
|
||||||
},
|
|
||||||
"eventq_index": 0,
|
|
||||||
"dvfs_handler": {
|
|
||||||
"enable": false,
|
|
||||||
"name": "dvfs_handler",
|
|
||||||
"transition_latency": 9.999999999999999e-05,
|
|
||||||
"eventq_index": 0,
|
|
||||||
"cxx_class": "DVFSHandler",
|
|
||||||
"path": "system.dvfs_handler",
|
|
||||||
"type": "DVFSHandler"
|
|
||||||
},
|
|
||||||
"work_end_exit_count": 0,
|
|
||||||
"type": "System",
|
|
||||||
"voltage_domain": {
|
|
||||||
"eventq_index": 0,
|
|
||||||
"path": "system.voltage_domain",
|
|
||||||
"type": "VoltageDomain",
|
|
||||||
"name": "voltage_domain",
|
|
||||||
"cxx_class": "VoltageDomain"
|
|
||||||
},
|
|
||||||
"cache_line_size": 64,
|
|
||||||
"work_cpus_ckpt_count": 0,
|
"work_cpus_ckpt_count": 0,
|
||||||
"work_begin_exit_count": 0,
|
"work_begin_exit_count": 0,
|
||||||
"path": "system",
|
"path": "system",
|
||||||
"cpu_clk_domain": {
|
"cpu_clk_domain": {
|
||||||
"name": "cpu_clk_domain",
|
"name": "cpu_clk_domain",
|
||||||
|
"clock": [
|
||||||
|
500
|
||||||
|
],
|
||||||
"init_perf_level": 0,
|
"init_perf_level": 0,
|
||||||
|
"voltage_domain": "system.voltage_domain",
|
||||||
"eventq_index": 0,
|
"eventq_index": 0,
|
||||||
"cxx_class": "SrcClockDomain",
|
"cxx_class": "SrcClockDomain",
|
||||||
"path": "system.cpu_clk_domain",
|
"path": "system.cpu_clk_domain",
|
||||||
|
@ -95,8 +122,6 @@
|
||||||
"role": "MASTER"
|
"role": "MASTER"
|
||||||
},
|
},
|
||||||
"load_addr_mask": 1099511627775,
|
"load_addr_mask": 1099511627775,
|
||||||
"work_item_id": -1,
|
|
||||||
"num_work_ids": 16,
|
|
||||||
"cpu": [
|
"cpu": [
|
||||||
{
|
{
|
||||||
"do_statistics_insts": true,
|
"do_statistics_insts": true,
|
||||||
|
@ -109,51 +134,15 @@
|
||||||
"type": "AlphaTLB",
|
"type": "AlphaTLB",
|
||||||
"size": 48
|
"size": 48
|
||||||
},
|
},
|
||||||
"dcache": {
|
"system": "system",
|
||||||
"assoc": 2,
|
"function_trace": false,
|
||||||
"mem_side": {
|
|
||||||
"peer": "system.cpu.toL2Bus.slave[1]",
|
|
||||||
"role": "MASTER"
|
|
||||||
},
|
|
||||||
"cpu_side": {
|
|
||||||
"peer": "system.cpu.dcache_port",
|
|
||||||
"role": "SLAVE"
|
|
||||||
},
|
|
||||||
"name": "dcache",
|
|
||||||
"tags": {
|
|
||||||
"name": "tags",
|
|
||||||
"eventq_index": 0,
|
|
||||||
"hit_latency": 2,
|
|
||||||
"sequential_access": false,
|
|
||||||
"assoc": 2,
|
|
||||||
"cxx_class": "LRU",
|
|
||||||
"path": "system.cpu.dcache.tags",
|
|
||||||
"block_size": 64,
|
|
||||||
"type": "LRU",
|
|
||||||
"size": 262144
|
|
||||||
},
|
|
||||||
"hit_latency": 2,
|
|
||||||
"mshrs": 4,
|
|
||||||
"response_latency": 2,
|
|
||||||
"is_top_level": true,
|
|
||||||
"tgts_per_mshr": 20,
|
|
||||||
"sequential_access": false,
|
|
||||||
"max_miss_count": 0,
|
|
||||||
"eventq_index": 0,
|
|
||||||
"prefetch_on_access": false,
|
|
||||||
"cxx_class": "BaseCache",
|
|
||||||
"path": "system.cpu.dcache",
|
|
||||||
"write_buffers": 8,
|
|
||||||
"two_queue": false,
|
|
||||||
"type": "BaseCache",
|
|
||||||
"forward_snoops": true,
|
|
||||||
"size": 262144
|
|
||||||
},
|
|
||||||
"do_checkpoint_insts": true,
|
"do_checkpoint_insts": true,
|
||||||
"cxx_class": "TimingSimpleCPU",
|
"cxx_class": "TimingSimpleCPU",
|
||||||
"max_loads_all_threads": 0,
|
"max_loads_all_threads": 0,
|
||||||
|
"clk_domain": "system.cpu_clk_domain",
|
||||||
"function_trace_start": 0,
|
"function_trace_start": 0,
|
||||||
"cpu_id": 0,
|
"cpu_id": 0,
|
||||||
|
"checker": null,
|
||||||
"eventq_index": 0,
|
"eventq_index": 0,
|
||||||
"toL2Bus": {
|
"toL2Bus": {
|
||||||
"slave": {
|
"slave": {
|
||||||
|
@ -164,7 +153,10 @@
|
||||||
"role": "SLAVE"
|
"role": "SLAVE"
|
||||||
},
|
},
|
||||||
"name": "toL2Bus",
|
"name": "toL2Bus",
|
||||||
|
"snoop_filter": null,
|
||||||
|
"clk_domain": "system.cpu_clk_domain",
|
||||||
"header_cycles": 1,
|
"header_cycles": 1,
|
||||||
|
"system": "system",
|
||||||
"width": 32,
|
"width": 32,
|
||||||
"eventq_index": 0,
|
"eventq_index": 0,
|
||||||
"master": {
|
"master": {
|
||||||
|
@ -173,33 +165,31 @@
|
||||||
],
|
],
|
||||||
"role": "MASTER"
|
"role": "MASTER"
|
||||||
},
|
},
|
||||||
"cxx_class": "CoherentBus",
|
"cxx_class": "CoherentXBar",
|
||||||
"path": "system.cpu.toL2Bus",
|
"path": "system.cpu.toL2Bus",
|
||||||
"type": "CoherentBus",
|
"type": "CoherentXBar",
|
||||||
"use_default_range": false
|
"use_default_range": false
|
||||||
},
|
},
|
||||||
"do_quiesce": true,
|
"do_quiesce": true,
|
||||||
"type": "TimingSimpleCPU",
|
"type": "TimingSimpleCPU",
|
||||||
"profile": 0.0,
|
"profile": 0,
|
||||||
"icache_port": {
|
"icache_port": {
|
||||||
"peer": "system.cpu.icache.cpu_side",
|
"peer": "system.cpu.icache.cpu_side",
|
||||||
"role": "MASTER"
|
"role": "MASTER"
|
||||||
},
|
},
|
||||||
"icache": {
|
"icache": {
|
||||||
"assoc": 2,
|
"is_top_level": true,
|
||||||
"mem_side": {
|
"prefetcher": null,
|
||||||
"peer": "system.cpu.toL2Bus.slave[0]",
|
"clk_domain": "system.cpu_clk_domain",
|
||||||
"role": "MASTER"
|
"write_buffers": 8,
|
||||||
},
|
"response_latency": 2,
|
||||||
"cpu_side": {
|
"cxx_class": "BaseCache",
|
||||||
"peer": "system.cpu.icache_port",
|
"size": 131072,
|
||||||
"role": "SLAVE"
|
|
||||||
},
|
|
||||||
"name": "icache",
|
|
||||||
"tags": {
|
"tags": {
|
||||||
"name": "tags",
|
"name": "tags",
|
||||||
"eventq_index": 0,
|
"eventq_index": 0,
|
||||||
"hit_latency": 2,
|
"hit_latency": 2,
|
||||||
|
"clk_domain": "system.cpu_clk_domain",
|
||||||
"sequential_access": false,
|
"sequential_access": false,
|
||||||
"assoc": 2,
|
"assoc": 2,
|
||||||
"cxx_class": "LRU",
|
"cxx_class": "LRU",
|
||||||
|
@ -208,22 +198,31 @@
|
||||||
"type": "LRU",
|
"type": "LRU",
|
||||||
"size": 131072
|
"size": 131072
|
||||||
},
|
},
|
||||||
"hit_latency": 2,
|
"system": "system",
|
||||||
"mshrs": 4,
|
|
||||||
"response_latency": 2,
|
|
||||||
"is_top_level": true,
|
|
||||||
"tgts_per_mshr": 20,
|
|
||||||
"sequential_access": false,
|
|
||||||
"max_miss_count": 0,
|
"max_miss_count": 0,
|
||||||
"eventq_index": 0,
|
"eventq_index": 0,
|
||||||
"prefetch_on_access": false,
|
"mem_side": {
|
||||||
"cxx_class": "BaseCache",
|
"peer": "system.cpu.toL2Bus.slave[0]",
|
||||||
"path": "system.cpu.icache",
|
"role": "MASTER"
|
||||||
"write_buffers": 8,
|
},
|
||||||
"two_queue": false,
|
"mshrs": 4,
|
||||||
"type": "BaseCache",
|
|
||||||
"forward_snoops": true,
|
"forward_snoops": true,
|
||||||
"size": 131072
|
"hit_latency": 2,
|
||||||
|
"tgts_per_mshr": 20,
|
||||||
|
"addr_ranges": [
|
||||||
|
"0:18446744073709551615"
|
||||||
|
],
|
||||||
|
"assoc": 2,
|
||||||
|
"prefetch_on_access": false,
|
||||||
|
"path": "system.cpu.icache",
|
||||||
|
"name": "icache",
|
||||||
|
"type": "BaseCache",
|
||||||
|
"sequential_access": false,
|
||||||
|
"cpu_side": {
|
||||||
|
"peer": "system.cpu.icache_port",
|
||||||
|
"role": "SLAVE"
|
||||||
|
},
|
||||||
|
"two_queue": false
|
||||||
},
|
},
|
||||||
"interrupts": {
|
"interrupts": {
|
||||||
"eventq_index": 0,
|
"eventq_index": 0,
|
||||||
|
@ -232,23 +231,25 @@
|
||||||
"name": "interrupts",
|
"name": "interrupts",
|
||||||
"cxx_class": "AlphaISA::Interrupts"
|
"cxx_class": "AlphaISA::Interrupts"
|
||||||
},
|
},
|
||||||
|
"dcache_port": {
|
||||||
|
"peer": "system.cpu.dcache.cpu_side",
|
||||||
|
"role": "MASTER"
|
||||||
|
},
|
||||||
"socket_id": 0,
|
"socket_id": 0,
|
||||||
"max_insts_all_threads": 0,
|
"max_insts_all_threads": 0,
|
||||||
"l2cache": {
|
"l2cache": {
|
||||||
"assoc": 8,
|
"is_top_level": false,
|
||||||
"mem_side": {
|
"prefetcher": null,
|
||||||
"peer": "system.membus.slave[1]",
|
"clk_domain": "system.cpu_clk_domain",
|
||||||
"role": "MASTER"
|
"write_buffers": 8,
|
||||||
},
|
"response_latency": 20,
|
||||||
"cpu_side": {
|
"cxx_class": "BaseCache",
|
||||||
"peer": "system.cpu.toL2Bus.master[0]",
|
"size": 2097152,
|
||||||
"role": "SLAVE"
|
|
||||||
},
|
|
||||||
"name": "l2cache",
|
|
||||||
"tags": {
|
"tags": {
|
||||||
"name": "tags",
|
"name": "tags",
|
||||||
"eventq_index": 0,
|
"eventq_index": 0,
|
||||||
"hit_latency": 20,
|
"hit_latency": 20,
|
||||||
|
"clk_domain": "system.cpu_clk_domain",
|
||||||
"sequential_access": false,
|
"sequential_access": false,
|
||||||
"assoc": 8,
|
"assoc": 8,
|
||||||
"cxx_class": "LRU",
|
"cxx_class": "LRU",
|
||||||
|
@ -257,42 +258,50 @@
|
||||||
"type": "LRU",
|
"type": "LRU",
|
||||||
"size": 2097152
|
"size": 2097152
|
||||||
},
|
},
|
||||||
"hit_latency": 20,
|
"system": "system",
|
||||||
"mshrs": 20,
|
|
||||||
"response_latency": 20,
|
|
||||||
"is_top_level": false,
|
|
||||||
"tgts_per_mshr": 12,
|
|
||||||
"sequential_access": false,
|
|
||||||
"max_miss_count": 0,
|
"max_miss_count": 0,
|
||||||
"eventq_index": 0,
|
"eventq_index": 0,
|
||||||
"prefetch_on_access": false,
|
"mem_side": {
|
||||||
"cxx_class": "BaseCache",
|
"peer": "system.membus.slave[1]",
|
||||||
"path": "system.cpu.l2cache",
|
"role": "MASTER"
|
||||||
"write_buffers": 8,
|
},
|
||||||
"two_queue": false,
|
"mshrs": 20,
|
||||||
"type": "BaseCache",
|
|
||||||
"forward_snoops": true,
|
"forward_snoops": true,
|
||||||
"size": 2097152
|
"hit_latency": 20,
|
||||||
|
"tgts_per_mshr": 12,
|
||||||
|
"addr_ranges": [
|
||||||
|
"0:18446744073709551615"
|
||||||
|
],
|
||||||
|
"assoc": 8,
|
||||||
|
"prefetch_on_access": false,
|
||||||
|
"path": "system.cpu.l2cache",
|
||||||
|
"name": "l2cache",
|
||||||
|
"type": "BaseCache",
|
||||||
|
"sequential_access": false,
|
||||||
|
"cpu_side": {
|
||||||
|
"peer": "system.cpu.toL2Bus.master[0]",
|
||||||
|
"role": "SLAVE"
|
||||||
|
},
|
||||||
|
"two_queue": false
|
||||||
},
|
},
|
||||||
"path": "system.cpu",
|
"path": "system.cpu",
|
||||||
"isa": [
|
"max_loads_any_thread": 0,
|
||||||
{
|
|
||||||
"eventq_index": 0,
|
|
||||||
"path": "system.cpu.isa",
|
|
||||||
"type": "AlphaISA",
|
|
||||||
"name": "isa",
|
|
||||||
"cxx_class": "AlphaISA::ISA"
|
|
||||||
}
|
|
||||||
],
|
|
||||||
"switched_out": false,
|
"switched_out": false,
|
||||||
"workload": [
|
"workload": [
|
||||||
{
|
{
|
||||||
"name": "workload",
|
"name": "workload",
|
||||||
|
"output": "cout",
|
||||||
|
"chkpt": "",
|
||||||
|
"errout": "cerr",
|
||||||
|
"system": "system",
|
||||||
|
"useArchPT": false,
|
||||||
"eventq_index": 0,
|
"eventq_index": 0,
|
||||||
|
"file": "/dist/m5/regression/test-progs/anagram/bin/alpha/eio/anagram-vshort.eio.gz",
|
||||||
"cxx_class": "EioProcess",
|
"cxx_class": "EioProcess",
|
||||||
"path": "system.cpu.workload",
|
"path": "system.cpu.workload",
|
||||||
"max_stack_size": 67108864,
|
"max_stack_size": 67108864,
|
||||||
"type": "EioProcess"
|
"type": "EioProcess",
|
||||||
|
"input": "None"
|
||||||
}
|
}
|
||||||
],
|
],
|
||||||
"name": "cpu",
|
"name": "cpu",
|
||||||
|
@ -304,14 +313,67 @@
|
||||||
"type": "AlphaTLB",
|
"type": "AlphaTLB",
|
||||||
"size": 64
|
"size": 64
|
||||||
},
|
},
|
||||||
|
"simpoint_start_insts": [],
|
||||||
"max_insts_any_thread": 500000,
|
"max_insts_any_thread": 500000,
|
||||||
"progress_interval": 0.0,
|
"progress_interval": 0,
|
||||||
"dcache_port": {
|
"branchPred": null,
|
||||||
"peer": "system.cpu.dcache.cpu_side",
|
"dcache": {
|
||||||
|
"is_top_level": true,
|
||||||
|
"prefetcher": null,
|
||||||
|
"clk_domain": "system.cpu_clk_domain",
|
||||||
|
"write_buffers": 8,
|
||||||
|
"response_latency": 2,
|
||||||
|
"cxx_class": "BaseCache",
|
||||||
|
"size": 262144,
|
||||||
|
"tags": {
|
||||||
|
"name": "tags",
|
||||||
|
"eventq_index": 0,
|
||||||
|
"hit_latency": 2,
|
||||||
|
"clk_domain": "system.cpu_clk_domain",
|
||||||
|
"sequential_access": false,
|
||||||
|
"assoc": 2,
|
||||||
|
"cxx_class": "LRU",
|
||||||
|
"path": "system.cpu.dcache.tags",
|
||||||
|
"block_size": 64,
|
||||||
|
"type": "LRU",
|
||||||
|
"size": 262144
|
||||||
|
},
|
||||||
|
"system": "system",
|
||||||
|
"max_miss_count": 0,
|
||||||
|
"eventq_index": 0,
|
||||||
|
"mem_side": {
|
||||||
|
"peer": "system.cpu.toL2Bus.slave[1]",
|
||||||
"role": "MASTER"
|
"role": "MASTER"
|
||||||
},
|
},
|
||||||
"function_trace": false,
|
"mshrs": 4,
|
||||||
"max_loads_any_thread": 0,
|
"forward_snoops": true,
|
||||||
|
"hit_latency": 2,
|
||||||
|
"tgts_per_mshr": 20,
|
||||||
|
"addr_ranges": [
|
||||||
|
"0:18446744073709551615"
|
||||||
|
],
|
||||||
|
"assoc": 2,
|
||||||
|
"prefetch_on_access": false,
|
||||||
|
"path": "system.cpu.dcache",
|
||||||
|
"name": "dcache",
|
||||||
|
"type": "BaseCache",
|
||||||
|
"sequential_access": false,
|
||||||
|
"cpu_side": {
|
||||||
|
"peer": "system.cpu.dcache_port",
|
||||||
|
"role": "SLAVE"
|
||||||
|
},
|
||||||
|
"two_queue": false
|
||||||
|
},
|
||||||
|
"isa": [
|
||||||
|
{
|
||||||
|
"name": "isa",
|
||||||
|
"system": "system",
|
||||||
|
"eventq_index": 0,
|
||||||
|
"cxx_class": "AlphaISA::ISA",
|
||||||
|
"path": "system.cpu.isa",
|
||||||
|
"type": "AlphaISA"
|
||||||
|
}
|
||||||
|
],
|
||||||
"tracer": {
|
"tracer": {
|
||||||
"eventq_index": 0,
|
"eventq_index": 0,
|
||||||
"path": "system.cpu.tracer",
|
"path": "system.cpu.tracer",
|
||||||
|
@ -321,11 +383,13 @@
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
],
|
],
|
||||||
|
"num_work_ids": 16,
|
||||||
|
"work_item_id": -1,
|
||||||
"work_begin_cpu_id_exit": -1
|
"work_begin_cpu_id_exit": -1
|
||||||
},
|
},
|
||||||
"time_sync_period": 0.1,
|
"time_sync_period": 100000000000,
|
||||||
"eventq_index": 0,
|
"eventq_index": 0,
|
||||||
"time_sync_spin_threshold": 9.999999999999999e-05,
|
"time_sync_spin_threshold": 100000000,
|
||||||
"cxx_class": "Root",
|
"cxx_class": "Root",
|
||||||
"path": "root",
|
"path": "root",
|
||||||
"time_sync_enable": false,
|
"time_sync_enable": false,
|
||||||
|
|
|
@ -1,8 +1,8 @@
|
||||||
gem5 Simulator System. http://gem5.org
|
gem5 Simulator System. http://gem5.org
|
||||||
gem5 is copyrighted software; use the --copyright option for details.
|
gem5 is copyrighted software; use the --copyright option for details.
|
||||||
|
|
||||||
gem5 compiled May 10 2014 16:25:16
|
gem5 compiled Sep 21 2014 15:53:23
|
||||||
gem5 started May 10 2014 16:55:42
|
gem5 started Sep 21 2014 16:10:49
|
||||||
gem5 executing on zizzer
|
gem5 executing on zizzer
|
||||||
command line: build/ALPHA/gem5.opt -d build/ALPHA/tests/opt/quick/se/20.eio-short/alpha/eio/simple-timing -re /z/stever/hg/gem5/tests/run.py build/ALPHA/tests/opt/quick/se/20.eio-short/alpha/eio/simple-timing
|
command line: build/ALPHA/gem5.opt -d build/ALPHA/tests/opt/quick/se/20.eio-short/alpha/eio/simple-timing -re /z/stever/hg/gem5/tests/run.py build/ALPHA/tests/opt/quick/se/20.eio-short/alpha/eio/simple-timing
|
||||||
Global frequency set at 1000000000000 ticks per second
|
Global frequency set at 1000000000000 ticks per second
|
||||||
|
|
|
@ -4,11 +4,11 @@ sim_seconds 0.000727 # Nu
|
||||||
sim_ticks 727072000 # Number of ticks simulated
|
sim_ticks 727072000 # Number of ticks simulated
|
||||||
final_tick 727072000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
|
final_tick 727072000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
|
||||||
sim_freq 1000000000000 # Frequency of simulated ticks
|
sim_freq 1000000000000 # Frequency of simulated ticks
|
||||||
host_inst_rate 1291108 # Simulator instruction rate (inst/s)
|
host_inst_rate 1546280 # Simulator instruction rate (inst/s)
|
||||||
host_op_rate 1291046 # Simulator op (including micro ops) rate (op/s)
|
host_op_rate 1546201 # Simulator op (including micro ops) rate (op/s)
|
||||||
host_tick_rate 1877262486 # Simulator tick rate (ticks/s)
|
host_tick_rate 2248282899 # Simulator tick rate (ticks/s)
|
||||||
host_mem_usage 229624 # Number of bytes of host memory used
|
host_mem_usage 227720 # Number of bytes of host memory used
|
||||||
host_seconds 0.39 # Real time elapsed on the host
|
host_seconds 0.32 # Real time elapsed on the host
|
||||||
sim_insts 500001 # Number of instructions simulated
|
sim_insts 500001 # Number of instructions simulated
|
||||||
sim_ops 500001 # Number of ops (including micro ops) simulated
|
sim_ops 500001 # Number of ops (including micro ops) simulated
|
||||||
system.voltage_domain.voltage 1 # Voltage in Volts
|
system.voltage_domain.voltage 1 # Voltage in Volts
|
||||||
|
@ -29,17 +29,25 @@ system.physmem.bw_inst_read::total 35473791 # In
|
||||||
system.physmem.bw_total::cpu.inst 35473791 # Total bandwidth to/from this memory (bytes/s)
|
system.physmem.bw_total::cpu.inst 35473791 # Total bandwidth to/from this memory (bytes/s)
|
||||||
system.physmem.bw_total::cpu.data 39963030 # Total bandwidth to/from this memory (bytes/s)
|
system.physmem.bw_total::cpu.data 39963030 # Total bandwidth to/from this memory (bytes/s)
|
||||||
system.physmem.bw_total::total 75436821 # Total bandwidth to/from this memory (bytes/s)
|
system.physmem.bw_total::total 75436821 # Total bandwidth to/from this memory (bytes/s)
|
||||||
system.membus.throughput 75436821 # Throughput (bytes/s)
|
|
||||||
system.membus.trans_dist::ReadReq 718 # Transaction distribution
|
system.membus.trans_dist::ReadReq 718 # Transaction distribution
|
||||||
system.membus.trans_dist::ReadResp 718 # Transaction distribution
|
system.membus.trans_dist::ReadResp 718 # Transaction distribution
|
||||||
system.membus.trans_dist::ReadExReq 139 # Transaction distribution
|
system.membus.trans_dist::ReadExReq 139 # Transaction distribution
|
||||||
system.membus.trans_dist::ReadExResp 139 # Transaction distribution
|
system.membus.trans_dist::ReadExResp 139 # Transaction distribution
|
||||||
system.membus.pkt_count_system.cpu.l2cache.mem_side::system.physmem.port 1714 # Packet count per connected master and slave (bytes)
|
system.membus.pkt_count_system.cpu.l2cache.mem_side::system.physmem.port 1714 # Packet count per connected master and slave (bytes)
|
||||||
system.membus.pkt_count::total 1714 # Packet count per connected master and slave (bytes)
|
system.membus.pkt_count::total 1714 # Packet count per connected master and slave (bytes)
|
||||||
system.membus.tot_pkt_size_system.cpu.l2cache.mem_side::system.physmem.port 54848 # Cumulative packet size per connected master and slave (bytes)
|
system.membus.pkt_size_system.cpu.l2cache.mem_side::system.physmem.port 54848 # Cumulative packet size per connected master and slave (bytes)
|
||||||
system.membus.tot_pkt_size::total 54848 # Cumulative packet size per connected master and slave (bytes)
|
system.membus.pkt_size::total 54848 # Cumulative packet size per connected master and slave (bytes)
|
||||||
system.membus.data_through_bus 54848 # Total data (bytes)
|
system.membus.snoops 0 # Total snoops (count)
|
||||||
system.membus.snoop_data_through_bus 0 # Total snoop data (bytes)
|
system.membus.snoop_fanout::samples 857 # Request fanout histogram
|
||||||
|
system.membus.snoop_fanout::mean 0 # Request fanout histogram
|
||||||
|
system.membus.snoop_fanout::stdev 0 # Request fanout histogram
|
||||||
|
system.membus.snoop_fanout::underflows 0 0.00% 0.00% # Request fanout histogram
|
||||||
|
system.membus.snoop_fanout::0 857 100.00% 100.00% # Request fanout histogram
|
||||||
|
system.membus.snoop_fanout::1 0 0.00% 100.00% # Request fanout histogram
|
||||||
|
system.membus.snoop_fanout::overflows 0 0.00% 100.00% # Request fanout histogram
|
||||||
|
system.membus.snoop_fanout::min_value 0 # Request fanout histogram
|
||||||
|
system.membus.snoop_fanout::max_value 0 # Request fanout histogram
|
||||||
|
system.membus.snoop_fanout::total 857 # Request fanout histogram
|
||||||
system.membus.reqLayer0.occupancy 857000 # Layer occupancy (ticks)
|
system.membus.reqLayer0.occupancy 857000 # Layer occupancy (ticks)
|
||||||
system.membus.reqLayer0.utilization 0.1 # Layer utilization (%)
|
system.membus.reqLayer0.utilization 0.1 # Layer utilization (%)
|
||||||
system.membus.respLayer1.occupancy 7713000 # Layer occupancy (ticks)
|
system.membus.respLayer1.occupancy 7713000 # Layer occupancy (ticks)
|
||||||
|
@ -450,7 +458,6 @@ system.cpu.dcache.demand_avg_mshr_miss_latency::total 53000
|
||||||
system.cpu.dcache.overall_avg_mshr_miss_latency::cpu.data 53000 # average overall mshr miss latency
|
system.cpu.dcache.overall_avg_mshr_miss_latency::cpu.data 53000 # average overall mshr miss latency
|
||||||
system.cpu.dcache.overall_avg_mshr_miss_latency::total 53000 # average overall mshr miss latency
|
system.cpu.dcache.overall_avg_mshr_miss_latency::total 53000 # average overall mshr miss latency
|
||||||
system.cpu.dcache.no_allocate_misses 0 # Number of misses that were no-allocate
|
system.cpu.dcache.no_allocate_misses 0 # Number of misses that were no-allocate
|
||||||
system.cpu.toL2Bus.throughput 75436821 # Throughput (bytes/s)
|
|
||||||
system.cpu.toL2Bus.trans_dist::ReadReq 718 # Transaction distribution
|
system.cpu.toL2Bus.trans_dist::ReadReq 718 # Transaction distribution
|
||||||
system.cpu.toL2Bus.trans_dist::ReadResp 718 # Transaction distribution
|
system.cpu.toL2Bus.trans_dist::ReadResp 718 # Transaction distribution
|
||||||
system.cpu.toL2Bus.trans_dist::ReadExReq 139 # Transaction distribution
|
system.cpu.toL2Bus.trans_dist::ReadExReq 139 # Transaction distribution
|
||||||
|
@ -458,11 +465,21 @@ system.cpu.toL2Bus.trans_dist::ReadExResp 139 # T
|
||||||
system.cpu.toL2Bus.pkt_count_system.cpu.icache.mem_side::system.cpu.l2cache.cpu_side 806 # Packet count per connected master and slave (bytes)
|
system.cpu.toL2Bus.pkt_count_system.cpu.icache.mem_side::system.cpu.l2cache.cpu_side 806 # Packet count per connected master and slave (bytes)
|
||||||
system.cpu.toL2Bus.pkt_count_system.cpu.dcache.mem_side::system.cpu.l2cache.cpu_side 908 # Packet count per connected master and slave (bytes)
|
system.cpu.toL2Bus.pkt_count_system.cpu.dcache.mem_side::system.cpu.l2cache.cpu_side 908 # Packet count per connected master and slave (bytes)
|
||||||
system.cpu.toL2Bus.pkt_count::total 1714 # Packet count per connected master and slave (bytes)
|
system.cpu.toL2Bus.pkt_count::total 1714 # Packet count per connected master and slave (bytes)
|
||||||
system.cpu.toL2Bus.tot_pkt_size_system.cpu.icache.mem_side::system.cpu.l2cache.cpu_side 25792 # Cumulative packet size per connected master and slave (bytes)
|
system.cpu.toL2Bus.pkt_size_system.cpu.icache.mem_side::system.cpu.l2cache.cpu_side 25792 # Cumulative packet size per connected master and slave (bytes)
|
||||||
system.cpu.toL2Bus.tot_pkt_size_system.cpu.dcache.mem_side::system.cpu.l2cache.cpu_side 29056 # Cumulative packet size per connected master and slave (bytes)
|
system.cpu.toL2Bus.pkt_size_system.cpu.dcache.mem_side::system.cpu.l2cache.cpu_side 29056 # Cumulative packet size per connected master and slave (bytes)
|
||||||
system.cpu.toL2Bus.tot_pkt_size::total 54848 # Cumulative packet size per connected master and slave (bytes)
|
system.cpu.toL2Bus.pkt_size::total 54848 # Cumulative packet size per connected master and slave (bytes)
|
||||||
system.cpu.toL2Bus.data_through_bus 54848 # Total data (bytes)
|
system.cpu.toL2Bus.snoops 0 # Total snoops (count)
|
||||||
system.cpu.toL2Bus.snoop_data_through_bus 0 # Total snoop data (bytes)
|
system.cpu.toL2Bus.snoop_fanout::samples 857 # Request fanout histogram
|
||||||
|
system.cpu.toL2Bus.snoop_fanout::mean 1 # Request fanout histogram
|
||||||
|
system.cpu.toL2Bus.snoop_fanout::stdev 0 # Request fanout histogram
|
||||||
|
system.cpu.toL2Bus.snoop_fanout::underflows 0 0.00% 0.00% # Request fanout histogram
|
||||||
|
system.cpu.toL2Bus.snoop_fanout::0 0 0.00% 0.00% # Request fanout histogram
|
||||||
|
system.cpu.toL2Bus.snoop_fanout::1 857 100.00% 100.00% # Request fanout histogram
|
||||||
|
system.cpu.toL2Bus.snoop_fanout::2 0 0.00% 100.00% # Request fanout histogram
|
||||||
|
system.cpu.toL2Bus.snoop_fanout::overflows 0 0.00% 100.00% # Request fanout histogram
|
||||||
|
system.cpu.toL2Bus.snoop_fanout::min_value 1 # Request fanout histogram
|
||||||
|
system.cpu.toL2Bus.snoop_fanout::max_value 1 # Request fanout histogram
|
||||||
|
system.cpu.toL2Bus.snoop_fanout::total 857 # Request fanout histogram
|
||||||
system.cpu.toL2Bus.reqLayer0.occupancy 428500 # Layer occupancy (ticks)
|
system.cpu.toL2Bus.reqLayer0.occupancy 428500 # Layer occupancy (ticks)
|
||||||
system.cpu.toL2Bus.reqLayer0.utilization 0.1 # Layer utilization (%)
|
system.cpu.toL2Bus.reqLayer0.utilization 0.1 # Layer utilization (%)
|
||||||
system.cpu.toL2Bus.respLayer0.occupancy 604500 # Layer occupancy (ticks)
|
system.cpu.toL2Bus.respLayer0.occupancy 604500 # Layer occupancy (ticks)
|
||||||
|
|
|
@ -68,9 +68,6 @@ max_loads_any_thread=0
|
||||||
numThreads=1
|
numThreads=1
|
||||||
profile=0
|
profile=0
|
||||||
progress_interval=0
|
progress_interval=0
|
||||||
simpoint_interval=100000000
|
|
||||||
simpoint_profile=false
|
|
||||||
simpoint_profile_file=simpoint.bb.gz
|
|
||||||
simpoint_start_insts=
|
simpoint_start_insts=
|
||||||
simulate_data_stalls=false
|
simulate_data_stalls=false
|
||||||
simulate_inst_stalls=false
|
simulate_inst_stalls=false
|
||||||
|
@ -181,11 +178,12 @@ type=EioProcess
|
||||||
chkpt=
|
chkpt=
|
||||||
errout=cerr
|
errout=cerr
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
file=/scratch/nilay/GEM5/gem5/tests/test-progs/anagram/bin/alpha/eio/anagram-vshort.eio.gz
|
file=/dist/m5/regression/test-progs/anagram/bin/alpha/eio/anagram-vshort.eio.gz
|
||||||
input=None
|
input=None
|
||||||
max_stack_size=67108864
|
max_stack_size=67108864
|
||||||
output=cout
|
output=cout
|
||||||
system=system
|
system=system
|
||||||
|
useArchPT=false
|
||||||
|
|
||||||
[system.cpu1]
|
[system.cpu1]
|
||||||
type=AtomicSimpleCPU
|
type=AtomicSimpleCPU
|
||||||
|
@ -212,9 +210,6 @@ max_loads_any_thread=0
|
||||||
numThreads=1
|
numThreads=1
|
||||||
profile=0
|
profile=0
|
||||||
progress_interval=0
|
progress_interval=0
|
||||||
simpoint_interval=100000000
|
|
||||||
simpoint_profile=false
|
|
||||||
simpoint_profile_file=simpoint.bb.gz
|
|
||||||
simpoint_start_insts=
|
simpoint_start_insts=
|
||||||
simulate_data_stalls=false
|
simulate_data_stalls=false
|
||||||
simulate_inst_stalls=false
|
simulate_inst_stalls=false
|
||||||
|
@ -325,11 +320,12 @@ type=EioProcess
|
||||||
chkpt=
|
chkpt=
|
||||||
errout=cerr
|
errout=cerr
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
file=/scratch/nilay/GEM5/gem5/tests/test-progs/anagram/bin/alpha/eio/anagram-vshort.eio.gz
|
file=/dist/m5/regression/test-progs/anagram/bin/alpha/eio/anagram-vshort.eio.gz
|
||||||
input=None
|
input=None
|
||||||
max_stack_size=67108864
|
max_stack_size=67108864
|
||||||
output=cout
|
output=cout
|
||||||
system=system
|
system=system
|
||||||
|
useArchPT=false
|
||||||
|
|
||||||
[system.cpu2]
|
[system.cpu2]
|
||||||
type=AtomicSimpleCPU
|
type=AtomicSimpleCPU
|
||||||
|
@ -356,9 +352,6 @@ max_loads_any_thread=0
|
||||||
numThreads=1
|
numThreads=1
|
||||||
profile=0
|
profile=0
|
||||||
progress_interval=0
|
progress_interval=0
|
||||||
simpoint_interval=100000000
|
|
||||||
simpoint_profile=false
|
|
||||||
simpoint_profile_file=simpoint.bb.gz
|
|
||||||
simpoint_start_insts=
|
simpoint_start_insts=
|
||||||
simulate_data_stalls=false
|
simulate_data_stalls=false
|
||||||
simulate_inst_stalls=false
|
simulate_inst_stalls=false
|
||||||
|
@ -469,11 +462,12 @@ type=EioProcess
|
||||||
chkpt=
|
chkpt=
|
||||||
errout=cerr
|
errout=cerr
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
file=/scratch/nilay/GEM5/gem5/tests/test-progs/anagram/bin/alpha/eio/anagram-vshort.eio.gz
|
file=/dist/m5/regression/test-progs/anagram/bin/alpha/eio/anagram-vshort.eio.gz
|
||||||
input=None
|
input=None
|
||||||
max_stack_size=67108864
|
max_stack_size=67108864
|
||||||
output=cout
|
output=cout
|
||||||
system=system
|
system=system
|
||||||
|
useArchPT=false
|
||||||
|
|
||||||
[system.cpu3]
|
[system.cpu3]
|
||||||
type=AtomicSimpleCPU
|
type=AtomicSimpleCPU
|
||||||
|
@ -500,9 +494,6 @@ max_loads_any_thread=0
|
||||||
numThreads=1
|
numThreads=1
|
||||||
profile=0
|
profile=0
|
||||||
progress_interval=0
|
progress_interval=0
|
||||||
simpoint_interval=100000000
|
|
||||||
simpoint_profile=false
|
|
||||||
simpoint_profile_file=simpoint.bb.gz
|
|
||||||
simpoint_start_insts=
|
simpoint_start_insts=
|
||||||
simulate_data_stalls=false
|
simulate_data_stalls=false
|
||||||
simulate_inst_stalls=false
|
simulate_inst_stalls=false
|
||||||
|
@ -613,11 +604,12 @@ type=EioProcess
|
||||||
chkpt=
|
chkpt=
|
||||||
errout=cerr
|
errout=cerr
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
file=/scratch/nilay/GEM5/gem5/tests/test-progs/anagram/bin/alpha/eio/anagram-vshort.eio.gz
|
file=/dist/m5/regression/test-progs/anagram/bin/alpha/eio/anagram-vshort.eio.gz
|
||||||
input=None
|
input=None
|
||||||
max_stack_size=67108864
|
max_stack_size=67108864
|
||||||
output=cout
|
output=cout
|
||||||
system=system
|
system=system
|
||||||
|
useArchPT=false
|
||||||
|
|
||||||
[system.cpu_clk_domain]
|
[system.cpu_clk_domain]
|
||||||
type=SrcClockDomain
|
type=SrcClockDomain
|
||||||
|
@ -671,10 +663,11 @@ sequential_access=false
|
||||||
size=4194304
|
size=4194304
|
||||||
|
|
||||||
[system.membus]
|
[system.membus]
|
||||||
type=CoherentBus
|
type=CoherentXBar
|
||||||
clk_domain=system.clk_domain
|
clk_domain=system.clk_domain
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
header_cycles=1
|
header_cycles=1
|
||||||
|
snoop_filter=Null
|
||||||
system=system
|
system=system
|
||||||
use_default_range=false
|
use_default_range=false
|
||||||
width=8
|
width=8
|
||||||
|
@ -695,10 +688,11 @@ range=0:134217727
|
||||||
port=system.membus.master[0]
|
port=system.membus.master[0]
|
||||||
|
|
||||||
[system.toL2Bus]
|
[system.toL2Bus]
|
||||||
type=CoherentBus
|
type=CoherentXBar
|
||||||
clk_domain=system.cpu_clk_domain
|
clk_domain=system.cpu_clk_domain
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
header_cycles=1
|
header_cycles=1
|
||||||
|
snoop_filter=Null
|
||||||
system=system
|
system=system
|
||||||
use_default_range=false
|
use_default_range=false
|
||||||
width=8
|
width=8
|
||||||
|
|
File diff suppressed because it is too large
Load diff
|
@ -7,5 +7,4 @@ gzip: stdout: Broken pipe
|
||||||
gzip: stdout: Broken pipe
|
gzip: stdout: Broken pipe
|
||||||
|
|
||||||
gzip: stdout: Broken pipe
|
gzip: stdout: Broken pipe
|
||||||
|
stdout: Broken pipe
|
||||||
gzip: stdout: Broken pipe
|
|
||||||
|
|
|
@ -1,8 +1,8 @@
|
||||||
gem5 Simulator System. http://gem5.org
|
gem5 Simulator System. http://gem5.org
|
||||||
gem5 is copyrighted software; use the --copyright option for details.
|
gem5 is copyrighted software; use the --copyright option for details.
|
||||||
|
|
||||||
gem5 compiled May 10 2014 16:25:16
|
gem5 compiled Sep 21 2014 15:53:23
|
||||||
gem5 started May 10 2014 16:55:31
|
gem5 started Sep 21 2014 16:10:49
|
||||||
gem5 executing on zizzer
|
gem5 executing on zizzer
|
||||||
command line: build/ALPHA/gem5.opt -d build/ALPHA/tests/opt/quick/se/30.eio-mp/alpha/eio/simple-atomic-mp -re /z/stever/hg/gem5/tests/run.py build/ALPHA/tests/opt/quick/se/30.eio-mp/alpha/eio/simple-atomic-mp
|
command line: build/ALPHA/gem5.opt -d build/ALPHA/tests/opt/quick/se/30.eio-mp/alpha/eio/simple-atomic-mp -re /z/stever/hg/gem5/tests/run.py build/ALPHA/tests/opt/quick/se/30.eio-mp/alpha/eio/simple-atomic-mp
|
||||||
Global frequency set at 1000000000000 ticks per second
|
Global frequency set at 1000000000000 ticks per second
|
||||||
|
|
|
@ -4,11 +4,11 @@ sim_seconds 0.000250 # Nu
|
||||||
sim_ticks 250015500 # Number of ticks simulated
|
sim_ticks 250015500 # Number of ticks simulated
|
||||||
final_tick 250015500 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
|
final_tick 250015500 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
|
||||||
sim_freq 1000000000000 # Frequency of simulated ticks
|
sim_freq 1000000000000 # Frequency of simulated ticks
|
||||||
host_inst_rate 2755592 # Simulator instruction rate (inst/s)
|
host_inst_rate 2852799 # Simulator instruction rate (inst/s)
|
||||||
host_op_rate 2755527 # Simulator op (including micro ops) rate (op/s)
|
host_op_rate 2852705 # Simulator op (including micro ops) rate (op/s)
|
||||||
host_tick_rate 344450673 # Simulator tick rate (ticks/s)
|
host_tick_rate 356601416 # Simulator tick rate (ticks/s)
|
||||||
host_mem_usage 240516 # Number of bytes of host memory used
|
host_mem_usage 239540 # Number of bytes of host memory used
|
||||||
host_seconds 0.73 # Real time elapsed on the host
|
host_seconds 0.70 # Real time elapsed on the host
|
||||||
sim_insts 2000004 # Number of instructions simulated
|
sim_insts 2000004 # Number of instructions simulated
|
||||||
sim_ops 2000004 # Number of ops (including micro ops) simulated
|
sim_ops 2000004 # Number of ops (including micro ops) simulated
|
||||||
system.voltage_domain.voltage 1 # Voltage in Volts
|
system.voltage_domain.voltage 1 # Voltage in Volts
|
||||||
|
@ -59,9 +59,25 @@ system.physmem.bw_total::cpu2.data 116216795 # To
|
||||||
system.physmem.bw_total::cpu3.inst 103161604 # Total bandwidth to/from this memory (bytes/s)
|
system.physmem.bw_total::cpu3.inst 103161604 # Total bandwidth to/from this memory (bytes/s)
|
||||||
system.physmem.bw_total::cpu3.data 116216795 # Total bandwidth to/from this memory (bytes/s)
|
system.physmem.bw_total::cpu3.data 116216795 # Total bandwidth to/from this memory (bytes/s)
|
||||||
system.physmem.bw_total::total 877513594 # Total bandwidth to/from this memory (bytes/s)
|
system.physmem.bw_total::total 877513594 # Total bandwidth to/from this memory (bytes/s)
|
||||||
system.membus.throughput 877513594 # Throughput (bytes/s)
|
system.membus.trans_dist::ReadReq 2872 # Transaction distribution
|
||||||
system.membus.data_through_bus 219392 # Total data (bytes)
|
system.membus.trans_dist::ReadResp 2872 # Transaction distribution
|
||||||
system.membus.snoop_data_through_bus 0 # Total snoop data (bytes)
|
system.membus.trans_dist::ReadExReq 556 # Transaction distribution
|
||||||
|
system.membus.trans_dist::ReadExResp 556 # Transaction distribution
|
||||||
|
system.membus.pkt_count_system.l2c.mem_side::system.physmem.port 6856 # Packet count per connected master and slave (bytes)
|
||||||
|
system.membus.pkt_count::total 6856 # Packet count per connected master and slave (bytes)
|
||||||
|
system.membus.pkt_size_system.l2c.mem_side::system.physmem.port 219392 # Cumulative packet size per connected master and slave (bytes)
|
||||||
|
system.membus.pkt_size::total 219392 # Cumulative packet size per connected master and slave (bytes)
|
||||||
|
system.membus.snoops 0 # Total snoops (count)
|
||||||
|
system.membus.snoop_fanout::samples 3428 # Request fanout histogram
|
||||||
|
system.membus.snoop_fanout::mean 0 # Request fanout histogram
|
||||||
|
system.membus.snoop_fanout::stdev 0 # Request fanout histogram
|
||||||
|
system.membus.snoop_fanout::underflows 0 0.00% 0.00% # Request fanout histogram
|
||||||
|
system.membus.snoop_fanout::0 3428 100.00% 100.00% # Request fanout histogram
|
||||||
|
system.membus.snoop_fanout::1 0 0.00% 100.00% # Request fanout histogram
|
||||||
|
system.membus.snoop_fanout::overflows 0 0.00% 100.00% # Request fanout histogram
|
||||||
|
system.membus.snoop_fanout::min_value 0 # Request fanout histogram
|
||||||
|
system.membus.snoop_fanout::max_value 0 # Request fanout histogram
|
||||||
|
system.membus.snoop_fanout::total 3428 # Request fanout histogram
|
||||||
system.cpu_clk_domain.clock 500 # Clock period in ticks
|
system.cpu_clk_domain.clock 500 # Clock period in ticks
|
||||||
system.l2c.tags.replacements 0 # number of replacements
|
system.l2c.tags.replacements 0 # number of replacements
|
||||||
system.l2c.tags.tagsinuse 1962.780232 # Cycle average of tags in use
|
system.l2c.tags.tagsinuse 1962.780232 # Cycle average of tags in use
|
||||||
|
@ -231,9 +247,47 @@ system.l2c.avg_blocked_cycles::no_targets nan # a
|
||||||
system.l2c.fast_writes 0 # number of fast writes performed
|
system.l2c.fast_writes 0 # number of fast writes performed
|
||||||
system.l2c.cache_copies 0 # number of cache copies performed
|
system.l2c.cache_copies 0 # number of cache copies performed
|
||||||
system.l2c.no_allocate_misses 0 # Number of misses that were no-allocate
|
system.l2c.no_allocate_misses 0 # Number of misses that were no-allocate
|
||||||
system.toL2Bus.throughput 977859373 # Throughput (bytes/s)
|
system.toL2Bus.trans_dist::ReadReq 3148 # Transaction distribution
|
||||||
system.toL2Bus.data_through_bus 244480 # Total data (bytes)
|
system.toL2Bus.trans_dist::ReadResp 3148 # Transaction distribution
|
||||||
system.toL2Bus.snoop_data_through_bus 0 # Total snoop data (bytes)
|
system.toL2Bus.trans_dist::Writeback 116 # Transaction distribution
|
||||||
|
system.toL2Bus.trans_dist::ReadExReq 556 # Transaction distribution
|
||||||
|
system.toL2Bus.trans_dist::ReadExResp 556 # Transaction distribution
|
||||||
|
system.toL2Bus.pkt_count_system.cpu0.icache.mem_side::system.l2c.cpu_side 926 # Packet count per connected master and slave (bytes)
|
||||||
|
system.toL2Bus.pkt_count_system.cpu0.dcache.mem_side::system.l2c.cpu_side 955 # Packet count per connected master and slave (bytes)
|
||||||
|
system.toL2Bus.pkt_count_system.cpu1.icache.mem_side::system.l2c.cpu_side 926 # Packet count per connected master and slave (bytes)
|
||||||
|
system.toL2Bus.pkt_count_system.cpu1.dcache.mem_side::system.l2c.cpu_side 955 # Packet count per connected master and slave (bytes)
|
||||||
|
system.toL2Bus.pkt_count_system.cpu2.icache.mem_side::system.l2c.cpu_side 926 # Packet count per connected master and slave (bytes)
|
||||||
|
system.toL2Bus.pkt_count_system.cpu2.dcache.mem_side::system.l2c.cpu_side 955 # Packet count per connected master and slave (bytes)
|
||||||
|
system.toL2Bus.pkt_count_system.cpu3.icache.mem_side::system.l2c.cpu_side 926 # Packet count per connected master and slave (bytes)
|
||||||
|
system.toL2Bus.pkt_count_system.cpu3.dcache.mem_side::system.l2c.cpu_side 955 # Packet count per connected master and slave (bytes)
|
||||||
|
system.toL2Bus.pkt_count::total 7524 # Packet count per connected master and slave (bytes)
|
||||||
|
system.toL2Bus.pkt_size_system.cpu0.icache.mem_side::system.l2c.cpu_side 29632 # Cumulative packet size per connected master and slave (bytes)
|
||||||
|
system.toL2Bus.pkt_size_system.cpu0.dcache.mem_side::system.l2c.cpu_side 31488 # Cumulative packet size per connected master and slave (bytes)
|
||||||
|
system.toL2Bus.pkt_size_system.cpu1.icache.mem_side::system.l2c.cpu_side 29632 # Cumulative packet size per connected master and slave (bytes)
|
||||||
|
system.toL2Bus.pkt_size_system.cpu1.dcache.mem_side::system.l2c.cpu_side 31488 # Cumulative packet size per connected master and slave (bytes)
|
||||||
|
system.toL2Bus.pkt_size_system.cpu2.icache.mem_side::system.l2c.cpu_side 29632 # Cumulative packet size per connected master and slave (bytes)
|
||||||
|
system.toL2Bus.pkt_size_system.cpu2.dcache.mem_side::system.l2c.cpu_side 31488 # Cumulative packet size per connected master and slave (bytes)
|
||||||
|
system.toL2Bus.pkt_size_system.cpu3.icache.mem_side::system.l2c.cpu_side 29632 # Cumulative packet size per connected master and slave (bytes)
|
||||||
|
system.toL2Bus.pkt_size_system.cpu3.dcache.mem_side::system.l2c.cpu_side 31488 # Cumulative packet size per connected master and slave (bytes)
|
||||||
|
system.toL2Bus.pkt_size::total 244480 # Cumulative packet size per connected master and slave (bytes)
|
||||||
|
system.toL2Bus.snoops 0 # Total snoops (count)
|
||||||
|
system.toL2Bus.snoop_fanout::samples 3820 # Request fanout histogram
|
||||||
|
system.toL2Bus.snoop_fanout::mean 7 # Request fanout histogram
|
||||||
|
system.toL2Bus.snoop_fanout::stdev 0 # Request fanout histogram
|
||||||
|
system.toL2Bus.snoop_fanout::underflows 0 0.00% 0.00% # Request fanout histogram
|
||||||
|
system.toL2Bus.snoop_fanout::0 0 0.00% 0.00% # Request fanout histogram
|
||||||
|
system.toL2Bus.snoop_fanout::1 0 0.00% 0.00% # Request fanout histogram
|
||||||
|
system.toL2Bus.snoop_fanout::2 0 0.00% 0.00% # Request fanout histogram
|
||||||
|
system.toL2Bus.snoop_fanout::3 0 0.00% 0.00% # Request fanout histogram
|
||||||
|
system.toL2Bus.snoop_fanout::4 0 0.00% 0.00% # Request fanout histogram
|
||||||
|
system.toL2Bus.snoop_fanout::5 0 0.00% 0.00% # Request fanout histogram
|
||||||
|
system.toL2Bus.snoop_fanout::6 0 0.00% 0.00% # Request fanout histogram
|
||||||
|
system.toL2Bus.snoop_fanout::7 3820 100.00% 100.00% # Request fanout histogram
|
||||||
|
system.toL2Bus.snoop_fanout::8 0 0.00% 100.00% # Request fanout histogram
|
||||||
|
system.toL2Bus.snoop_fanout::overflows 0 0.00% 100.00% # Request fanout histogram
|
||||||
|
system.toL2Bus.snoop_fanout::min_value 7 # Request fanout histogram
|
||||||
|
system.toL2Bus.snoop_fanout::max_value 7 # Request fanout histogram
|
||||||
|
system.toL2Bus.snoop_fanout::total 3820 # Request fanout histogram
|
||||||
system.cpu0.dtb.fetch_hits 0 # ITB hits
|
system.cpu0.dtb.fetch_hits 0 # ITB hits
|
||||||
system.cpu0.dtb.fetch_misses 0 # ITB misses
|
system.cpu0.dtb.fetch_misses 0 # ITB misses
|
||||||
system.cpu0.dtb.fetch_acv 0 # ITB acv
|
system.cpu0.dtb.fetch_acv 0 # ITB acv
|
||||||
|
|
|
@ -174,11 +174,12 @@ type=EioProcess
|
||||||
chkpt=
|
chkpt=
|
||||||
errout=cerr
|
errout=cerr
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
file=/scratch/nilay/GEM5/gem5/tests/test-progs/anagram/bin/alpha/eio/anagram-vshort.eio.gz
|
file=/dist/m5/regression/test-progs/anagram/bin/alpha/eio/anagram-vshort.eio.gz
|
||||||
input=None
|
input=None
|
||||||
max_stack_size=67108864
|
max_stack_size=67108864
|
||||||
output=cout
|
output=cout
|
||||||
system=system
|
system=system
|
||||||
|
useArchPT=false
|
||||||
|
|
||||||
[system.cpu1]
|
[system.cpu1]
|
||||||
type=TimingSimpleCPU
|
type=TimingSimpleCPU
|
||||||
|
@ -311,11 +312,12 @@ type=EioProcess
|
||||||
chkpt=
|
chkpt=
|
||||||
errout=cerr
|
errout=cerr
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
file=/scratch/nilay/GEM5/gem5/tests/test-progs/anagram/bin/alpha/eio/anagram-vshort.eio.gz
|
file=/dist/m5/regression/test-progs/anagram/bin/alpha/eio/anagram-vshort.eio.gz
|
||||||
input=None
|
input=None
|
||||||
max_stack_size=67108864
|
max_stack_size=67108864
|
||||||
output=cout
|
output=cout
|
||||||
system=system
|
system=system
|
||||||
|
useArchPT=false
|
||||||
|
|
||||||
[system.cpu2]
|
[system.cpu2]
|
||||||
type=TimingSimpleCPU
|
type=TimingSimpleCPU
|
||||||
|
@ -448,11 +450,12 @@ type=EioProcess
|
||||||
chkpt=
|
chkpt=
|
||||||
errout=cerr
|
errout=cerr
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
file=/scratch/nilay/GEM5/gem5/tests/test-progs/anagram/bin/alpha/eio/anagram-vshort.eio.gz
|
file=/dist/m5/regression/test-progs/anagram/bin/alpha/eio/anagram-vshort.eio.gz
|
||||||
input=None
|
input=None
|
||||||
max_stack_size=67108864
|
max_stack_size=67108864
|
||||||
output=cout
|
output=cout
|
||||||
system=system
|
system=system
|
||||||
|
useArchPT=false
|
||||||
|
|
||||||
[system.cpu3]
|
[system.cpu3]
|
||||||
type=TimingSimpleCPU
|
type=TimingSimpleCPU
|
||||||
|
@ -585,11 +588,12 @@ type=EioProcess
|
||||||
chkpt=
|
chkpt=
|
||||||
errout=cerr
|
errout=cerr
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
file=/scratch/nilay/GEM5/gem5/tests/test-progs/anagram/bin/alpha/eio/anagram-vshort.eio.gz
|
file=/dist/m5/regression/test-progs/anagram/bin/alpha/eio/anagram-vshort.eio.gz
|
||||||
input=None
|
input=None
|
||||||
max_stack_size=67108864
|
max_stack_size=67108864
|
||||||
output=cout
|
output=cout
|
||||||
system=system
|
system=system
|
||||||
|
useArchPT=false
|
||||||
|
|
||||||
[system.cpu_clk_domain]
|
[system.cpu_clk_domain]
|
||||||
type=SrcClockDomain
|
type=SrcClockDomain
|
||||||
|
@ -643,10 +647,11 @@ sequential_access=false
|
||||||
size=4194304
|
size=4194304
|
||||||
|
|
||||||
[system.membus]
|
[system.membus]
|
||||||
type=CoherentBus
|
type=CoherentXBar
|
||||||
clk_domain=system.clk_domain
|
clk_domain=system.clk_domain
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
header_cycles=1
|
header_cycles=1
|
||||||
|
snoop_filter=Null
|
||||||
system=system
|
system=system
|
||||||
use_default_range=false
|
use_default_range=false
|
||||||
width=8
|
width=8
|
||||||
|
@ -667,10 +672,11 @@ range=0:134217727
|
||||||
port=system.membus.master[0]
|
port=system.membus.master[0]
|
||||||
|
|
||||||
[system.toL2Bus]
|
[system.toL2Bus]
|
||||||
type=CoherentBus
|
type=CoherentXBar
|
||||||
clk_domain=system.cpu_clk_domain
|
clk_domain=system.cpu_clk_domain
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
header_cycles=1
|
header_cycles=1
|
||||||
|
snoop_filter=Null
|
||||||
system=system
|
system=system
|
||||||
use_default_range=false
|
use_default_range=false
|
||||||
width=8
|
width=8
|
||||||
|
|
File diff suppressed because it is too large
Load diff
|
@ -7,5 +7,3 @@ gzip: stdout: Broken pipe
|
||||||
gzip: stdout: Broken pipe
|
gzip: stdout: Broken pipe
|
||||||
|
|
||||||
gzip: stdout: Broken pipe
|
gzip: stdout: Broken pipe
|
||||||
|
|
||||||
gzip: stdout: Broken pipe
|
|
||||||
|
|
|
@ -1,8 +1,8 @@
|
||||||
gem5 Simulator System. http://gem5.org
|
gem5 Simulator System. http://gem5.org
|
||||||
gem5 is copyrighted software; use the --copyright option for details.
|
gem5 is copyrighted software; use the --copyright option for details.
|
||||||
|
|
||||||
gem5 compiled May 10 2014 16:25:16
|
gem5 compiled Sep 21 2014 15:53:23
|
||||||
gem5 started May 10 2014 16:55:53
|
gem5 started Sep 21 2014 16:10:49
|
||||||
gem5 executing on zizzer
|
gem5 executing on zizzer
|
||||||
command line: build/ALPHA/gem5.opt -d build/ALPHA/tests/opt/quick/se/30.eio-mp/alpha/eio/simple-timing-mp -re /z/stever/hg/gem5/tests/run.py build/ALPHA/tests/opt/quick/se/30.eio-mp/alpha/eio/simple-timing-mp
|
command line: build/ALPHA/gem5.opt -d build/ALPHA/tests/opt/quick/se/30.eio-mp/alpha/eio/simple-timing-mp -re /z/stever/hg/gem5/tests/run.py build/ALPHA/tests/opt/quick/se/30.eio-mp/alpha/eio/simple-timing-mp
|
||||||
Global frequency set at 1000000000000 ticks per second
|
Global frequency set at 1000000000000 ticks per second
|
||||||
|
|
|
@ -4,11 +4,11 @@ sim_seconds 0.000729 # Nu
|
||||||
sim_ticks 729024000 # Number of ticks simulated
|
sim_ticks 729024000 # Number of ticks simulated
|
||||||
final_tick 729024000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
|
final_tick 729024000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
|
||||||
sim_freq 1000000000000 # Frequency of simulated ticks
|
sim_freq 1000000000000 # Frequency of simulated ticks
|
||||||
host_inst_rate 1251613 # Simulator instruction rate (inst/s)
|
host_inst_rate 1431965 # Simulator instruction rate (inst/s)
|
||||||
host_op_rate 1251599 # Simulator op (including micro ops) rate (op/s)
|
host_op_rate 1431947 # Simulator op (including micro ops) rate (op/s)
|
||||||
host_tick_rate 456227594 # Simulator tick rate (ticks/s)
|
host_tick_rate 521966515 # Simulator tick rate (ticks/s)
|
||||||
host_mem_usage 240516 # Number of bytes of host memory used
|
host_mem_usage 239544 # Number of bytes of host memory used
|
||||||
host_seconds 1.60 # Real time elapsed on the host
|
host_seconds 1.40 # Real time elapsed on the host
|
||||||
sim_insts 1999959 # Number of instructions simulated
|
sim_insts 1999959 # Number of instructions simulated
|
||||||
sim_ops 1999959 # Number of ops (including micro ops) simulated
|
sim_ops 1999959 # Number of ops (including micro ops) simulated
|
||||||
system.voltage_domain.voltage 1 # Voltage in Volts
|
system.voltage_domain.voltage 1 # Voltage in Volts
|
||||||
|
@ -59,17 +59,25 @@ system.physmem.bw_total::cpu2.data 39856027 # To
|
||||||
system.physmem.bw_total::cpu3.inst 35378808 # Total bandwidth to/from this memory (bytes/s)
|
system.physmem.bw_total::cpu3.inst 35378808 # Total bandwidth to/from this memory (bytes/s)
|
||||||
system.physmem.bw_total::cpu3.data 39856027 # Total bandwidth to/from this memory (bytes/s)
|
system.physmem.bw_total::cpu3.data 39856027 # Total bandwidth to/from this memory (bytes/s)
|
||||||
system.physmem.bw_total::total 300939338 # Total bandwidth to/from this memory (bytes/s)
|
system.physmem.bw_total::total 300939338 # Total bandwidth to/from this memory (bytes/s)
|
||||||
system.membus.throughput 300939338 # Throughput (bytes/s)
|
|
||||||
system.membus.trans_dist::ReadReq 2872 # Transaction distribution
|
system.membus.trans_dist::ReadReq 2872 # Transaction distribution
|
||||||
system.membus.trans_dist::ReadResp 2872 # Transaction distribution
|
system.membus.trans_dist::ReadResp 2872 # Transaction distribution
|
||||||
system.membus.trans_dist::ReadExReq 556 # Transaction distribution
|
system.membus.trans_dist::ReadExReq 556 # Transaction distribution
|
||||||
system.membus.trans_dist::ReadExResp 556 # Transaction distribution
|
system.membus.trans_dist::ReadExResp 556 # Transaction distribution
|
||||||
system.membus.pkt_count_system.l2c.mem_side::system.physmem.port 6856 # Packet count per connected master and slave (bytes)
|
system.membus.pkt_count_system.l2c.mem_side::system.physmem.port 6856 # Packet count per connected master and slave (bytes)
|
||||||
system.membus.pkt_count::total 6856 # Packet count per connected master and slave (bytes)
|
system.membus.pkt_count::total 6856 # Packet count per connected master and slave (bytes)
|
||||||
system.membus.tot_pkt_size_system.l2c.mem_side::system.physmem.port 219392 # Cumulative packet size per connected master and slave (bytes)
|
system.membus.pkt_size_system.l2c.mem_side::system.physmem.port 219392 # Cumulative packet size per connected master and slave (bytes)
|
||||||
system.membus.tot_pkt_size::total 219392 # Cumulative packet size per connected master and slave (bytes)
|
system.membus.pkt_size::total 219392 # Cumulative packet size per connected master and slave (bytes)
|
||||||
system.membus.data_through_bus 219392 # Total data (bytes)
|
system.membus.snoops 0 # Total snoops (count)
|
||||||
system.membus.snoop_data_through_bus 0 # Total snoop data (bytes)
|
system.membus.snoop_fanout::samples 3431 # Request fanout histogram
|
||||||
|
system.membus.snoop_fanout::mean 0 # Request fanout histogram
|
||||||
|
system.membus.snoop_fanout::stdev 0 # Request fanout histogram
|
||||||
|
system.membus.snoop_fanout::underflows 0 0.00% 0.00% # Request fanout histogram
|
||||||
|
system.membus.snoop_fanout::0 3431 100.00% 100.00% # Request fanout histogram
|
||||||
|
system.membus.snoop_fanout::1 0 0.00% 100.00% # Request fanout histogram
|
||||||
|
system.membus.snoop_fanout::overflows 0 0.00% 100.00% # Request fanout histogram
|
||||||
|
system.membus.snoop_fanout::min_value 0 # Request fanout histogram
|
||||||
|
system.membus.snoop_fanout::max_value 0 # Request fanout histogram
|
||||||
|
system.membus.snoop_fanout::total 3431 # Request fanout histogram
|
||||||
system.membus.reqLayer0.occupancy 4229968 # Layer occupancy (ticks)
|
system.membus.reqLayer0.occupancy 4229968 # Layer occupancy (ticks)
|
||||||
system.membus.reqLayer0.utilization 0.6 # Layer utilization (%)
|
system.membus.reqLayer0.utilization 0.6 # Layer utilization (%)
|
||||||
system.membus.respLayer1.occupancy 31051500 # Layer occupancy (ticks)
|
system.membus.respLayer1.occupancy 31051500 # Layer occupancy (ticks)
|
||||||
|
@ -435,7 +443,6 @@ system.l2c.overall_avg_mshr_miss_latency::cpu3.inst 40430.521092
|
||||||
system.l2c.overall_avg_mshr_miss_latency::cpu3.data 40124.449339 # average overall mshr miss latency
|
system.l2c.overall_avg_mshr_miss_latency::cpu3.data 40124.449339 # average overall mshr miss latency
|
||||||
system.l2c.overall_avg_mshr_miss_latency::total 40190.927655 # average overall mshr miss latency
|
system.l2c.overall_avg_mshr_miss_latency::total 40190.927655 # average overall mshr miss latency
|
||||||
system.l2c.no_allocate_misses 0 # Number of misses that were no-allocate
|
system.l2c.no_allocate_misses 0 # Number of misses that were no-allocate
|
||||||
system.toL2Bus.throughput 335352471 # Throughput (bytes/s)
|
|
||||||
system.toL2Bus.trans_dist::ReadReq 3148 # Transaction distribution
|
system.toL2Bus.trans_dist::ReadReq 3148 # Transaction distribution
|
||||||
system.toL2Bus.trans_dist::ReadResp 3148 # Transaction distribution
|
system.toL2Bus.trans_dist::ReadResp 3148 # Transaction distribution
|
||||||
system.toL2Bus.trans_dist::Writeback 116 # Transaction distribution
|
system.toL2Bus.trans_dist::Writeback 116 # Transaction distribution
|
||||||
|
@ -450,17 +457,33 @@ system.toL2Bus.pkt_count_system.cpu2.dcache.mem_side::system.l2c.cpu_side
|
||||||
system.toL2Bus.pkt_count_system.cpu3.icache.mem_side::system.l2c.cpu_side 926 # Packet count per connected master and slave (bytes)
|
system.toL2Bus.pkt_count_system.cpu3.icache.mem_side::system.l2c.cpu_side 926 # Packet count per connected master and slave (bytes)
|
||||||
system.toL2Bus.pkt_count_system.cpu3.dcache.mem_side::system.l2c.cpu_side 955 # Packet count per connected master and slave (bytes)
|
system.toL2Bus.pkt_count_system.cpu3.dcache.mem_side::system.l2c.cpu_side 955 # Packet count per connected master and slave (bytes)
|
||||||
system.toL2Bus.pkt_count::total 7524 # Packet count per connected master and slave (bytes)
|
system.toL2Bus.pkt_count::total 7524 # Packet count per connected master and slave (bytes)
|
||||||
system.toL2Bus.tot_pkt_size_system.cpu0.icache.mem_side::system.l2c.cpu_side 29632 # Cumulative packet size per connected master and slave (bytes)
|
system.toL2Bus.pkt_size_system.cpu0.icache.mem_side::system.l2c.cpu_side 29632 # Cumulative packet size per connected master and slave (bytes)
|
||||||
system.toL2Bus.tot_pkt_size_system.cpu0.dcache.mem_side::system.l2c.cpu_side 31488 # Cumulative packet size per connected master and slave (bytes)
|
system.toL2Bus.pkt_size_system.cpu0.dcache.mem_side::system.l2c.cpu_side 31488 # Cumulative packet size per connected master and slave (bytes)
|
||||||
system.toL2Bus.tot_pkt_size_system.cpu1.icache.mem_side::system.l2c.cpu_side 29632 # Cumulative packet size per connected master and slave (bytes)
|
system.toL2Bus.pkt_size_system.cpu1.icache.mem_side::system.l2c.cpu_side 29632 # Cumulative packet size per connected master and slave (bytes)
|
||||||
system.toL2Bus.tot_pkt_size_system.cpu1.dcache.mem_side::system.l2c.cpu_side 31488 # Cumulative packet size per connected master and slave (bytes)
|
system.toL2Bus.pkt_size_system.cpu1.dcache.mem_side::system.l2c.cpu_side 31488 # Cumulative packet size per connected master and slave (bytes)
|
||||||
system.toL2Bus.tot_pkt_size_system.cpu2.icache.mem_side::system.l2c.cpu_side 29632 # Cumulative packet size per connected master and slave (bytes)
|
system.toL2Bus.pkt_size_system.cpu2.icache.mem_side::system.l2c.cpu_side 29632 # Cumulative packet size per connected master and slave (bytes)
|
||||||
system.toL2Bus.tot_pkt_size_system.cpu2.dcache.mem_side::system.l2c.cpu_side 31488 # Cumulative packet size per connected master and slave (bytes)
|
system.toL2Bus.pkt_size_system.cpu2.dcache.mem_side::system.l2c.cpu_side 31488 # Cumulative packet size per connected master and slave (bytes)
|
||||||
system.toL2Bus.tot_pkt_size_system.cpu3.icache.mem_side::system.l2c.cpu_side 29632 # Cumulative packet size per connected master and slave (bytes)
|
system.toL2Bus.pkt_size_system.cpu3.icache.mem_side::system.l2c.cpu_side 29632 # Cumulative packet size per connected master and slave (bytes)
|
||||||
system.toL2Bus.tot_pkt_size_system.cpu3.dcache.mem_side::system.l2c.cpu_side 31488 # Cumulative packet size per connected master and slave (bytes)
|
system.toL2Bus.pkt_size_system.cpu3.dcache.mem_side::system.l2c.cpu_side 31488 # Cumulative packet size per connected master and slave (bytes)
|
||||||
system.toL2Bus.tot_pkt_size::total 244480 # Cumulative packet size per connected master and slave (bytes)
|
system.toL2Bus.pkt_size::total 244480 # Cumulative packet size per connected master and slave (bytes)
|
||||||
system.toL2Bus.data_through_bus 244480 # Total data (bytes)
|
system.toL2Bus.snoops 0 # Total snoops (count)
|
||||||
system.toL2Bus.snoop_data_through_bus 0 # Total snoop data (bytes)
|
system.toL2Bus.snoop_fanout::samples 3820 # Request fanout histogram
|
||||||
|
system.toL2Bus.snoop_fanout::mean 7 # Request fanout histogram
|
||||||
|
system.toL2Bus.snoop_fanout::stdev 0 # Request fanout histogram
|
||||||
|
system.toL2Bus.snoop_fanout::underflows 0 0.00% 0.00% # Request fanout histogram
|
||||||
|
system.toL2Bus.snoop_fanout::0 0 0.00% 0.00% # Request fanout histogram
|
||||||
|
system.toL2Bus.snoop_fanout::1 0 0.00% 0.00% # Request fanout histogram
|
||||||
|
system.toL2Bus.snoop_fanout::2 0 0.00% 0.00% # Request fanout histogram
|
||||||
|
system.toL2Bus.snoop_fanout::3 0 0.00% 0.00% # Request fanout histogram
|
||||||
|
system.toL2Bus.snoop_fanout::4 0 0.00% 0.00% # Request fanout histogram
|
||||||
|
system.toL2Bus.snoop_fanout::5 0 0.00% 0.00% # Request fanout histogram
|
||||||
|
system.toL2Bus.snoop_fanout::6 0 0.00% 0.00% # Request fanout histogram
|
||||||
|
system.toL2Bus.snoop_fanout::7 3820 100.00% 100.00% # Request fanout histogram
|
||||||
|
system.toL2Bus.snoop_fanout::8 0 0.00% 100.00% # Request fanout histogram
|
||||||
|
system.toL2Bus.snoop_fanout::overflows 0 0.00% 100.00% # Request fanout histogram
|
||||||
|
system.toL2Bus.snoop_fanout::min_value 7 # Request fanout histogram
|
||||||
|
system.toL2Bus.snoop_fanout::max_value 7 # Request fanout histogram
|
||||||
|
system.toL2Bus.snoop_fanout::total 3820 # Request fanout histogram
|
||||||
system.toL2Bus.reqLayer0.occupancy 2374000 # Layer occupancy (ticks)
|
system.toL2Bus.reqLayer0.occupancy 2374000 # Layer occupancy (ticks)
|
||||||
system.toL2Bus.reqLayer0.utilization 0.3 # Layer utilization (%)
|
system.toL2Bus.reqLayer0.utilization 0.3 # Layer utilization (%)
|
||||||
system.toL2Bus.respLayer0.occupancy 2083500 # Layer occupancy (ticks)
|
system.toL2Bus.respLayer0.occupancy 2083500 # Layer occupancy (ticks)
|
||||||
|
|
Loading…
Reference in a new issue