stats: update eio stats for recent changes
This commit is contained in:
Steve Reinhardt
parent
cfb805cc71
commit
85016c2d45
16 changed files with 379 additions and 45 deletions
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@ -1,7 +1,9 @@
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[root]
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type=Root
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children=system
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eventq_index=0
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full_system=false
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sim_quantum=0
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time_sync_enable=false
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time_sync_period=100000000000
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time_sync_spin_threshold=100000000
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@ -12,9 +14,11 @@ children=clk_domain cpu cpu_clk_domain membus physmem voltage_domain
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boot_osflags=a
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cache_line_size=64
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clk_domain=system.clk_domain
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eventq_index=0
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init_param=0
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kernel=
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load_addr_mask=1099511627775
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load_offset=0
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mem_mode=atomic
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mem_ranges=
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memories=system.physmem
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@ -33,6 +37,7 @@ system_port=system.membus.slave[0]
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[system.clk_domain]
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type=SrcClockDomain
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clock=1000
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eventq_index=0
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voltage_domain=system.voltage_domain
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[system.cpu]
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@ -45,6 +50,7 @@ do_checkpoint_insts=true
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do_quiesce=true
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do_statistics_insts=true
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dtb=system.cpu.dtb
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eventq_index=0
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fastmem=false
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function_trace=false
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function_trace_start=0
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@ -74,25 +80,32 @@ icache_port=system.membus.slave[1]
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[system.cpu.dtb]
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type=AlphaTLB
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eventq_index=0
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size=64
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[system.cpu.interrupts]
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type=AlphaInterrupts
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eventq_index=0
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[system.cpu.isa]
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type=AlphaISA
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eventq_index=0
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system=system
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[system.cpu.itb]
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type=AlphaTLB
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eventq_index=0
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size=48
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[system.cpu.tracer]
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type=ExeTracer
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eventq_index=0
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[system.cpu.workload]
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type=EioProcess
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chkpt=
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errout=cerr
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eventq_index=0
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file=/dist/m5/regression/test-progs/anagram/bin/alpha/eio/anagram-vshort.eio.gz
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input=None
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max_stack_size=67108864
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@ -102,11 +115,13 @@ system=system
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[system.cpu_clk_domain]
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type=SrcClockDomain
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clock=500
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eventq_index=0
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voltage_domain=system.voltage_domain
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[system.membus]
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type=CoherentBus
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clk_domain=system.clk_domain
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eventq_index=0
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header_cycles=1
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system=system
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use_default_range=false
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@ -119,6 +134,7 @@ type=SimpleMemory
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bandwidth=73.000000
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clk_domain=system.clk_domain
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conf_table_reported=true
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eventq_index=0
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in_addr_map=true
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latency=30000
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latency_var=0
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@ -128,5 +144,6 @@ port=system.membus.master[0]
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[system.voltage_domain]
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type=VoltageDomain
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eventq_index=0
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voltage=1.000000
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@ -1,7 +1,5 @@
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warn: CoherentBus system.membus has no snooping ports attached!
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warn: Sockets disabled, not accepting gdb connections
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warn: Prefetch instructions in Alpha do not do anything
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warn: Prefetch instructions in Alpha do not do anything
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hack: be nice to actually delete the event here
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gzip: stdout: Broken pipe
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@ -1,10 +1,8 @@
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Redirecting stdout to build/ALPHA/tests/opt/quick/se/20.eio-short/alpha/eio/simple-atomic/simout
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Redirecting stderr to build/ALPHA/tests/opt/quick/se/20.eio-short/alpha/eio/simple-atomic/simerr
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gem5 Simulator System. http://gem5.org
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gem5 is copyrighted software; use the --copyright option for details.
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gem5 compiled Sep 24 2013 03:08:53
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gem5 started Sep 28 2013 03:05:39
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gem5 compiled Jan 27 2014 00:31:18
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gem5 started Jan 27 2014 00:31:45
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gem5 executing on zizzer
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command line: build/ALPHA/gem5.opt -d build/ALPHA/tests/opt/quick/se/20.eio-short/alpha/eio/simple-atomic -re tests/run.py build/ALPHA/tests/opt/quick/se/20.eio-short/alpha/eio/simple-atomic
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Global frequency set at 1000000000000 ticks per second
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@ -4,13 +4,15 @@ sim_seconds 0.000250 # Nu
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sim_ticks 250015500 # Number of ticks simulated
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final_tick 250015500 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
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sim_freq 1000000000000 # Frequency of simulated ticks
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host_inst_rate 2804892 # Simulator instruction rate (inst/s)
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host_op_rate 2804630 # Simulator op (including micro ops) rate (op/s)
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host_tick_rate 1402273759 # Simulator tick rate (ticks/s)
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host_mem_usage 217844 # Number of bytes of host memory used
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host_seconds 0.18 # Real time elapsed on the host
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host_inst_rate 1389197 # Simulator instruction rate (inst/s)
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host_op_rate 1389135 # Simulator op (including micro ops) rate (op/s)
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host_tick_rate 694579134 # Simulator tick rate (ticks/s)
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host_mem_usage 219580 # Number of bytes of host memory used
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host_seconds 0.36 # Real time elapsed on the host
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sim_insts 500001 # Number of instructions simulated
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sim_ops 500001 # Number of ops (including micro ops) simulated
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system.voltage_domain.voltage 1 # Voltage in Volts
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system.clk_domain.clock 1000 # Clock period in ticks
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system.physmem.bytes_read::cpu.inst 2000076 # Number of bytes read from this memory
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system.physmem.bytes_read::cpu.data 872600 # Number of bytes read from this memory
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system.physmem.bytes_read::total 2872676 # Number of bytes read from this memory
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@ -36,6 +38,7 @@ system.physmem.bw_total::total 13160136072 # To
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system.membus.throughput 13160136072 # Throughput (bytes/s)
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system.membus.data_through_bus 3290238 # Total data (bytes)
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system.membus.snoop_data_through_bus 0 # Total snoop data (bytes)
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system.cpu_clk_domain.clock 500 # Clock period in ticks
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system.cpu.dtb.fetch_hits 0 # ITB hits
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system.cpu.dtb.fetch_misses 0 # ITB misses
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system.cpu.dtb.fetch_acv 0 # ITB acv
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@ -1,7 +1,9 @@
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[root]
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type=Root
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children=system
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eventq_index=0
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full_system=false
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sim_quantum=0
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time_sync_enable=false
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time_sync_period=100000000000
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time_sync_spin_threshold=100000000
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@ -12,9 +14,11 @@ children=clk_domain cpu cpu_clk_domain membus physmem voltage_domain
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boot_osflags=a
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cache_line_size=64
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clk_domain=system.clk_domain
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eventq_index=0
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init_param=0
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kernel=
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load_addr_mask=1099511627775
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load_offset=0
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mem_mode=timing
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mem_ranges=
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memories=system.physmem
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@ -33,6 +37,7 @@ system_port=system.membus.slave[0]
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[system.clk_domain]
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type=SrcClockDomain
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clock=1000
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eventq_index=0
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voltage_domain=system.voltage_domain
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[system.cpu]
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@ -45,6 +50,7 @@ do_checkpoint_insts=true
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do_quiesce=true
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do_statistics_insts=true
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dtb=system.cpu.dtb
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eventq_index=0
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function_trace=false
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function_trace_start=0
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interrupts=system.cpu.interrupts
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@ -71,6 +77,7 @@ children=tags
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addr_ranges=0:18446744073709551615
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assoc=2
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clk_domain=system.cpu_clk_domain
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eventq_index=0
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forward_snoops=true
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hit_latency=2
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is_top_level=true
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@ -79,6 +86,7 @@ mshrs=4
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prefetch_on_access=false
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prefetcher=Null
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response_latency=2
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sequential_access=false
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size=262144
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system=system
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tags=system.cpu.dcache.tags
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@ -93,11 +101,14 @@ type=LRU
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assoc=2
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block_size=64
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clk_domain=system.cpu_clk_domain
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eventq_index=0
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hit_latency=2
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sequential_access=false
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size=262144
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[system.cpu.dtb]
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type=AlphaTLB
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eventq_index=0
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size=64
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[system.cpu.icache]
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@ -106,6 +117,7 @@ children=tags
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addr_ranges=0:18446744073709551615
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assoc=2
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clk_domain=system.cpu_clk_domain
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eventq_index=0
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forward_snoops=true
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hit_latency=2
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is_top_level=true
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@ -114,6 +126,7 @@ mshrs=4
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prefetch_on_access=false
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prefetcher=Null
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response_latency=2
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sequential_access=false
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size=131072
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system=system
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tags=system.cpu.icache.tags
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@ -128,17 +141,23 @@ type=LRU
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assoc=2
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block_size=64
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clk_domain=system.cpu_clk_domain
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eventq_index=0
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hit_latency=2
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sequential_access=false
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size=131072
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[system.cpu.interrupts]
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type=AlphaInterrupts
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eventq_index=0
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[system.cpu.isa]
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type=AlphaISA
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eventq_index=0
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system=system
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[system.cpu.itb]
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type=AlphaTLB
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eventq_index=0
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size=48
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[system.cpu.l2cache]
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@ -147,6 +166,7 @@ children=tags
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addr_ranges=0:18446744073709551615
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assoc=8
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clk_domain=system.cpu_clk_domain
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eventq_index=0
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forward_snoops=true
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hit_latency=20
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is_top_level=false
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@ -155,6 +175,7 @@ mshrs=20
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prefetch_on_access=false
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prefetcher=Null
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response_latency=20
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sequential_access=false
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size=2097152
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system=system
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tags=system.cpu.l2cache.tags
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@ -169,12 +190,15 @@ type=LRU
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assoc=8
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block_size=64
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clk_domain=system.cpu_clk_domain
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eventq_index=0
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hit_latency=20
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sequential_access=false
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size=2097152
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[system.cpu.toL2Bus]
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type=CoherentBus
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clk_domain=system.cpu_clk_domain
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eventq_index=0
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header_cycles=1
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system=system
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use_default_range=false
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@ -184,11 +208,13 @@ slave=system.cpu.icache.mem_side system.cpu.dcache.mem_side
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[system.cpu.tracer]
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type=ExeTracer
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eventq_index=0
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[system.cpu.workload]
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type=EioProcess
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chkpt=
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errout=cerr
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eventq_index=0
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file=/dist/m5/regression/test-progs/anagram/bin/alpha/eio/anagram-vshort.eio.gz
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input=None
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max_stack_size=67108864
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@ -198,11 +224,13 @@ system=system
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[system.cpu_clk_domain]
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type=SrcClockDomain
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clock=500
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eventq_index=0
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voltage_domain=system.voltage_domain
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[system.membus]
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type=CoherentBus
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clk_domain=system.clk_domain
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eventq_index=0
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header_cycles=1
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system=system
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use_default_range=false
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@ -215,6 +243,7 @@ type=SimpleMemory
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bandwidth=73.000000
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clk_domain=system.clk_domain
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conf_table_reported=true
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eventq_index=0
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in_addr_map=true
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latency=30000
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latency_var=0
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@ -224,5 +253,6 @@ port=system.membus.master[0]
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[system.voltage_domain]
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type=VoltageDomain
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eventq_index=0
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voltage=1.000000
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@ -1,6 +1,5 @@
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warn: Sockets disabled, not accepting gdb connections
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warn: Prefetch instructions in Alpha do not do anything
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warn: Prefetch instructions in Alpha do not do anything
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hack: be nice to actually delete the event here
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gzip: stdout: Broken pipe
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@ -1,10 +1,8 @@
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Redirecting stdout to build/ALPHA/tests/opt/quick/se/20.eio-short/alpha/eio/simple-timing/simout
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Redirecting stderr to build/ALPHA/tests/opt/quick/se/20.eio-short/alpha/eio/simple-timing/simerr
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gem5 Simulator System. http://gem5.org
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gem5 is copyrighted software; use the --copyright option for details.
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gem5 compiled Sep 24 2013 03:08:53
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gem5 started Sep 28 2013 03:05:39
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gem5 compiled Jan 27 2014 00:31:18
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gem5 started Jan 27 2014 00:31:45
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gem5 executing on zizzer
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command line: build/ALPHA/gem5.opt -d build/ALPHA/tests/opt/quick/se/20.eio-short/alpha/eio/simple-timing -re tests/run.py build/ALPHA/tests/opt/quick/se/20.eio-short/alpha/eio/simple-timing
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Global frequency set at 1000000000000 ticks per second
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@ -4,13 +4,15 @@ sim_seconds 0.000727 # Nu
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sim_ticks 727072000 # Number of ticks simulated
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final_tick 727072000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
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sim_freq 1000000000000 # Frequency of simulated ticks
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host_inst_rate 1590478 # Simulator instruction rate (inst/s)
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host_op_rate 1590395 # Simulator op (including micro ops) rate (op/s)
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host_tick_rate 2312543024 # Simulator tick rate (ticks/s)
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host_mem_usage 227540 # Number of bytes of host memory used
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host_seconds 0.31 # Real time elapsed on the host
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host_inst_rate 600007 # Simulator instruction rate (inst/s)
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host_op_rate 599995 # Simulator op (including micro ops) rate (op/s)
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host_tick_rate 872461045 # Simulator tick rate (ticks/s)
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host_mem_usage 228312 # Number of bytes of host memory used
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host_seconds 0.83 # Real time elapsed on the host
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sim_insts 500001 # Number of instructions simulated
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sim_ops 500001 # Number of ops (including micro ops) simulated
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system.voltage_domain.voltage 1 # Voltage in Volts
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system.clk_domain.clock 1000 # Clock period in ticks
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system.physmem.bytes_read::cpu.inst 25792 # Number of bytes read from this memory
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system.physmem.bytes_read::cpu.data 29056 # Number of bytes read from this memory
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system.physmem.bytes_read::total 54848 # Number of bytes read from this memory
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@ -42,6 +44,7 @@ system.membus.reqLayer0.occupancy 857000 # La
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system.membus.reqLayer0.utilization 0.1 # Layer utilization (%)
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system.membus.respLayer1.occupancy 7713000 # Layer occupancy (ticks)
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system.membus.respLayer1.utilization 1.1 # Layer utilization (%)
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system.cpu_clk_domain.clock 500 # Clock period in ticks
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system.cpu.dtb.fetch_hits 0 # ITB hits
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system.cpu.dtb.fetch_misses 0 # ITB misses
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system.cpu.dtb.fetch_acv 0 # ITB acv
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@ -106,6 +109,11 @@ system.cpu.icache.tags.warmup_cycle 0 # Cy
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system.cpu.icache.tags.occ_blocks::cpu.inst 265.013024 # Average occupied blocks per requestor
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system.cpu.icache.tags.occ_percent::cpu.inst 0.129401 # Average percentage of cache occupancy
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system.cpu.icache.tags.occ_percent::total 0.129401 # Average percentage of cache occupancy
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system.cpu.icache.tags.occ_task_id_blocks::1024 403 # Occupied blocks per task id
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system.cpu.icache.tags.age_task_id_blocks_1024::2 403 # Occupied blocks per task id
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system.cpu.icache.tags.occ_task_id_percent::1024 0.196777 # Percentage of cache occupancy per task id
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system.cpu.icache.tags.tag_accesses 1000443 # Number of tag accesses
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system.cpu.icache.tags.data_accesses 1000443 # Number of data accesses
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system.cpu.icache.ReadReq_hits::cpu.inst 499617 # number of ReadReq hits
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system.cpu.icache.ReadReq_hits::total 499617 # number of ReadReq hits
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system.cpu.icache.demand_hits::cpu.inst 499617 # number of demand (read+write) hits
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@ -186,6 +194,13 @@ system.cpu.l2cache.tags.occ_blocks::cpu.data 216.522338
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system.cpu.l2cache.tags.occ_percent::cpu.inst 0.008088 # Average percentage of cache occupancy
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system.cpu.l2cache.tags.occ_percent::cpu.data 0.006608 # Average percentage of cache occupancy
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system.cpu.l2cache.tags.occ_percent::total 0.014695 # Average percentage of cache occupancy
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system.cpu.l2cache.tags.occ_task_id_blocks::1024 718 # Occupied blocks per task id
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system.cpu.l2cache.tags.age_task_id_blocks_1024::0 1 # Occupied blocks per task id
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system.cpu.l2cache.tags.age_task_id_blocks_1024::1 3 # Occupied blocks per task id
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system.cpu.l2cache.tags.age_task_id_blocks_1024::2 714 # Occupied blocks per task id
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system.cpu.l2cache.tags.occ_task_id_percent::1024 0.021912 # Percentage of cache occupancy per task id
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system.cpu.l2cache.tags.tag_accesses 7713 # Number of tag accesses
|
||||
system.cpu.l2cache.tags.data_accesses 7713 # Number of data accesses
|
||||
system.cpu.l2cache.ReadReq_misses::cpu.inst 403 # number of ReadReq misses
|
||||
system.cpu.l2cache.ReadReq_misses::cpu.data 315 # number of ReadReq misses
|
||||
system.cpu.l2cache.ReadReq_misses::total 718 # number of ReadReq misses
|
||||
|
|
@ -303,6 +318,13 @@ system.cpu.dcache.tags.warmup_cycle 0 # Cy
|
|||
system.cpu.dcache.tags.occ_blocks::cpu.data 287.259400 # Average occupied blocks per requestor
|
||||
system.cpu.dcache.tags.occ_percent::cpu.data 0.070132 # Average percentage of cache occupancy
|
||||
system.cpu.dcache.tags.occ_percent::total 0.070132 # Average percentage of cache occupancy
|
||||
system.cpu.dcache.tags.occ_task_id_blocks::1024 454 # Occupied blocks per task id
|
||||
system.cpu.dcache.tags.age_task_id_blocks_1024::0 2 # Occupied blocks per task id
|
||||
system.cpu.dcache.tags.age_task_id_blocks_1024::1 26 # Occupied blocks per task id
|
||||
system.cpu.dcache.tags.age_task_id_blocks_1024::2 426 # Occupied blocks per task id
|
||||
system.cpu.dcache.tags.occ_task_id_percent::1024 0.110840 # Percentage of cache occupancy per task id
|
||||
system.cpu.dcache.tags.tag_accesses 362004 # Number of tag accesses
|
||||
system.cpu.dcache.tags.data_accesses 362004 # Number of data accesses
|
||||
system.cpu.dcache.ReadReq_hits::cpu.data 124120 # number of ReadReq hits
|
||||
system.cpu.dcache.ReadReq_hits::total 124120 # number of ReadReq hits
|
||||
system.cpu.dcache.WriteReq_hits::cpu.data 56201 # number of WriteReq hits
|
||||
|
|
|
|||
|
|
@ -1,7 +1,9 @@
|
|||
[root]
|
||||
type=Root
|
||||
children=system
|
||||
eventq_index=0
|
||||
full_system=false
|
||||
sim_quantum=0
|
||||
time_sync_enable=false
|
||||
time_sync_period=100000000000
|
||||
time_sync_spin_threshold=100000000
|
||||
|
|
@ -12,9 +14,11 @@ children=clk_domain cpu0 cpu1 cpu2 cpu3 cpu_clk_domain l2c membus physmem toL2Bu
|
|||
boot_osflags=a
|
||||
cache_line_size=64
|
||||
clk_domain=system.clk_domain
|
||||
eventq_index=0
|
||||
init_param=0
|
||||
kernel=
|
||||
load_addr_mask=1099511627775
|
||||
load_offset=0
|
||||
mem_mode=atomic
|
||||
mem_ranges=
|
||||
memories=system.physmem
|
||||
|
|
@ -33,6 +37,7 @@ system_port=system.membus.slave[0]
|
|||
[system.clk_domain]
|
||||
type=SrcClockDomain
|
||||
clock=1000
|
||||
eventq_index=0
|
||||
voltage_domain=system.voltage_domain
|
||||
|
||||
[system.cpu0]
|
||||
|
|
@ -45,6 +50,7 @@ do_checkpoint_insts=true
|
|||
do_quiesce=true
|
||||
do_statistics_insts=true
|
||||
dtb=system.cpu0.dtb
|
||||
eventq_index=0
|
||||
fastmem=false
|
||||
function_trace=false
|
||||
function_trace_start=0
|
||||
|
|
@ -78,6 +84,7 @@ children=tags
|
|||
addr_ranges=0:18446744073709551615
|
||||
assoc=4
|
||||
clk_domain=system.cpu_clk_domain
|
||||
eventq_index=0
|
||||
forward_snoops=true
|
||||
hit_latency=2
|
||||
is_top_level=true
|
||||
|
|
@ -86,6 +93,7 @@ mshrs=4
|
|||
prefetch_on_access=false
|
||||
prefetcher=Null
|
||||
response_latency=2
|
||||
sequential_access=false
|
||||
size=32768
|
||||
system=system
|
||||
tags=system.cpu0.dcache.tags
|
||||
|
|
@ -100,11 +108,14 @@ type=LRU
|
|||
assoc=4
|
||||
block_size=64
|
||||
clk_domain=system.cpu_clk_domain
|
||||
eventq_index=0
|
||||
hit_latency=2
|
||||
sequential_access=false
|
||||
size=32768
|
||||
|
||||
[system.cpu0.dtb]
|
||||
type=AlphaTLB
|
||||
eventq_index=0
|
||||
size=64
|
||||
|
||||
[system.cpu0.icache]
|
||||
|
|
@ -113,6 +124,7 @@ children=tags
|
|||
addr_ranges=0:18446744073709551615
|
||||
assoc=1
|
||||
clk_domain=system.cpu_clk_domain
|
||||
eventq_index=0
|
||||
forward_snoops=true
|
||||
hit_latency=2
|
||||
is_top_level=true
|
||||
|
|
@ -121,6 +133,7 @@ mshrs=4
|
|||
prefetch_on_access=false
|
||||
prefetcher=Null
|
||||
response_latency=2
|
||||
sequential_access=false
|
||||
size=32768
|
||||
system=system
|
||||
tags=system.cpu0.icache.tags
|
||||
|
|
@ -135,26 +148,34 @@ type=LRU
|
|||
assoc=1
|
||||
block_size=64
|
||||
clk_domain=system.cpu_clk_domain
|
||||
eventq_index=0
|
||||
hit_latency=2
|
||||
sequential_access=false
|
||||
size=32768
|
||||
|
||||
[system.cpu0.interrupts]
|
||||
type=AlphaInterrupts
|
||||
eventq_index=0
|
||||
|
||||
[system.cpu0.isa]
|
||||
type=AlphaISA
|
||||
eventq_index=0
|
||||
system=system
|
||||
|
||||
[system.cpu0.itb]
|
||||
type=AlphaTLB
|
||||
eventq_index=0
|
||||
size=48
|
||||
|
||||
[system.cpu0.tracer]
|
||||
type=ExeTracer
|
||||
eventq_index=0
|
||||
|
||||
[system.cpu0.workload]
|
||||
type=EioProcess
|
||||
chkpt=
|
||||
errout=cerr
|
||||
eventq_index=0
|
||||
file=/dist/m5/regression/test-progs/anagram/bin/alpha/eio/anagram-vshort.eio.gz
|
||||
input=None
|
||||
max_stack_size=67108864
|
||||
|
|
@ -171,6 +192,7 @@ do_checkpoint_insts=true
|
|||
do_quiesce=true
|
||||
do_statistics_insts=true
|
||||
dtb=system.cpu1.dtb
|
||||
eventq_index=0
|
||||
fastmem=false
|
||||
function_trace=false
|
||||
function_trace_start=0
|
||||
|
|
@ -204,6 +226,7 @@ children=tags
|
|||
addr_ranges=0:18446744073709551615
|
||||
assoc=4
|
||||
clk_domain=system.cpu_clk_domain
|
||||
eventq_index=0
|
||||
forward_snoops=true
|
||||
hit_latency=2
|
||||
is_top_level=true
|
||||
|
|
@ -212,6 +235,7 @@ mshrs=4
|
|||
prefetch_on_access=false
|
||||
prefetcher=Null
|
||||
response_latency=2
|
||||
sequential_access=false
|
||||
size=32768
|
||||
system=system
|
||||
tags=system.cpu1.dcache.tags
|
||||
|
|
@ -226,11 +250,14 @@ type=LRU
|
|||
assoc=4
|
||||
block_size=64
|
||||
clk_domain=system.cpu_clk_domain
|
||||
eventq_index=0
|
||||
hit_latency=2
|
||||
sequential_access=false
|
||||
size=32768
|
||||
|
||||
[system.cpu1.dtb]
|
||||
type=AlphaTLB
|
||||
eventq_index=0
|
||||
size=64
|
||||
|
||||
[system.cpu1.icache]
|
||||
|
|
@ -239,6 +266,7 @@ children=tags
|
|||
addr_ranges=0:18446744073709551615
|
||||
assoc=1
|
||||
clk_domain=system.cpu_clk_domain
|
||||
eventq_index=0
|
||||
forward_snoops=true
|
||||
hit_latency=2
|
||||
is_top_level=true
|
||||
|
|
@ -247,6 +275,7 @@ mshrs=4
|
|||
prefetch_on_access=false
|
||||
prefetcher=Null
|
||||
response_latency=2
|
||||
sequential_access=false
|
||||
size=32768
|
||||
system=system
|
||||
tags=system.cpu1.icache.tags
|
||||
|
|
@ -261,26 +290,34 @@ type=LRU
|
|||
assoc=1
|
||||
block_size=64
|
||||
clk_domain=system.cpu_clk_domain
|
||||
eventq_index=0
|
||||
hit_latency=2
|
||||
sequential_access=false
|
||||
size=32768
|
||||
|
||||
[system.cpu1.interrupts]
|
||||
type=AlphaInterrupts
|
||||
eventq_index=0
|
||||
|
||||
[system.cpu1.isa]
|
||||
type=AlphaISA
|
||||
eventq_index=0
|
||||
system=system
|
||||
|
||||
[system.cpu1.itb]
|
||||
type=AlphaTLB
|
||||
eventq_index=0
|
||||
size=48
|
||||
|
||||
[system.cpu1.tracer]
|
||||
type=ExeTracer
|
||||
eventq_index=0
|
||||
|
||||
[system.cpu1.workload]
|
||||
type=EioProcess
|
||||
chkpt=
|
||||
errout=cerr
|
||||
eventq_index=0
|
||||
file=/dist/m5/regression/test-progs/anagram/bin/alpha/eio/anagram-vshort.eio.gz
|
||||
input=None
|
||||
max_stack_size=67108864
|
||||
|
|
@ -297,6 +334,7 @@ do_checkpoint_insts=true
|
|||
do_quiesce=true
|
||||
do_statistics_insts=true
|
||||
dtb=system.cpu2.dtb
|
||||
eventq_index=0
|
||||
fastmem=false
|
||||
function_trace=false
|
||||
function_trace_start=0
|
||||
|
|
@ -330,6 +368,7 @@ children=tags
|
|||
addr_ranges=0:18446744073709551615
|
||||
assoc=4
|
||||
clk_domain=system.cpu_clk_domain
|
||||
eventq_index=0
|
||||
forward_snoops=true
|
||||
hit_latency=2
|
||||
is_top_level=true
|
||||
|
|
@ -338,6 +377,7 @@ mshrs=4
|
|||
prefetch_on_access=false
|
||||
prefetcher=Null
|
||||
response_latency=2
|
||||
sequential_access=false
|
||||
size=32768
|
||||
system=system
|
||||
tags=system.cpu2.dcache.tags
|
||||
|
|
@ -352,11 +392,14 @@ type=LRU
|
|||
assoc=4
|
||||
block_size=64
|
||||
clk_domain=system.cpu_clk_domain
|
||||
eventq_index=0
|
||||
hit_latency=2
|
||||
sequential_access=false
|
||||
size=32768
|
||||
|
||||
[system.cpu2.dtb]
|
||||
type=AlphaTLB
|
||||
eventq_index=0
|
||||
size=64
|
||||
|
||||
[system.cpu2.icache]
|
||||
|
|
@ -365,6 +408,7 @@ children=tags
|
|||
addr_ranges=0:18446744073709551615
|
||||
assoc=1
|
||||
clk_domain=system.cpu_clk_domain
|
||||
eventq_index=0
|
||||
forward_snoops=true
|
||||
hit_latency=2
|
||||
is_top_level=true
|
||||
|
|
@ -373,6 +417,7 @@ mshrs=4
|
|||
prefetch_on_access=false
|
||||
prefetcher=Null
|
||||
response_latency=2
|
||||
sequential_access=false
|
||||
size=32768
|
||||
system=system
|
||||
tags=system.cpu2.icache.tags
|
||||
|
|
@ -387,26 +432,34 @@ type=LRU
|
|||
assoc=1
|
||||
block_size=64
|
||||
clk_domain=system.cpu_clk_domain
|
||||
eventq_index=0
|
||||
hit_latency=2
|
||||
sequential_access=false
|
||||
size=32768
|
||||
|
||||
[system.cpu2.interrupts]
|
||||
type=AlphaInterrupts
|
||||
eventq_index=0
|
||||
|
||||
[system.cpu2.isa]
|
||||
type=AlphaISA
|
||||
eventq_index=0
|
||||
system=system
|
||||
|
||||
[system.cpu2.itb]
|
||||
type=AlphaTLB
|
||||
eventq_index=0
|
||||
size=48
|
||||
|
||||
[system.cpu2.tracer]
|
||||
type=ExeTracer
|
||||
eventq_index=0
|
||||
|
||||
[system.cpu2.workload]
|
||||
type=EioProcess
|
||||
chkpt=
|
||||
errout=cerr
|
||||
eventq_index=0
|
||||
file=/dist/m5/regression/test-progs/anagram/bin/alpha/eio/anagram-vshort.eio.gz
|
||||
input=None
|
||||
max_stack_size=67108864
|
||||
|
|
@ -423,6 +476,7 @@ do_checkpoint_insts=true
|
|||
do_quiesce=true
|
||||
do_statistics_insts=true
|
||||
dtb=system.cpu3.dtb
|
||||
eventq_index=0
|
||||
fastmem=false
|
||||
function_trace=false
|
||||
function_trace_start=0
|
||||
|
|
@ -456,6 +510,7 @@ children=tags
|
|||
addr_ranges=0:18446744073709551615
|
||||
assoc=4
|
||||
clk_domain=system.cpu_clk_domain
|
||||
eventq_index=0
|
||||
forward_snoops=true
|
||||
hit_latency=2
|
||||
is_top_level=true
|
||||
|
|
@ -464,6 +519,7 @@ mshrs=4
|
|||
prefetch_on_access=false
|
||||
prefetcher=Null
|
||||
response_latency=2
|
||||
sequential_access=false
|
||||
size=32768
|
||||
system=system
|
||||
tags=system.cpu3.dcache.tags
|
||||
|
|
@ -478,11 +534,14 @@ type=LRU
|
|||
assoc=4
|
||||
block_size=64
|
||||
clk_domain=system.cpu_clk_domain
|
||||
eventq_index=0
|
||||
hit_latency=2
|
||||
sequential_access=false
|
||||
size=32768
|
||||
|
||||
[system.cpu3.dtb]
|
||||
type=AlphaTLB
|
||||
eventq_index=0
|
||||
size=64
|
||||
|
||||
[system.cpu3.icache]
|
||||
|
|
@ -491,6 +550,7 @@ children=tags
|
|||
addr_ranges=0:18446744073709551615
|
||||
assoc=1
|
||||
clk_domain=system.cpu_clk_domain
|
||||
eventq_index=0
|
||||
forward_snoops=true
|
||||
hit_latency=2
|
||||
is_top_level=true
|
||||
|
|
@ -499,6 +559,7 @@ mshrs=4
|
|||
prefetch_on_access=false
|
||||
prefetcher=Null
|
||||
response_latency=2
|
||||
sequential_access=false
|
||||
size=32768
|
||||
system=system
|
||||
tags=system.cpu3.icache.tags
|
||||
|
|
@ -513,26 +574,34 @@ type=LRU
|
|||
assoc=1
|
||||
block_size=64
|
||||
clk_domain=system.cpu_clk_domain
|
||||
eventq_index=0
|
||||
hit_latency=2
|
||||
sequential_access=false
|
||||
size=32768
|
||||
|
||||
[system.cpu3.interrupts]
|
||||
type=AlphaInterrupts
|
||||
eventq_index=0
|
||||
|
||||
[system.cpu3.isa]
|
||||
type=AlphaISA
|
||||
eventq_index=0
|
||||
system=system
|
||||
|
||||
[system.cpu3.itb]
|
||||
type=AlphaTLB
|
||||
eventq_index=0
|
||||
size=48
|
||||
|
||||
[system.cpu3.tracer]
|
||||
type=ExeTracer
|
||||
eventq_index=0
|
||||
|
||||
[system.cpu3.workload]
|
||||
type=EioProcess
|
||||
chkpt=
|
||||
errout=cerr
|
||||
eventq_index=0
|
||||
file=/dist/m5/regression/test-progs/anagram/bin/alpha/eio/anagram-vshort.eio.gz
|
||||
input=None
|
||||
max_stack_size=67108864
|
||||
|
|
@ -542,6 +611,7 @@ system=system
|
|||
[system.cpu_clk_domain]
|
||||
type=SrcClockDomain
|
||||
clock=500
|
||||
eventq_index=0
|
||||
voltage_domain=system.voltage_domain
|
||||
|
||||
[system.l2c]
|
||||
|
|
@ -550,6 +620,7 @@ children=tags
|
|||
addr_ranges=0:18446744073709551615
|
||||
assoc=8
|
||||
clk_domain=system.cpu_clk_domain
|
||||
eventq_index=0
|
||||
forward_snoops=true
|
||||
hit_latency=20
|
||||
is_top_level=false
|
||||
|
|
@ -558,6 +629,7 @@ mshrs=20
|
|||
prefetch_on_access=false
|
||||
prefetcher=Null
|
||||
response_latency=20
|
||||
sequential_access=false
|
||||
size=4194304
|
||||
system=system
|
||||
tags=system.l2c.tags
|
||||
|
|
@ -572,12 +644,15 @@ type=LRU
|
|||
assoc=8
|
||||
block_size=64
|
||||
clk_domain=system.cpu_clk_domain
|
||||
eventq_index=0
|
||||
hit_latency=20
|
||||
sequential_access=false
|
||||
size=4194304
|
||||
|
||||
[system.membus]
|
||||
type=CoherentBus
|
||||
clk_domain=system.clk_domain
|
||||
eventq_index=0
|
||||
header_cycles=1
|
||||
system=system
|
||||
use_default_range=false
|
||||
|
|
@ -590,6 +665,7 @@ type=SimpleMemory
|
|||
bandwidth=73.000000
|
||||
clk_domain=system.clk_domain
|
||||
conf_table_reported=true
|
||||
eventq_index=0
|
||||
in_addr_map=true
|
||||
latency=30000
|
||||
latency_var=0
|
||||
|
|
@ -600,6 +676,7 @@ port=system.membus.master[0]
|
|||
[system.toL2Bus]
|
||||
type=CoherentBus
|
||||
clk_domain=system.cpu_clk_domain
|
||||
eventq_index=0
|
||||
header_cycles=1
|
||||
system=system
|
||||
use_default_range=false
|
||||
|
|
@ -609,5 +686,6 @@ slave=system.cpu0.icache.mem_side system.cpu0.dcache.mem_side system.cpu1.icache
|
|||
|
||||
[system.voltage_domain]
|
||||
type=VoltageDomain
|
||||
eventq_index=0
|
||||
voltage=1.000000
|
||||
|
||||
|
|
|
|||
|
|
@ -1,9 +1,9 @@
|
|||
warn: Sockets disabled, not accepting gdb connections
|
||||
warn: Prefetch instructions in Alpha do not do anything
|
||||
warn: Prefetch instructions in Alpha do not do anything
|
||||
hack: be nice to actually delete the event here
|
||||
|
||||
gzip: stdout: Broken pipe
|
||||
|
||||
gzip: stdout: Broken pipe
|
||||
stdout: Broken pipe
|
||||
stdout: Broken pipe
|
||||
|
||||
gzip: stdout: Broken pipe
|
||||
|
|
|
|||
|
|
@ -1,10 +1,8 @@
|
|||
Redirecting stdout to build/ALPHA/tests/opt/quick/se/30.eio-mp/alpha/eio/simple-atomic-mp/simout
|
||||
Redirecting stderr to build/ALPHA/tests/opt/quick/se/30.eio-mp/alpha/eio/simple-atomic-mp/simerr
|
||||
gem5 Simulator System. http://gem5.org
|
||||
gem5 is copyrighted software; use the --copyright option for details.
|
||||
|
||||
gem5 compiled Sep 24 2013 03:08:53
|
||||
gem5 started Sep 28 2013 03:05:39
|
||||
gem5 compiled Jan 27 2014 00:31:18
|
||||
gem5 started Jan 27 2014 00:31:45
|
||||
gem5 executing on zizzer
|
||||
command line: build/ALPHA/gem5.opt -d build/ALPHA/tests/opt/quick/se/30.eio-mp/alpha/eio/simple-atomic-mp -re tests/run.py build/ALPHA/tests/opt/quick/se/30.eio-mp/alpha/eio/simple-atomic-mp
|
||||
Global frequency set at 1000000000000 ticks per second
|
||||
|
|
|
|||
|
|
@ -4,13 +4,15 @@ sim_seconds 0.000250 # Nu
|
|||
sim_ticks 250015500 # Number of ticks simulated
|
||||
final_tick 250015500 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
|
||||
sim_freq 1000000000000 # Frequency of simulated ticks
|
||||
host_inst_rate 2981071 # Simulator instruction rate (inst/s)
|
||||
host_op_rate 2980990 # Simulator op (including micro ops) rate (op/s)
|
||||
host_tick_rate 372637325 # Simulator tick rate (ticks/s)
|
||||
host_mem_usage 238220 # Number of bytes of host memory used
|
||||
host_seconds 0.67 # Real time elapsed on the host
|
||||
host_inst_rate 1790234 # Simulator instruction rate (inst/s)
|
||||
host_op_rate 1790191 # Simulator op (including micro ops) rate (op/s)
|
||||
host_tick_rate 223782241 # Simulator tick rate (ticks/s)
|
||||
host_mem_usage 240228 # Number of bytes of host memory used
|
||||
host_seconds 1.12 # Real time elapsed on the host
|
||||
sim_insts 2000004 # Number of instructions simulated
|
||||
sim_ops 2000004 # Number of ops (including micro ops) simulated
|
||||
system.voltage_domain.voltage 1 # Voltage in Volts
|
||||
system.clk_domain.clock 1000 # Clock period in ticks
|
||||
system.physmem.bytes_read::cpu0.inst 25792 # Number of bytes read from this memory
|
||||
system.physmem.bytes_read::cpu0.data 29056 # Number of bytes read from this memory
|
||||
system.physmem.bytes_read::cpu1.inst 25792 # Number of bytes read from this memory
|
||||
|
|
@ -60,6 +62,7 @@ system.physmem.bw_total::total 877513594 # To
|
|||
system.membus.throughput 877513594 # Throughput (bytes/s)
|
||||
system.membus.data_through_bus 219392 # Total data (bytes)
|
||||
system.membus.snoop_data_through_bus 0 # Total snoop data (bytes)
|
||||
system.cpu_clk_domain.clock 500 # Clock period in ticks
|
||||
system.l2c.tags.replacements 0 # number of replacements
|
||||
system.l2c.tags.tagsinuse 1962.780232 # Cycle average of tags in use
|
||||
system.l2c.tags.total_refs 332 # Total number of references to valid blocks.
|
||||
|
|
@ -85,6 +88,13 @@ system.l2c.tags.occ_percent::cpu2.data 0.003344 # Av
|
|||
system.l2c.tags.occ_percent::cpu3.inst 0.004076 # Average percentage of cache occupancy
|
||||
system.l2c.tags.occ_percent::cpu3.data 0.003344 # Average percentage of cache occupancy
|
||||
system.l2c.tags.occ_percent::total 0.029950 # Average percentage of cache occupancy
|
||||
system.l2c.tags.occ_task_id_blocks::1024 2932 # Occupied blocks per task id
|
||||
system.l2c.tags.age_task_id_blocks_1024::0 8 # Occupied blocks per task id
|
||||
system.l2c.tags.age_task_id_blocks_1024::1 1088 # Occupied blocks per task id
|
||||
system.l2c.tags.age_task_id_blocks_1024::2 1836 # Occupied blocks per task id
|
||||
system.l2c.tags.occ_task_id_percent::1024 0.044739 # Percentage of cache occupancy per task id
|
||||
system.l2c.tags.tag_accesses 34048 # Number of tag accesses
|
||||
system.l2c.tags.data_accesses 34048 # Number of data accesses
|
||||
system.l2c.ReadReq_hits::cpu0.inst 60 # number of ReadReq hits
|
||||
system.l2c.ReadReq_hits::cpu0.data 9 # number of ReadReq hits
|
||||
system.l2c.ReadReq_hits::cpu1.inst 60 # number of ReadReq hits
|
||||
|
|
@ -288,6 +298,12 @@ system.cpu0.icache.tags.warmup_cycle 0 # Cy
|
|||
system.cpu0.icache.tags.occ_blocks::cpu0.inst 218.086151 # Average occupied blocks per requestor
|
||||
system.cpu0.icache.tags.occ_percent::cpu0.inst 0.425950 # Average percentage of cache occupancy
|
||||
system.cpu0.icache.tags.occ_percent::total 0.425950 # Average percentage of cache occupancy
|
||||
system.cpu0.icache.tags.occ_task_id_blocks::1024 311 # Occupied blocks per task id
|
||||
system.cpu0.icache.tags.age_task_id_blocks_1024::1 190 # Occupied blocks per task id
|
||||
system.cpu0.icache.tags.age_task_id_blocks_1024::2 121 # Occupied blocks per task id
|
||||
system.cpu0.icache.tags.occ_task_id_percent::1024 0.607422 # Percentage of cache occupancy per task id
|
||||
system.cpu0.icache.tags.tag_accesses 500482 # Number of tag accesses
|
||||
system.cpu0.icache.tags.data_accesses 500482 # Number of data accesses
|
||||
system.cpu0.icache.ReadReq_hits::cpu0.inst 499556 # number of ReadReq hits
|
||||
system.cpu0.icache.ReadReq_hits::total 499556 # number of ReadReq hits
|
||||
system.cpu0.icache.demand_hits::cpu0.inst 499556 # number of demand (read+write) hits
|
||||
|
|
@ -330,6 +346,13 @@ system.cpu0.dcache.tags.warmup_cycle 0 # Cy
|
|||
system.cpu0.dcache.tags.occ_blocks::cpu0.data 276.872320 # Average occupied blocks per requestor
|
||||
system.cpu0.dcache.tags.occ_percent::cpu0.data 0.540766 # Average percentage of cache occupancy
|
||||
system.cpu0.dcache.tags.occ_percent::total 0.540766 # Average percentage of cache occupancy
|
||||
system.cpu0.dcache.tags.occ_task_id_blocks::1024 402 # Occupied blocks per task id
|
||||
system.cpu0.dcache.tags.age_task_id_blocks_1024::0 16 # Occupied blocks per task id
|
||||
system.cpu0.dcache.tags.age_task_id_blocks_1024::1 138 # Occupied blocks per task id
|
||||
system.cpu0.dcache.tags.age_task_id_blocks_1024::2 248 # Occupied blocks per task id
|
||||
system.cpu0.dcache.tags.occ_task_id_percent::1024 0.785156 # Percentage of cache occupancy per task id
|
||||
system.cpu0.dcache.tags.tag_accesses 723563 # Number of tag accesses
|
||||
system.cpu0.dcache.tags.data_accesses 723563 # Number of data accesses
|
||||
system.cpu0.dcache.ReadReq_hits::cpu0.data 124111 # number of ReadReq hits
|
||||
system.cpu0.dcache.ReadReq_hits::total 124111 # number of ReadReq hits
|
||||
system.cpu0.dcache.WriteReq_hits::cpu0.data 56201 # number of WriteReq hits
|
||||
|
|
@ -437,6 +460,12 @@ system.cpu1.icache.tags.warmup_cycle 0 # Cy
|
|||
system.cpu1.icache.tags.occ_blocks::cpu1.inst 218.086151 # Average occupied blocks per requestor
|
||||
system.cpu1.icache.tags.occ_percent::cpu1.inst 0.425950 # Average percentage of cache occupancy
|
||||
system.cpu1.icache.tags.occ_percent::total 0.425950 # Average percentage of cache occupancy
|
||||
system.cpu1.icache.tags.occ_task_id_blocks::1024 311 # Occupied blocks per task id
|
||||
system.cpu1.icache.tags.age_task_id_blocks_1024::1 190 # Occupied blocks per task id
|
||||
system.cpu1.icache.tags.age_task_id_blocks_1024::2 121 # Occupied blocks per task id
|
||||
system.cpu1.icache.tags.occ_task_id_percent::1024 0.607422 # Percentage of cache occupancy per task id
|
||||
system.cpu1.icache.tags.tag_accesses 500482 # Number of tag accesses
|
||||
system.cpu1.icache.tags.data_accesses 500482 # Number of data accesses
|
||||
system.cpu1.icache.ReadReq_hits::cpu1.inst 499556 # number of ReadReq hits
|
||||
system.cpu1.icache.ReadReq_hits::total 499556 # number of ReadReq hits
|
||||
system.cpu1.icache.demand_hits::cpu1.inst 499556 # number of demand (read+write) hits
|
||||
|
|
@ -479,6 +508,13 @@ system.cpu1.dcache.tags.warmup_cycle 0 # Cy
|
|||
system.cpu1.dcache.tags.occ_blocks::cpu1.data 276.872320 # Average occupied blocks per requestor
|
||||
system.cpu1.dcache.tags.occ_percent::cpu1.data 0.540766 # Average percentage of cache occupancy
|
||||
system.cpu1.dcache.tags.occ_percent::total 0.540766 # Average percentage of cache occupancy
|
||||
system.cpu1.dcache.tags.occ_task_id_blocks::1024 402 # Occupied blocks per task id
|
||||
system.cpu1.dcache.tags.age_task_id_blocks_1024::0 16 # Occupied blocks per task id
|
||||
system.cpu1.dcache.tags.age_task_id_blocks_1024::1 138 # Occupied blocks per task id
|
||||
system.cpu1.dcache.tags.age_task_id_blocks_1024::2 248 # Occupied blocks per task id
|
||||
system.cpu1.dcache.tags.occ_task_id_percent::1024 0.785156 # Percentage of cache occupancy per task id
|
||||
system.cpu1.dcache.tags.tag_accesses 723563 # Number of tag accesses
|
||||
system.cpu1.dcache.tags.data_accesses 723563 # Number of data accesses
|
||||
system.cpu1.dcache.ReadReq_hits::cpu1.data 124111 # number of ReadReq hits
|
||||
system.cpu1.dcache.ReadReq_hits::total 124111 # number of ReadReq hits
|
||||
system.cpu1.dcache.WriteReq_hits::cpu1.data 56201 # number of WriteReq hits
|
||||
|
|
@ -586,6 +622,12 @@ system.cpu2.icache.tags.warmup_cycle 0 # Cy
|
|||
system.cpu2.icache.tags.occ_blocks::cpu2.inst 218.086151 # Average occupied blocks per requestor
|
||||
system.cpu2.icache.tags.occ_percent::cpu2.inst 0.425950 # Average percentage of cache occupancy
|
||||
system.cpu2.icache.tags.occ_percent::total 0.425950 # Average percentage of cache occupancy
|
||||
system.cpu2.icache.tags.occ_task_id_blocks::1024 311 # Occupied blocks per task id
|
||||
system.cpu2.icache.tags.age_task_id_blocks_1024::1 190 # Occupied blocks per task id
|
||||
system.cpu2.icache.tags.age_task_id_blocks_1024::2 121 # Occupied blocks per task id
|
||||
system.cpu2.icache.tags.occ_task_id_percent::1024 0.607422 # Percentage of cache occupancy per task id
|
||||
system.cpu2.icache.tags.tag_accesses 500482 # Number of tag accesses
|
||||
system.cpu2.icache.tags.data_accesses 500482 # Number of data accesses
|
||||
system.cpu2.icache.ReadReq_hits::cpu2.inst 499556 # number of ReadReq hits
|
||||
system.cpu2.icache.ReadReq_hits::total 499556 # number of ReadReq hits
|
||||
system.cpu2.icache.demand_hits::cpu2.inst 499556 # number of demand (read+write) hits
|
||||
|
|
@ -628,6 +670,13 @@ system.cpu2.dcache.tags.warmup_cycle 0 # Cy
|
|||
system.cpu2.dcache.tags.occ_blocks::cpu2.data 276.872320 # Average occupied blocks per requestor
|
||||
system.cpu2.dcache.tags.occ_percent::cpu2.data 0.540766 # Average percentage of cache occupancy
|
||||
system.cpu2.dcache.tags.occ_percent::total 0.540766 # Average percentage of cache occupancy
|
||||
system.cpu2.dcache.tags.occ_task_id_blocks::1024 402 # Occupied blocks per task id
|
||||
system.cpu2.dcache.tags.age_task_id_blocks_1024::0 16 # Occupied blocks per task id
|
||||
system.cpu2.dcache.tags.age_task_id_blocks_1024::1 138 # Occupied blocks per task id
|
||||
system.cpu2.dcache.tags.age_task_id_blocks_1024::2 248 # Occupied blocks per task id
|
||||
system.cpu2.dcache.tags.occ_task_id_percent::1024 0.785156 # Percentage of cache occupancy per task id
|
||||
system.cpu2.dcache.tags.tag_accesses 723563 # Number of tag accesses
|
||||
system.cpu2.dcache.tags.data_accesses 723563 # Number of data accesses
|
||||
system.cpu2.dcache.ReadReq_hits::cpu2.data 124111 # number of ReadReq hits
|
||||
system.cpu2.dcache.ReadReq_hits::total 124111 # number of ReadReq hits
|
||||
system.cpu2.dcache.WriteReq_hits::cpu2.data 56201 # number of WriteReq hits
|
||||
|
|
@ -735,6 +784,12 @@ system.cpu3.icache.tags.warmup_cycle 0 # Cy
|
|||
system.cpu3.icache.tags.occ_blocks::cpu3.inst 218.086151 # Average occupied blocks per requestor
|
||||
system.cpu3.icache.tags.occ_percent::cpu3.inst 0.425950 # Average percentage of cache occupancy
|
||||
system.cpu3.icache.tags.occ_percent::total 0.425950 # Average percentage of cache occupancy
|
||||
system.cpu3.icache.tags.occ_task_id_blocks::1024 311 # Occupied blocks per task id
|
||||
system.cpu3.icache.tags.age_task_id_blocks_1024::1 190 # Occupied blocks per task id
|
||||
system.cpu3.icache.tags.age_task_id_blocks_1024::2 121 # Occupied blocks per task id
|
||||
system.cpu3.icache.tags.occ_task_id_percent::1024 0.607422 # Percentage of cache occupancy per task id
|
||||
system.cpu3.icache.tags.tag_accesses 500482 # Number of tag accesses
|
||||
system.cpu3.icache.tags.data_accesses 500482 # Number of data accesses
|
||||
system.cpu3.icache.ReadReq_hits::cpu3.inst 499556 # number of ReadReq hits
|
||||
system.cpu3.icache.ReadReq_hits::total 499556 # number of ReadReq hits
|
||||
system.cpu3.icache.demand_hits::cpu3.inst 499556 # number of demand (read+write) hits
|
||||
|
|
@ -777,6 +832,13 @@ system.cpu3.dcache.tags.warmup_cycle 0 # Cy
|
|||
system.cpu3.dcache.tags.occ_blocks::cpu3.data 276.872320 # Average occupied blocks per requestor
|
||||
system.cpu3.dcache.tags.occ_percent::cpu3.data 0.540766 # Average percentage of cache occupancy
|
||||
system.cpu3.dcache.tags.occ_percent::total 0.540766 # Average percentage of cache occupancy
|
||||
system.cpu3.dcache.tags.occ_task_id_blocks::1024 402 # Occupied blocks per task id
|
||||
system.cpu3.dcache.tags.age_task_id_blocks_1024::0 16 # Occupied blocks per task id
|
||||
system.cpu3.dcache.tags.age_task_id_blocks_1024::1 138 # Occupied blocks per task id
|
||||
system.cpu3.dcache.tags.age_task_id_blocks_1024::2 248 # Occupied blocks per task id
|
||||
system.cpu3.dcache.tags.occ_task_id_percent::1024 0.785156 # Percentage of cache occupancy per task id
|
||||
system.cpu3.dcache.tags.tag_accesses 723563 # Number of tag accesses
|
||||
system.cpu3.dcache.tags.data_accesses 723563 # Number of data accesses
|
||||
system.cpu3.dcache.ReadReq_hits::cpu3.data 124111 # number of ReadReq hits
|
||||
system.cpu3.dcache.ReadReq_hits::total 124111 # number of ReadReq hits
|
||||
system.cpu3.dcache.WriteReq_hits::cpu3.data 56201 # number of WriteReq hits
|
||||
|
|
|
|||
|
|
@ -1,7 +1,9 @@
|
|||
[root]
|
||||
type=Root
|
||||
children=system
|
||||
eventq_index=0
|
||||
full_system=false
|
||||
sim_quantum=0
|
||||
time_sync_enable=false
|
||||
time_sync_period=100000000000
|
||||
time_sync_spin_threshold=100000000
|
||||
|
|
@ -12,9 +14,11 @@ children=clk_domain cpu0 cpu1 cpu2 cpu3 cpu_clk_domain l2c membus physmem toL2Bu
|
|||
boot_osflags=a
|
||||
cache_line_size=64
|
||||
clk_domain=system.clk_domain
|
||||
eventq_index=0
|
||||
init_param=0
|
||||
kernel=
|
||||
load_addr_mask=1099511627775
|
||||
load_offset=0
|
||||
mem_mode=timing
|
||||
mem_ranges=
|
||||
memories=system.physmem
|
||||
|
|
@ -33,6 +37,7 @@ system_port=system.membus.slave[0]
|
|||
[system.clk_domain]
|
||||
type=SrcClockDomain
|
||||
clock=1000
|
||||
eventq_index=0
|
||||
voltage_domain=system.voltage_domain
|
||||
|
||||
[system.cpu0]
|
||||
|
|
@ -45,6 +50,7 @@ do_checkpoint_insts=true
|
|||
do_quiesce=true
|
||||
do_statistics_insts=true
|
||||
dtb=system.cpu0.dtb
|
||||
eventq_index=0
|
||||
function_trace=false
|
||||
function_trace_start=0
|
||||
interrupts=system.cpu0.interrupts
|
||||
|
|
@ -71,6 +77,7 @@ children=tags
|
|||
addr_ranges=0:18446744073709551615
|
||||
assoc=4
|
||||
clk_domain=system.cpu_clk_domain
|
||||
eventq_index=0
|
||||
forward_snoops=true
|
||||
hit_latency=2
|
||||
is_top_level=true
|
||||
|
|
@ -79,6 +86,7 @@ mshrs=4
|
|||
prefetch_on_access=false
|
||||
prefetcher=Null
|
||||
response_latency=2
|
||||
sequential_access=false
|
||||
size=32768
|
||||
system=system
|
||||
tags=system.cpu0.dcache.tags
|
||||
|
|
@ -93,11 +101,14 @@ type=LRU
|
|||
assoc=4
|
||||
block_size=64
|
||||
clk_domain=system.cpu_clk_domain
|
||||
eventq_index=0
|
||||
hit_latency=2
|
||||
sequential_access=false
|
||||
size=32768
|
||||
|
||||
[system.cpu0.dtb]
|
||||
type=AlphaTLB
|
||||
eventq_index=0
|
||||
size=64
|
||||
|
||||
[system.cpu0.icache]
|
||||
|
|
@ -106,6 +117,7 @@ children=tags
|
|||
addr_ranges=0:18446744073709551615
|
||||
assoc=1
|
||||
clk_domain=system.cpu_clk_domain
|
||||
eventq_index=0
|
||||
forward_snoops=true
|
||||
hit_latency=2
|
||||
is_top_level=true
|
||||
|
|
@ -114,6 +126,7 @@ mshrs=4
|
|||
prefetch_on_access=false
|
||||
prefetcher=Null
|
||||
response_latency=2
|
||||
sequential_access=false
|
||||
size=32768
|
||||
system=system
|
||||
tags=system.cpu0.icache.tags
|
||||
|
|
@ -128,26 +141,34 @@ type=LRU
|
|||
assoc=1
|
||||
block_size=64
|
||||
clk_domain=system.cpu_clk_domain
|
||||
eventq_index=0
|
||||
hit_latency=2
|
||||
sequential_access=false
|
||||
size=32768
|
||||
|
||||
[system.cpu0.interrupts]
|
||||
type=AlphaInterrupts
|
||||
eventq_index=0
|
||||
|
||||
[system.cpu0.isa]
|
||||
type=AlphaISA
|
||||
eventq_index=0
|
||||
system=system
|
||||
|
||||
[system.cpu0.itb]
|
||||
type=AlphaTLB
|
||||
eventq_index=0
|
||||
size=48
|
||||
|
||||
[system.cpu0.tracer]
|
||||
type=ExeTracer
|
||||
eventq_index=0
|
||||
|
||||
[system.cpu0.workload]
|
||||
type=EioProcess
|
||||
chkpt=
|
||||
errout=cerr
|
||||
eventq_index=0
|
||||
file=/dist/m5/regression/test-progs/anagram/bin/alpha/eio/anagram-vshort.eio.gz
|
||||
input=None
|
||||
max_stack_size=67108864
|
||||
|
|
@ -164,6 +185,7 @@ do_checkpoint_insts=true
|
|||
do_quiesce=true
|
||||
do_statistics_insts=true
|
||||
dtb=system.cpu1.dtb
|
||||
eventq_index=0
|
||||
function_trace=false
|
||||
function_trace_start=0
|
||||
interrupts=system.cpu1.interrupts
|
||||
|
|
@ -190,6 +212,7 @@ children=tags
|
|||
addr_ranges=0:18446744073709551615
|
||||
assoc=4
|
||||
clk_domain=system.cpu_clk_domain
|
||||
eventq_index=0
|
||||
forward_snoops=true
|
||||
hit_latency=2
|
||||
is_top_level=true
|
||||
|
|
@ -198,6 +221,7 @@ mshrs=4
|
|||
prefetch_on_access=false
|
||||
prefetcher=Null
|
||||
response_latency=2
|
||||
sequential_access=false
|
||||
size=32768
|
||||
system=system
|
||||
tags=system.cpu1.dcache.tags
|
||||
|
|
@ -212,11 +236,14 @@ type=LRU
|
|||
assoc=4
|
||||
block_size=64
|
||||
clk_domain=system.cpu_clk_domain
|
||||
eventq_index=0
|
||||
hit_latency=2
|
||||
sequential_access=false
|
||||
size=32768
|
||||
|
||||
[system.cpu1.dtb]
|
||||
type=AlphaTLB
|
||||
eventq_index=0
|
||||
size=64
|
||||
|
||||
[system.cpu1.icache]
|
||||
|
|
@ -225,6 +252,7 @@ children=tags
|
|||
addr_ranges=0:18446744073709551615
|
||||
assoc=1
|
||||
clk_domain=system.cpu_clk_domain
|
||||
eventq_index=0
|
||||
forward_snoops=true
|
||||
hit_latency=2
|
||||
is_top_level=true
|
||||
|
|
@ -233,6 +261,7 @@ mshrs=4
|
|||
prefetch_on_access=false
|
||||
prefetcher=Null
|
||||
response_latency=2
|
||||
sequential_access=false
|
||||
size=32768
|
||||
system=system
|
||||
tags=system.cpu1.icache.tags
|
||||
|
|
@ -247,26 +276,34 @@ type=LRU
|
|||
assoc=1
|
||||
block_size=64
|
||||
clk_domain=system.cpu_clk_domain
|
||||
eventq_index=0
|
||||
hit_latency=2
|
||||
sequential_access=false
|
||||
size=32768
|
||||
|
||||
[system.cpu1.interrupts]
|
||||
type=AlphaInterrupts
|
||||
eventq_index=0
|
||||
|
||||
[system.cpu1.isa]
|
||||
type=AlphaISA
|
||||
eventq_index=0
|
||||
system=system
|
||||
|
||||
[system.cpu1.itb]
|
||||
type=AlphaTLB
|
||||
eventq_index=0
|
||||
size=48
|
||||
|
||||
[system.cpu1.tracer]
|
||||
type=ExeTracer
|
||||
eventq_index=0
|
||||
|
||||
[system.cpu1.workload]
|
||||
type=EioProcess
|
||||
chkpt=
|
||||
errout=cerr
|
||||
eventq_index=0
|
||||
file=/dist/m5/regression/test-progs/anagram/bin/alpha/eio/anagram-vshort.eio.gz
|
||||
input=None
|
||||
max_stack_size=67108864
|
||||
|
|
@ -283,6 +320,7 @@ do_checkpoint_insts=true
|
|||
do_quiesce=true
|
||||
do_statistics_insts=true
|
||||
dtb=system.cpu2.dtb
|
||||
eventq_index=0
|
||||
function_trace=false
|
||||
function_trace_start=0
|
||||
interrupts=system.cpu2.interrupts
|
||||
|
|
@ -309,6 +347,7 @@ children=tags
|
|||
addr_ranges=0:18446744073709551615
|
||||
assoc=4
|
||||
clk_domain=system.cpu_clk_domain
|
||||
eventq_index=0
|
||||
forward_snoops=true
|
||||
hit_latency=2
|
||||
is_top_level=true
|
||||
|
|
@ -317,6 +356,7 @@ mshrs=4
|
|||
prefetch_on_access=false
|
||||
prefetcher=Null
|
||||
response_latency=2
|
||||
sequential_access=false
|
||||
size=32768
|
||||
system=system
|
||||
tags=system.cpu2.dcache.tags
|
||||
|
|
@ -331,11 +371,14 @@ type=LRU
|
|||
assoc=4
|
||||
block_size=64
|
||||
clk_domain=system.cpu_clk_domain
|
||||
eventq_index=0
|
||||
hit_latency=2
|
||||
sequential_access=false
|
||||
size=32768
|
||||
|
||||
[system.cpu2.dtb]
|
||||
type=AlphaTLB
|
||||
eventq_index=0
|
||||
size=64
|
||||
|
||||
[system.cpu2.icache]
|
||||
|
|
@ -344,6 +387,7 @@ children=tags
|
|||
addr_ranges=0:18446744073709551615
|
||||
assoc=1
|
||||
clk_domain=system.cpu_clk_domain
|
||||
eventq_index=0
|
||||
forward_snoops=true
|
||||
hit_latency=2
|
||||
is_top_level=true
|
||||
|
|
@ -352,6 +396,7 @@ mshrs=4
|
|||
prefetch_on_access=false
|
||||
prefetcher=Null
|
||||
response_latency=2
|
||||
sequential_access=false
|
||||
size=32768
|
||||
system=system
|
||||
tags=system.cpu2.icache.tags
|
||||
|
|
@ -366,26 +411,34 @@ type=LRU
|
|||
assoc=1
|
||||
block_size=64
|
||||
clk_domain=system.cpu_clk_domain
|
||||
eventq_index=0
|
||||
hit_latency=2
|
||||
sequential_access=false
|
||||
size=32768
|
||||
|
||||
[system.cpu2.interrupts]
|
||||
type=AlphaInterrupts
|
||||
eventq_index=0
|
||||
|
||||
[system.cpu2.isa]
|
||||
type=AlphaISA
|
||||
eventq_index=0
|
||||
system=system
|
||||
|
||||
[system.cpu2.itb]
|
||||
type=AlphaTLB
|
||||
eventq_index=0
|
||||
size=48
|
||||
|
||||
[system.cpu2.tracer]
|
||||
type=ExeTracer
|
||||
eventq_index=0
|
||||
|
||||
[system.cpu2.workload]
|
||||
type=EioProcess
|
||||
chkpt=
|
||||
errout=cerr
|
||||
eventq_index=0
|
||||
file=/dist/m5/regression/test-progs/anagram/bin/alpha/eio/anagram-vshort.eio.gz
|
||||
input=None
|
||||
max_stack_size=67108864
|
||||
|
|
@ -402,6 +455,7 @@ do_checkpoint_insts=true
|
|||
do_quiesce=true
|
||||
do_statistics_insts=true
|
||||
dtb=system.cpu3.dtb
|
||||
eventq_index=0
|
||||
function_trace=false
|
||||
function_trace_start=0
|
||||
interrupts=system.cpu3.interrupts
|
||||
|
|
@ -428,6 +482,7 @@ children=tags
|
|||
addr_ranges=0:18446744073709551615
|
||||
assoc=4
|
||||
clk_domain=system.cpu_clk_domain
|
||||
eventq_index=0
|
||||
forward_snoops=true
|
||||
hit_latency=2
|
||||
is_top_level=true
|
||||
|
|
@ -436,6 +491,7 @@ mshrs=4
|
|||
prefetch_on_access=false
|
||||
prefetcher=Null
|
||||
response_latency=2
|
||||
sequential_access=false
|
||||
size=32768
|
||||
system=system
|
||||
tags=system.cpu3.dcache.tags
|
||||
|
|
@ -450,11 +506,14 @@ type=LRU
|
|||
assoc=4
|
||||
block_size=64
|
||||
clk_domain=system.cpu_clk_domain
|
||||
eventq_index=0
|
||||
hit_latency=2
|
||||
sequential_access=false
|
||||
size=32768
|
||||
|
||||
[system.cpu3.dtb]
|
||||
type=AlphaTLB
|
||||
eventq_index=0
|
||||
size=64
|
||||
|
||||
[system.cpu3.icache]
|
||||
|
|
@ -463,6 +522,7 @@ children=tags
|
|||
addr_ranges=0:18446744073709551615
|
||||
assoc=1
|
||||
clk_domain=system.cpu_clk_domain
|
||||
eventq_index=0
|
||||
forward_snoops=true
|
||||
hit_latency=2
|
||||
is_top_level=true
|
||||
|
|
@ -471,6 +531,7 @@ mshrs=4
|
|||
prefetch_on_access=false
|
||||
prefetcher=Null
|
||||
response_latency=2
|
||||
sequential_access=false
|
||||
size=32768
|
||||
system=system
|
||||
tags=system.cpu3.icache.tags
|
||||
|
|
@ -485,26 +546,34 @@ type=LRU
|
|||
assoc=1
|
||||
block_size=64
|
||||
clk_domain=system.cpu_clk_domain
|
||||
eventq_index=0
|
||||
hit_latency=2
|
||||
sequential_access=false
|
||||
size=32768
|
||||
|
||||
[system.cpu3.interrupts]
|
||||
type=AlphaInterrupts
|
||||
eventq_index=0
|
||||
|
||||
[system.cpu3.isa]
|
||||
type=AlphaISA
|
||||
eventq_index=0
|
||||
system=system
|
||||
|
||||
[system.cpu3.itb]
|
||||
type=AlphaTLB
|
||||
eventq_index=0
|
||||
size=48
|
||||
|
||||
[system.cpu3.tracer]
|
||||
type=ExeTracer
|
||||
eventq_index=0
|
||||
|
||||
[system.cpu3.workload]
|
||||
type=EioProcess
|
||||
chkpt=
|
||||
errout=cerr
|
||||
eventq_index=0
|
||||
file=/dist/m5/regression/test-progs/anagram/bin/alpha/eio/anagram-vshort.eio.gz
|
||||
input=None
|
||||
max_stack_size=67108864
|
||||
|
|
@ -514,6 +583,7 @@ system=system
|
|||
[system.cpu_clk_domain]
|
||||
type=SrcClockDomain
|
||||
clock=500
|
||||
eventq_index=0
|
||||
voltage_domain=system.voltage_domain
|
||||
|
||||
[system.l2c]
|
||||
|
|
@ -522,6 +592,7 @@ children=tags
|
|||
addr_ranges=0:18446744073709551615
|
||||
assoc=8
|
||||
clk_domain=system.cpu_clk_domain
|
||||
eventq_index=0
|
||||
forward_snoops=true
|
||||
hit_latency=20
|
||||
is_top_level=false
|
||||
|
|
@ -530,6 +601,7 @@ mshrs=20
|
|||
prefetch_on_access=false
|
||||
prefetcher=Null
|
||||
response_latency=20
|
||||
sequential_access=false
|
||||
size=4194304
|
||||
system=system
|
||||
tags=system.l2c.tags
|
||||
|
|
@ -544,12 +616,15 @@ type=LRU
|
|||
assoc=8
|
||||
block_size=64
|
||||
clk_domain=system.cpu_clk_domain
|
||||
eventq_index=0
|
||||
hit_latency=20
|
||||
sequential_access=false
|
||||
size=4194304
|
||||
|
||||
[system.membus]
|
||||
type=CoherentBus
|
||||
clk_domain=system.clk_domain
|
||||
eventq_index=0
|
||||
header_cycles=1
|
||||
system=system
|
||||
use_default_range=false
|
||||
|
|
@ -562,6 +637,7 @@ type=SimpleMemory
|
|||
bandwidth=73.000000
|
||||
clk_domain=system.clk_domain
|
||||
conf_table_reported=true
|
||||
eventq_index=0
|
||||
in_addr_map=true
|
||||
latency=30000
|
||||
latency_var=0
|
||||
|
|
@ -572,6 +648,7 @@ port=system.membus.master[0]
|
|||
[system.toL2Bus]
|
||||
type=CoherentBus
|
||||
clk_domain=system.cpu_clk_domain
|
||||
eventq_index=0
|
||||
header_cycles=1
|
||||
system=system
|
||||
use_default_range=false
|
||||
|
|
@ -581,5 +658,6 @@ slave=system.cpu0.icache.mem_side system.cpu0.dcache.mem_side system.cpu1.icache
|
|||
|
||||
[system.voltage_domain]
|
||||
type=VoltageDomain
|
||||
eventq_index=0
|
||||
voltage=1.000000
|
||||
|
||||
|
|
|
|||
|
|
@ -1,9 +1,6 @@
|
|||
warn: Sockets disabled, not accepting gdb connections
|
||||
warn: Prefetch instructions in Alpha do not do anything
|
||||
warn: Prefetch instructions in Alpha do not do anything
|
||||
hack: be nice to actually delete the event here
|
||||
|
||||
gzip: stdout: Broken pipe
|
||||
stdout: Broken pipe
|
||||
|
||||
gzip: stdout: Broken pipe
|
||||
|
|
|
|||
|
|
@ -1,10 +1,8 @@
|
|||
Redirecting stdout to build/ALPHA/tests/opt/quick/se/30.eio-mp/alpha/eio/simple-timing-mp/simout
|
||||
Redirecting stderr to build/ALPHA/tests/opt/quick/se/30.eio-mp/alpha/eio/simple-timing-mp/simerr
|
||||
gem5 Simulator System. http://gem5.org
|
||||
gem5 is copyrighted software; use the --copyright option for details.
|
||||
|
||||
gem5 compiled Sep 24 2013 03:08:53
|
||||
gem5 started Sep 28 2013 03:05:40
|
||||
gem5 compiled Jan 27 2014 00:31:18
|
||||
gem5 started Jan 27 2014 00:31:56
|
||||
gem5 executing on zizzer
|
||||
command line: build/ALPHA/gem5.opt -d build/ALPHA/tests/opt/quick/se/30.eio-mp/alpha/eio/simple-timing-mp -re tests/run.py build/ALPHA/tests/opt/quick/se/30.eio-mp/alpha/eio/simple-timing-mp
|
||||
Global frequency set at 1000000000000 ticks per second
|
||||
|
|
|
|||
|
|
@ -4,13 +4,15 @@ sim_seconds 0.000729 # Nu
|
|||
sim_ticks 729024000 # Number of ticks simulated
|
||||
final_tick 729024000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
|
||||
sim_freq 1000000000000 # Frequency of simulated ticks
|
||||
host_inst_rate 1392779 # Simulator instruction rate (inst/s)
|
||||
host_op_rate 1392763 # Simulator op (including micro ops) rate (op/s)
|
||||
host_tick_rate 507683499 # Simulator tick rate (ticks/s)
|
||||
host_mem_usage 238176 # Number of bytes of host memory used
|
||||
host_seconds 1.44 # Real time elapsed on the host
|
||||
host_inst_rate 1357951 # Simulator instruction rate (inst/s)
|
||||
host_op_rate 1357935 # Simulator op (including micro ops) rate (op/s)
|
||||
host_tick_rate 494987927 # Simulator tick rate (ticks/s)
|
||||
host_mem_usage 240260 # Number of bytes of host memory used
|
||||
host_seconds 1.47 # Real time elapsed on the host
|
||||
sim_insts 1999959 # Number of instructions simulated
|
||||
sim_ops 1999959 # Number of ops (including micro ops) simulated
|
||||
system.voltage_domain.voltage 1 # Voltage in Volts
|
||||
system.clk_domain.clock 1000 # Clock period in ticks
|
||||
system.physmem.bytes_read::cpu0.inst 25792 # Number of bytes read from this memory
|
||||
system.physmem.bytes_read::cpu0.data 29056 # Number of bytes read from this memory
|
||||
system.physmem.bytes_read::cpu1.inst 25792 # Number of bytes read from this memory
|
||||
|
|
@ -72,6 +74,7 @@ system.membus.reqLayer0.occupancy 4229968 # La
|
|||
system.membus.reqLayer0.utilization 0.6 # Layer utilization (%)
|
||||
system.membus.respLayer1.occupancy 31051500 # Layer occupancy (ticks)
|
||||
system.membus.respLayer1.utilization 4.3 # Layer utilization (%)
|
||||
system.cpu_clk_domain.clock 500 # Clock period in ticks
|
||||
system.l2c.tags.replacements 0 # number of replacements
|
||||
system.l2c.tags.tagsinuse 1943.172107 # Cycle average of tags in use
|
||||
system.l2c.tags.total_refs 332 # Total number of references to valid blocks.
|
||||
|
|
@ -97,6 +100,13 @@ system.l2c.tags.occ_percent::cpu2.data 0.003303 # Av
|
|||
system.l2c.tags.occ_percent::cpu3.inst 0.004044 # Average percentage of cache occupancy
|
||||
system.l2c.tags.occ_percent::cpu3.data 0.003303 # Average percentage of cache occupancy
|
||||
system.l2c.tags.occ_percent::total 0.029650 # Average percentage of cache occupancy
|
||||
system.l2c.tags.occ_task_id_blocks::1024 2932 # Occupied blocks per task id
|
||||
system.l2c.tags.age_task_id_blocks_1024::0 4 # Occupied blocks per task id
|
||||
system.l2c.tags.age_task_id_blocks_1024::1 24 # Occupied blocks per task id
|
||||
system.l2c.tags.age_task_id_blocks_1024::2 2904 # Occupied blocks per task id
|
||||
system.l2c.tags.occ_task_id_percent::1024 0.044739 # Percentage of cache occupancy per task id
|
||||
system.l2c.tags.tag_accesses 34048 # Number of tag accesses
|
||||
system.l2c.tags.data_accesses 34048 # Number of data accesses
|
||||
system.l2c.ReadReq_hits::cpu0.inst 60 # number of ReadReq hits
|
||||
system.l2c.ReadReq_hits::cpu0.data 9 # number of ReadReq hits
|
||||
system.l2c.ReadReq_hits::cpu1.inst 60 # number of ReadReq hits
|
||||
|
|
@ -533,6 +543,11 @@ system.cpu0.icache.tags.warmup_cycle 0 # Cy
|
|||
system.cpu0.icache.tags.occ_blocks::cpu0.inst 216.376897 # Average occupied blocks per requestor
|
||||
system.cpu0.icache.tags.occ_percent::cpu0.inst 0.422611 # Average percentage of cache occupancy
|
||||
system.cpu0.icache.tags.occ_percent::total 0.422611 # Average percentage of cache occupancy
|
||||
system.cpu0.icache.tags.occ_task_id_blocks::1024 311 # Occupied blocks per task id
|
||||
system.cpu0.icache.tags.age_task_id_blocks_1024::2 311 # Occupied blocks per task id
|
||||
system.cpu0.icache.tags.occ_task_id_percent::1024 0.607422 # Percentage of cache occupancy per task id
|
||||
system.cpu0.icache.tags.tag_accesses 500483 # Number of tag accesses
|
||||
system.cpu0.icache.tags.data_accesses 500483 # Number of data accesses
|
||||
system.cpu0.icache.ReadReq_hits::cpu0.inst 499557 # number of ReadReq hits
|
||||
system.cpu0.icache.ReadReq_hits::total 499557 # number of ReadReq hits
|
||||
system.cpu0.icache.demand_hits::cpu0.inst 499557 # number of demand (read+write) hits
|
||||
|
|
@ -611,6 +626,13 @@ system.cpu0.dcache.tags.warmup_cycle 0 # Cy
|
|||
system.cpu0.dcache.tags.occ_blocks::cpu0.data 273.500146 # Average occupied blocks per requestor
|
||||
system.cpu0.dcache.tags.occ_percent::cpu0.data 0.534180 # Average percentage of cache occupancy
|
||||
system.cpu0.dcache.tags.occ_percent::total 0.534180 # Average percentage of cache occupancy
|
||||
system.cpu0.dcache.tags.occ_task_id_blocks::1024 402 # Occupied blocks per task id
|
||||
system.cpu0.dcache.tags.age_task_id_blocks_1024::0 2 # Occupied blocks per task id
|
||||
system.cpu0.dcache.tags.age_task_id_blocks_1024::1 33 # Occupied blocks per task id
|
||||
system.cpu0.dcache.tags.age_task_id_blocks_1024::2 367 # Occupied blocks per task id
|
||||
system.cpu0.dcache.tags.occ_task_id_percent::1024 0.785156 # Percentage of cache occupancy per task id
|
||||
system.cpu0.dcache.tags.tag_accesses 723563 # Number of tag accesses
|
||||
system.cpu0.dcache.tags.data_accesses 723563 # Number of data accesses
|
||||
system.cpu0.dcache.ReadReq_hits::cpu0.data 124111 # number of ReadReq hits
|
||||
system.cpu0.dcache.ReadReq_hits::total 124111 # number of ReadReq hits
|
||||
system.cpu0.dcache.WriteReq_hits::cpu0.data 56201 # number of WriteReq hits
|
||||
|
|
@ -766,6 +788,11 @@ system.cpu1.icache.tags.warmup_cycle 0 # Cy
|
|||
system.cpu1.icache.tags.occ_blocks::cpu1.inst 216.373058 # Average occupied blocks per requestor
|
||||
system.cpu1.icache.tags.occ_percent::cpu1.inst 0.422604 # Average percentage of cache occupancy
|
||||
system.cpu1.icache.tags.occ_percent::total 0.422604 # Average percentage of cache occupancy
|
||||
system.cpu1.icache.tags.occ_task_id_blocks::1024 311 # Occupied blocks per task id
|
||||
system.cpu1.icache.tags.age_task_id_blocks_1024::2 311 # Occupied blocks per task id
|
||||
system.cpu1.icache.tags.occ_task_id_percent::1024 0.607422 # Percentage of cache occupancy per task id
|
||||
system.cpu1.icache.tags.tag_accesses 500475 # Number of tag accesses
|
||||
system.cpu1.icache.tags.data_accesses 500475 # Number of data accesses
|
||||
system.cpu1.icache.ReadReq_hits::cpu1.inst 499549 # number of ReadReq hits
|
||||
system.cpu1.icache.ReadReq_hits::total 499549 # number of ReadReq hits
|
||||
system.cpu1.icache.demand_hits::cpu1.inst 499549 # number of demand (read+write) hits
|
||||
|
|
@ -844,6 +871,13 @@ system.cpu1.dcache.tags.warmup_cycle 0 # Cy
|
|||
system.cpu1.dcache.tags.occ_blocks::cpu1.data 273.495183 # Average occupied blocks per requestor
|
||||
system.cpu1.dcache.tags.occ_percent::cpu1.data 0.534170 # Average percentage of cache occupancy
|
||||
system.cpu1.dcache.tags.occ_percent::total 0.534170 # Average percentage of cache occupancy
|
||||
system.cpu1.dcache.tags.occ_task_id_blocks::1024 402 # Occupied blocks per task id
|
||||
system.cpu1.dcache.tags.age_task_id_blocks_1024::0 2 # Occupied blocks per task id
|
||||
system.cpu1.dcache.tags.age_task_id_blocks_1024::1 33 # Occupied blocks per task id
|
||||
system.cpu1.dcache.tags.age_task_id_blocks_1024::2 367 # Occupied blocks per task id
|
||||
system.cpu1.dcache.tags.occ_task_id_percent::1024 0.785156 # Percentage of cache occupancy per task id
|
||||
system.cpu1.dcache.tags.tag_accesses 723559 # Number of tag accesses
|
||||
system.cpu1.dcache.tags.data_accesses 723559 # Number of data accesses
|
||||
system.cpu1.dcache.ReadReq_hits::cpu1.data 124111 # number of ReadReq hits
|
||||
system.cpu1.dcache.ReadReq_hits::total 124111 # number of ReadReq hits
|
||||
system.cpu1.dcache.WriteReq_hits::cpu1.data 56200 # number of WriteReq hits
|
||||
|
|
@ -999,6 +1033,11 @@ system.cpu2.icache.tags.warmup_cycle 0 # Cy
|
|||
system.cpu2.icache.tags.occ_blocks::cpu2.inst 216.369218 # Average occupied blocks per requestor
|
||||
system.cpu2.icache.tags.occ_percent::cpu2.inst 0.422596 # Average percentage of cache occupancy
|
||||
system.cpu2.icache.tags.occ_percent::total 0.422596 # Average percentage of cache occupancy
|
||||
system.cpu2.icache.tags.occ_task_id_blocks::1024 311 # Occupied blocks per task id
|
||||
system.cpu2.icache.tags.age_task_id_blocks_1024::2 311 # Occupied blocks per task id
|
||||
system.cpu2.icache.tags.occ_task_id_percent::1024 0.607422 # Percentage of cache occupancy per task id
|
||||
system.cpu2.icache.tags.tag_accesses 500468 # Number of tag accesses
|
||||
system.cpu2.icache.tags.data_accesses 500468 # Number of data accesses
|
||||
system.cpu2.icache.ReadReq_hits::cpu2.inst 499542 # number of ReadReq hits
|
||||
system.cpu2.icache.ReadReq_hits::total 499542 # number of ReadReq hits
|
||||
system.cpu2.icache.demand_hits::cpu2.inst 499542 # number of demand (read+write) hits
|
||||
|
|
@ -1077,6 +1116,13 @@ system.cpu2.dcache.tags.warmup_cycle 0 # Cy
|
|||
system.cpu2.dcache.tags.occ_blocks::cpu2.data 273.490220 # Average occupied blocks per requestor
|
||||
system.cpu2.dcache.tags.occ_percent::cpu2.data 0.534161 # Average percentage of cache occupancy
|
||||
system.cpu2.dcache.tags.occ_percent::total 0.534161 # Average percentage of cache occupancy
|
||||
system.cpu2.dcache.tags.occ_task_id_blocks::1024 402 # Occupied blocks per task id
|
||||
system.cpu2.dcache.tags.age_task_id_blocks_1024::0 2 # Occupied blocks per task id
|
||||
system.cpu2.dcache.tags.age_task_id_blocks_1024::1 33 # Occupied blocks per task id
|
||||
system.cpu2.dcache.tags.age_task_id_blocks_1024::2 367 # Occupied blocks per task id
|
||||
system.cpu2.dcache.tags.occ_task_id_percent::1024 0.785156 # Percentage of cache occupancy per task id
|
||||
system.cpu2.dcache.tags.tag_accesses 723551 # Number of tag accesses
|
||||
system.cpu2.dcache.tags.data_accesses 723551 # Number of data accesses
|
||||
system.cpu2.dcache.ReadReq_hits::cpu2.data 124109 # number of ReadReq hits
|
||||
system.cpu2.dcache.ReadReq_hits::total 124109 # number of ReadReq hits
|
||||
system.cpu2.dcache.WriteReq_hits::cpu2.data 56200 # number of WriteReq hits
|
||||
|
|
@ -1232,6 +1278,11 @@ system.cpu3.icache.tags.warmup_cycle 0 # Cy
|
|||
system.cpu3.icache.tags.occ_blocks::cpu3.inst 216.365379 # Average occupied blocks per requestor
|
||||
system.cpu3.icache.tags.occ_percent::cpu3.inst 0.422589 # Average percentage of cache occupancy
|
||||
system.cpu3.icache.tags.occ_percent::total 0.422589 # Average percentage of cache occupancy
|
||||
system.cpu3.icache.tags.occ_task_id_blocks::1024 311 # Occupied blocks per task id
|
||||
system.cpu3.icache.tags.age_task_id_blocks_1024::2 311 # Occupied blocks per task id
|
||||
system.cpu3.icache.tags.occ_task_id_percent::1024 0.607422 # Percentage of cache occupancy per task id
|
||||
system.cpu3.icache.tags.tag_accesses 500461 # Number of tag accesses
|
||||
system.cpu3.icache.tags.data_accesses 500461 # Number of data accesses
|
||||
system.cpu3.icache.ReadReq_hits::cpu3.inst 499535 # number of ReadReq hits
|
||||
system.cpu3.icache.ReadReq_hits::total 499535 # number of ReadReq hits
|
||||
system.cpu3.icache.demand_hits::cpu3.inst 499535 # number of demand (read+write) hits
|
||||
|
|
@ -1310,6 +1361,13 @@ system.cpu3.dcache.tags.warmup_cycle 0 # Cy
|
|||
system.cpu3.dcache.tags.occ_blocks::cpu3.data 273.485257 # Average occupied blocks per requestor
|
||||
system.cpu3.dcache.tags.occ_percent::cpu3.data 0.534151 # Average percentage of cache occupancy
|
||||
system.cpu3.dcache.tags.occ_percent::total 0.534151 # Average percentage of cache occupancy
|
||||
system.cpu3.dcache.tags.occ_task_id_blocks::1024 402 # Occupied blocks per task id
|
||||
system.cpu3.dcache.tags.age_task_id_blocks_1024::0 2 # Occupied blocks per task id
|
||||
system.cpu3.dcache.tags.age_task_id_blocks_1024::1 33 # Occupied blocks per task id
|
||||
system.cpu3.dcache.tags.age_task_id_blocks_1024::2 367 # Occupied blocks per task id
|
||||
system.cpu3.dcache.tags.occ_task_id_percent::1024 0.785156 # Percentage of cache occupancy per task id
|
||||
system.cpu3.dcache.tags.tag_accesses 723543 # Number of tag accesses
|
||||
system.cpu3.dcache.tags.data_accesses 723543 # Number of data accesses
|
||||
system.cpu3.dcache.ReadReq_hits::cpu3.data 124107 # number of ReadReq hits
|
||||
system.cpu3.dcache.ReadReq_hits::total 124107 # number of ReadReq hits
|
||||
system.cpu3.dcache.WriteReq_hits::cpu3.data 56200 # number of WriteReq hits
|
||||
|
|
|
|||
Loading…
Reference in a new issue