RELEASE: More changes to text

--HG--
extra : convert_revision : 86c0dec05f392078dfb2c3f941debc9bc46f63bb
This commit is contained in:
Ali Saidi 2007-11-01 21:07:49 -04:00
parent abaaeed876
commit 81fa75638b
3 changed files with 23 additions and 6 deletions

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@ -36,6 +36,7 @@ Ali G. Saidi
* I/O <-> memory interface * I/O <-> memory interface
* PCI device interface * PCI device interface
* Multiple ISA support * Multiple ISA support
* Ethernet (Intel NIC) device model
* Memory bridge, bus, packet, port interfaces * Memory bridge, bus, packet, port interfaces
Kevin T. Lim Kevin T. Lim

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@ -8,15 +8,15 @@ Outstanding issues for 2.0 release:
6. Make repository public 6. Make repository public
7. Testing 7. Testing
8. Validation 8. Validation
9. Testing
Nov XX, 2007: m5_2.0_beta4 Nov 4, 2007: m5_2.0_beta4
-------------------- --------------------
New Features New Features
1. New cache 1. New cache model
2. Ability to include compiled code with EXTRAS= 2. Use of a I/O cache between devices and memory
3. Python creation of params structures for initialization 3. Ability to include compiled code with EXTRAS=
4. Ability to remotely debug in SE 4. Python creation of params structures for initialization
5. Ability to remotely debug in SE
Bug fixes: Bug fixes:
1. Fix SE serialization 1. Fix SE serialization
@ -26,6 +26,21 @@ Bug fixes:
5. Draining code for checkpointing 5. Draining code for checkpointing
6. Various performance improvements 6. Various performance improvements
Possible Incompatibilities:
1. Real TLBs are now used in SE mode. This is more accurate however it could
cause some problems if you've modified the way page handling is done in
SE mode.
2. There have been many changes to the way the SCons files work. SimObjects,
sources files, and trace flags are all specified in the SConscript files.
To see how to add your sources take a look at one of them.
3. Python is now used to created the parameter structs that were created
manually before. The parameters listed in a py file are turned into
a header file with the same name (e.g. BadDevice.py -> BadDevice.h).
With this change the structs can be populate automatically and the
ugly macros to define and create SimObjects at the bottem of source
files are gone. The parameter structs also automatically inherit
parameters from their parents.
May 16, 2007: m5_2.0_beta3 May 16, 2007: m5_2.0_beta3
-------------------- --------------------
New Features New Features

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@ -200,6 +200,7 @@ remove_sources(r'.*nativetrace.*', 'src/cpu')
remove_lines(r'.*X86.*', None, 'src/arch/isa_specific.hh') remove_lines(r'.*X86.*', None, 'src/arch/isa_specific.hh')
remove_lines(r'.*X86.*', None, 'src/base/traceflags.py') remove_lines(r'.*X86.*', None, 'src/base/traceflags.py')
remove_lines(r'.*X86.*', None, 'AUTHORS')
remove_lines(r'.*X86.*', None, 'src/base/loader/object_file.hh') remove_lines(r'.*X86.*', None, 'src/base/loader/object_file.hh')
remove_lines(r'.*_X86_.*', '.*else.*', 'src/base/loader/elf_object.cc') remove_lines(r'.*_X86_.*', '.*else.*', 'src/base/loader/elf_object.cc')
remove_lines(r'.*X86_ISA.*', r'^.el.*','src/sim/process.cc') remove_lines(r'.*X86_ISA.*', r'^.el.*','src/sim/process.cc')