From 81fa75638b3dbfe9cc01ec1eb2f16e6e368509d6 Mon Sep 17 00:00:00 2001 From: Ali Saidi Date: Thu, 1 Nov 2007 21:07:49 -0400 Subject: [PATCH] RELEASE: More changes to text --HG-- extra : convert_revision : 86c0dec05f392078dfb2c3f941debc9bc46f63bb --- AUTHORS | 1 + RELEASE_NOTES | 27 +++++++++++++++++++++------ util/make_release.py | 1 + 3 files changed, 23 insertions(+), 6 deletions(-) diff --git a/AUTHORS b/AUTHORS index a6da41bcb..e485aeca4 100644 --- a/AUTHORS +++ b/AUTHORS @@ -36,6 +36,7 @@ Ali G. Saidi * I/O <-> memory interface * PCI device interface * Multiple ISA support +* Ethernet (Intel NIC) device model * Memory bridge, bus, packet, port interfaces Kevin T. Lim diff --git a/RELEASE_NOTES b/RELEASE_NOTES index 103bc0b7a..50ab6b330 100644 --- a/RELEASE_NOTES +++ b/RELEASE_NOTES @@ -8,15 +8,15 @@ Outstanding issues for 2.0 release: 6. Make repository public 7. Testing 8. Validation -9. Testing -Nov XX, 2007: m5_2.0_beta4 +Nov 4, 2007: m5_2.0_beta4 -------------------- New Features -1. New cache -2. Ability to include compiled code with EXTRAS= -3. Python creation of params structures for initialization -4. Ability to remotely debug in SE +1. New cache model +2. Use of a I/O cache between devices and memory +3. Ability to include compiled code with EXTRAS= +4. Python creation of params structures for initialization +5. Ability to remotely debug in SE Bug fixes: 1. Fix SE serialization @@ -26,6 +26,21 @@ Bug fixes: 5. Draining code for checkpointing 6. Various performance improvements +Possible Incompatibilities: +1. Real TLBs are now used in SE mode. This is more accurate however it could + cause some problems if you've modified the way page handling is done in + SE mode. +2. There have been many changes to the way the SCons files work. SimObjects, + sources files, and trace flags are all specified in the SConscript files. + To see how to add your sources take a look at one of them. +3. Python is now used to created the parameter structs that were created + manually before. The parameters listed in a py file are turned into + a header file with the same name (e.g. BadDevice.py -> BadDevice.h). + With this change the structs can be populate automatically and the + ugly macros to define and create SimObjects at the bottem of source + files are gone. The parameter structs also automatically inherit + parameters from their parents. + May 16, 2007: m5_2.0_beta3 -------------------- New Features diff --git a/util/make_release.py b/util/make_release.py index fafea133c..891f57cc5 100755 --- a/util/make_release.py +++ b/util/make_release.py @@ -200,6 +200,7 @@ remove_sources(r'.*nativetrace.*', 'src/cpu') remove_lines(r'.*X86.*', None, 'src/arch/isa_specific.hh') remove_lines(r'.*X86.*', None, 'src/base/traceflags.py') +remove_lines(r'.*X86.*', None, 'AUTHORS') remove_lines(r'.*X86.*', None, 'src/base/loader/object_file.hh') remove_lines(r'.*_X86_.*', '.*else.*', 'src/base/loader/elf_object.cc') remove_lines(r'.*X86_ISA.*', r'^.el.*','src/sim/process.cc')