X86: Add an event for the apic timer timeout. It doesn't get used yet.
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2 changed files with 39 additions and 8 deletions
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@ -110,6 +110,16 @@ void MiscRegFile::clear()
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regVal[MISCREG_APIC_DESTINATION_FORMAT] = (MiscReg)(-1);
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regVal[MISCREG_APIC_DESTINATION_FORMAT] = (MiscReg)(-1);
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}
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}
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int divideFromConf(MiscReg conf)
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{
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// This figures out what division we want from the division configuration
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// register in the local APIC. The encoding is a little odd but it can
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// be deciphered fairly easily.
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int shift = ((conf & 0x8) >> 1) | (conf & 0x3);
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shift = (shift + 1) % 8;
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return 1 << shift;
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};
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MiscReg MiscRegFile::readRegNoEffect(int miscReg)
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MiscReg MiscRegFile::readRegNoEffect(int miscReg)
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{
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{
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// Make sure we're not dealing with an illegal control register.
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// Make sure we're not dealing with an illegal control register.
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@ -152,11 +162,10 @@ MiscReg MiscRegFile::readReg(int miscReg, ThreadContext * tc)
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panic("Local APIC Interrupt Command high"
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panic("Local APIC Interrupt Command high"
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" register unimplemented.\n");
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" register unimplemented.\n");
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break;
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break;
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case MISCREG_APIC_INITIAL_COUNT:
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panic("Local APIC Initial Count register unimplemented.\n");
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break;
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case MISCREG_APIC_CURRENT_COUNT:
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case MISCREG_APIC_CURRENT_COUNT:
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panic("Local APIC Current Count register unimplemented.\n");
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return (regVal[miscReg] - tc->getCpuPtr()->curCycle()) /
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(16 * divideFromConf(
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regVal[MISCREG_APIC_DIVIDE_CONFIGURATION]));
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break;
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break;
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}
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}
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}
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}
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@ -262,11 +271,16 @@ void MiscRegFile::setReg(int miscReg,
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}
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}
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break;
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break;
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case MISCREG_APIC_INITIAL_COUNT:
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case MISCREG_APIC_INITIAL_COUNT:
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panic("Local APIC Initial Count register unimplemented.\n");
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newVal = bits(val, 31, 0);
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regVal[MISCREG_APIC_CURRENT_COUNT] =
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tc->getCpuPtr()->curCycle() +
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(16 * divideFromConf(
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regVal[MISCREG_APIC_DIVIDE_CONFIGURATION])) * newVal;
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//FIXME This should schedule the timer event.
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break;
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break;
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case MISCREG_APIC_CURRENT_COUNT:
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case MISCREG_APIC_CURRENT_COUNT:
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panic("Local APIC Current Count register unimplemented.\n");
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//Local APIC Current Count register is read only.
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break;
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return;
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case MISCREG_APIC_DIVIDE_CONFIGURATION:
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case MISCREG_APIC_DIVIDE_CONFIGURATION:
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newVal = val & 0xB;
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newVal = val & 0xB;
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break;
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break;
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@ -29,7 +29,7 @@
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*/
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*/
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/*
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/*
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* Copyright (c) 2007 The Hewlett-Packard Development Company
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* Copyright (c) 2007-2008 The Hewlett-Packard Development Company
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* All rights reserved.
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* All rights reserved.
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*
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*
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* Redistribution and use of this software in source and binary forms,
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* Redistribution and use of this software in source and binary forms,
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@ -91,6 +91,8 @@
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#include "arch/x86/faults.hh"
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#include "arch/x86/faults.hh"
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#include "arch/x86/miscregs.hh"
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#include "arch/x86/miscregs.hh"
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#include "arch/x86/types.hh"
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#include "arch/x86/types.hh"
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#include "sim/eventq.hh"
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#include "sim/host.hh"
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#include <string>
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#include <string>
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@ -98,6 +100,7 @@ class Checkpoint;
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namespace X86ISA
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namespace X86ISA
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{
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{
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std::string getMiscRegName(RegIndex);
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std::string getMiscRegName(RegIndex);
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//These will have to be updated in the future.
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//These will have to be updated in the future.
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@ -109,6 +112,20 @@ namespace X86ISA
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protected:
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protected:
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MiscReg regVal[NumMiscRegs];
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MiscReg regVal[NumMiscRegs];
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class ApicTimerEvent : public Event
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{
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public:
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ApicTimerEvent() : Event(&mainEventQueue)
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{}
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void process()
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{
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warn("Local APIC timer event doesn't do anything!\n");
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}
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};
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ApicTimerEvent apicTimerEvent;
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public:
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public:
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void clear();
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void clear();
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