stats: updates due to branch predictor warming
This commit is contained in:
parent
0a44e16948
commit
5abbb84f02
106 changed files with 1299 additions and 1147 deletions
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@ -842,6 +842,7 @@ system.cpu0.num_idle_cycles 904626845.998199
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system.cpu0.num_busy_cycles 23718154.001801 # Number of busy cycles
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system.cpu0.num_busy_cycles 23718154.001801 # Number of busy cycles
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system.cpu0.not_idle_fraction 0.025549 # Percentage of non-idle cycles
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system.cpu0.not_idle_fraction 0.025549 # Percentage of non-idle cycles
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system.cpu0.idle_fraction 0.974451 # Percentage of idle cycles
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system.cpu0.idle_fraction 0.974451 # Percentage of idle cycles
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system.cpu0.Branches 5776800 # Number of branches fetched
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system.cpu0.kern.inst.arm 0 # number of arm instructions executed
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system.cpu0.kern.inst.arm 0 # number of arm instructions executed
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system.cpu0.kern.inst.quiesce 6418 # number of quiesce instructions executed
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system.cpu0.kern.inst.quiesce 6418 # number of quiesce instructions executed
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system.cpu0.kern.inst.hwrei 211383 # number of hwrei instructions executed
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system.cpu0.kern.inst.hwrei 211383 # number of hwrei instructions executed
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@ -1474,6 +1475,7 @@ system.cpu1.num_idle_cycles 922131579.439540
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system.cpu1.num_busy_cycles 31485705.560460 # Number of busy cycles
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system.cpu1.num_busy_cycles 31485705.560460 # Number of busy cycles
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system.cpu1.not_idle_fraction 0.033017 # Percentage of non-idle cycles
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system.cpu1.not_idle_fraction 0.033017 # Percentage of non-idle cycles
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system.cpu1.idle_fraction 0.966983 # Percentage of idle cycles
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system.cpu1.idle_fraction 0.966983 # Percentage of idle cycles
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system.cpu1.Branches 1300702 # Number of branches fetched
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system.cpu1.kern.inst.arm 0 # number of arm instructions executed
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system.cpu1.kern.inst.arm 0 # number of arm instructions executed
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system.cpu1.kern.inst.quiesce 0 # number of quiesce instructions executed
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system.cpu1.kern.inst.quiesce 0 # number of quiesce instructions executed
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system.cpu1.kern.inst.hwrei 0 # number of hwrei instructions executed
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system.cpu1.kern.inst.hwrei 0 # number of hwrei instructions executed
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@ -1252,6 +1252,7 @@ system.cpu0.num_idle_cycles 111019314.623883
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system.cpu0.num_busy_cycles 2686633.376117 # Number of busy cycles
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system.cpu0.num_busy_cycles 2686633.376117 # Number of busy cycles
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system.cpu0.not_idle_fraction 0.023628 # Percentage of non-idle cycles
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system.cpu0.not_idle_fraction 0.023628 # Percentage of non-idle cycles
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system.cpu0.idle_fraction 0.976372 # Percentage of idle cycles
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system.cpu0.idle_fraction 0.976372 # Percentage of idle cycles
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system.cpu0.Branches 5610345 # Number of branches fetched
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system.cpu0.kern.inst.arm 0 # number of arm instructions executed
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system.cpu0.kern.inst.arm 0 # number of arm instructions executed
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system.cpu0.kern.inst.quiesce 82892 # number of quiesce instructions executed
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system.cpu0.kern.inst.quiesce 82892 # number of quiesce instructions executed
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system.cpu0.icache.tags.replacements 891892 # number of replacements
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system.cpu0.icache.tags.replacements 891892 # number of replacements
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@ -1751,6 +1752,7 @@ system.cpu1.num_idle_cycles 545340562.414449
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system.cpu1.num_busy_cycles 36079911.585551 # Number of busy cycles
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system.cpu1.num_busy_cycles 36079911.585551 # Number of busy cycles
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system.cpu1.not_idle_fraction 0.062055 # Percentage of non-idle cycles
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system.cpu1.not_idle_fraction 0.062055 # Percentage of non-idle cycles
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system.cpu1.idle_fraction 0.937945 # Percentage of idle cycles
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system.cpu1.idle_fraction 0.937945 # Percentage of idle cycles
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system.cpu1.Branches 1446360 # Number of branches fetched
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system.cpu1.kern.inst.arm 0 # number of arm instructions executed
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system.cpu1.kern.inst.arm 0 # number of arm instructions executed
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system.cpu1.kern.inst.quiesce 0 # number of quiesce instructions executed
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system.cpu1.kern.inst.quiesce 0 # number of quiesce instructions executed
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system.cpu2.branchPred.lookups 4789734 # Number of BP lookups
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system.cpu2.branchPred.lookups 4789734 # Number of BP lookups
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@ -1183,6 +1183,7 @@ system.cpu0.num_idle_cycles 2288628005.429596
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system.cpu0.num_busy_cycles 339634703.570404 # Number of busy cycles
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system.cpu0.num_busy_cycles 339634703.570404 # Number of busy cycles
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system.cpu0.not_idle_fraction 0.129224 # Percentage of non-idle cycles
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system.cpu0.not_idle_fraction 0.129224 # Percentage of non-idle cycles
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system.cpu0.idle_fraction 0.870776 # Percentage of idle cycles
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system.cpu0.idle_fraction 0.870776 # Percentage of idle cycles
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system.cpu0.Branches 5125799 # Number of branches fetched
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system.cpu0.kern.inst.arm 0 # number of arm instructions executed
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system.cpu0.kern.inst.arm 0 # number of arm instructions executed
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system.cpu0.kern.inst.quiesce 83029 # number of quiesce instructions executed
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system.cpu0.kern.inst.quiesce 83029 # number of quiesce instructions executed
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system.cpu0.icache.tags.replacements 856230 # number of replacements
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system.cpu0.icache.tags.replacements 856230 # number of replacements
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@ -1624,6 +1625,7 @@ system.cpu1.num_idle_cycles 2292298207.924829
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system.cpu1.num_busy_cycles 338906906.075172 # Number of busy cycles
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system.cpu1.num_busy_cycles 338906906.075172 # Number of busy cycles
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system.cpu1.not_idle_fraction 0.128803 # Percentage of non-idle cycles
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system.cpu1.not_idle_fraction 0.128803 # Percentage of non-idle cycles
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system.cpu1.idle_fraction 0.871197 # Percentage of idle cycles
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system.cpu1.idle_fraction 0.871197 # Percentage of idle cycles
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system.cpu1.Branches 5184020 # Number of branches fetched
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system.cpu1.kern.inst.arm 0 # number of arm instructions executed
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system.cpu1.kern.inst.arm 0 # number of arm instructions executed
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system.cpu1.kern.inst.quiesce 0 # number of quiesce instructions executed
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system.cpu1.kern.inst.quiesce 0 # number of quiesce instructions executed
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system.iocache.tags.replacements 0 # number of replacements
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system.iocache.tags.replacements 0 # number of replacements
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@ -596,6 +596,7 @@ system.cpu0.num_idle_cycles 10090453891.750097
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system.cpu0.num_busy_cycles 510417579.249904 # Number of busy cycles
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system.cpu0.num_busy_cycles 510417579.249904 # Number of busy cycles
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system.cpu0.not_idle_fraction 0.048149 # Percentage of non-idle cycles
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system.cpu0.not_idle_fraction 0.048149 # Percentage of non-idle cycles
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system.cpu0.idle_fraction 0.951851 # Percentage of idle cycles
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system.cpu0.idle_fraction 0.951851 # Percentage of idle cycles
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system.cpu0.Branches 11289261 # Number of branches fetched
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system.cpu0.kern.inst.arm 0 # number of arm instructions executed
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system.cpu0.kern.inst.arm 0 # number of arm instructions executed
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system.cpu0.kern.inst.quiesce 0 # number of quiesce instructions executed
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system.cpu0.kern.inst.quiesce 0 # number of quiesce instructions executed
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system.cpu1.apic_clk_domain.clock 8000 # Clock period in ticks
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system.cpu1.apic_clk_domain.clock 8000 # Clock period in ticks
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@ -623,6 +624,7 @@ system.cpu1.num_idle_cycles 10261752317.862694
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system.cpu1.num_busy_cycles 336287219.137307 # Number of busy cycles
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system.cpu1.num_busy_cycles 336287219.137307 # Number of busy cycles
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system.cpu1.not_idle_fraction 0.031731 # Percentage of non-idle cycles
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system.cpu1.not_idle_fraction 0.031731 # Percentage of non-idle cycles
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system.cpu1.idle_fraction 0.968269 # Percentage of idle cycles
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system.cpu1.idle_fraction 0.968269 # Percentage of idle cycles
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system.cpu1.Branches 10643857 # Number of branches fetched
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system.cpu1.kern.inst.arm 0 # number of arm instructions executed
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system.cpu1.kern.inst.arm 0 # number of arm instructions executed
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system.cpu1.kern.inst.quiesce 0 # number of quiesce instructions executed
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system.cpu1.kern.inst.quiesce 0 # number of quiesce instructions executed
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system.ruby.network.routers0.throttle0.link_utilization 0.038081
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system.ruby.network.routers0.throttle0.link_utilization 0.038081
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@ -1112,6 +1112,7 @@ system.cpu0.num_idle_cycles 1095316733.110107
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system.cpu0.num_busy_cycles 57144334.889893 # Number of busy cycles
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system.cpu0.num_busy_cycles 57144334.889893 # Number of busy cycles
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system.cpu0.not_idle_fraction 0.049585 # Percentage of non-idle cycles
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system.cpu0.not_idle_fraction 0.049585 # Percentage of non-idle cycles
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system.cpu0.idle_fraction 0.950415 # Percentage of idle cycles
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system.cpu0.idle_fraction 0.950415 # Percentage of idle cycles
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system.cpu0.Branches 15442715 # Number of branches fetched
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system.cpu0.kern.inst.arm 0 # number of arm instructions executed
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system.cpu0.kern.inst.arm 0 # number of arm instructions executed
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system.cpu0.kern.inst.quiesce 0 # number of quiesce instructions executed
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system.cpu0.kern.inst.quiesce 0 # number of quiesce instructions executed
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system.cpu0.icache.tags.replacements 857108 # number of replacements
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system.cpu0.icache.tags.replacements 857108 # number of replacements
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@ -1468,6 +1469,7 @@ system.cpu1.num_idle_cycles 2475874291.383945
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system.cpu1.num_busy_cycles 130137034.616055 # Number of busy cycles
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system.cpu1.num_busy_cycles 130137034.616055 # Number of busy cycles
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system.cpu1.not_idle_fraction 0.049937 # Percentage of non-idle cycles
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system.cpu1.not_idle_fraction 0.049937 # Percentage of non-idle cycles
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system.cpu1.idle_fraction 0.950063 # Percentage of idle cycles
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system.cpu1.idle_fraction 0.950063 # Percentage of idle cycles
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system.cpu1.Branches 7096172 # Number of branches fetched
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system.cpu1.kern.inst.arm 0 # number of arm instructions executed
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system.cpu1.kern.inst.arm 0 # number of arm instructions executed
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system.cpu1.kern.inst.quiesce 0 # number of quiesce instructions executed
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system.cpu1.kern.inst.quiesce 0 # number of quiesce instructions executed
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system.cpu2.branchPred.lookups 29049356 # Number of BP lookups
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system.cpu2.branchPred.lookups 29049356 # Number of BP lookups
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@ -135,6 +135,7 @@ system.cpu.num_idle_cycles 0 # Nu
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system.cpu.num_busy_cycles 2233777513 # Number of busy cycles
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system.cpu.num_busy_cycles 2233777513 # Number of busy cycles
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system.cpu.not_idle_fraction 1 # Percentage of non-idle cycles
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system.cpu.not_idle_fraction 1 # Percentage of non-idle cycles
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system.cpu.idle_fraction 0 # Percentage of idle cycles
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system.cpu.idle_fraction 0 # Percentage of idle cycles
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system.cpu.Branches 441057355 # Number of branches fetched
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system.cpu.kern.inst.arm 0 # number of arm instructions executed
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system.cpu.kern.inst.arm 0 # number of arm instructions executed
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system.cpu.kern.inst.quiesce 0 # number of quiesce instructions executed
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system.cpu.kern.inst.quiesce 0 # number of quiesce instructions executed
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@ -146,5 +146,6 @@ system.cpu.num_idle_cycles 0 # Nu
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system.cpu.num_busy_cycles 108481323 # Number of busy cycles
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system.cpu.num_busy_cycles 108481323 # Number of busy cycles
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system.cpu.not_idle_fraction 1 # Percentage of non-idle cycles
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system.cpu.not_idle_fraction 1 # Percentage of non-idle cycles
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system.cpu.idle_fraction 0 # Percentage of idle cycles
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system.cpu.idle_fraction 0 # Percentage of idle cycles
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system.cpu.Branches 18732304 # Number of branches fetched
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---------- End Simulation Statistics ----------
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---------- End Simulation Statistics ----------
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@ -152,6 +152,7 @@ system.cpu.num_idle_cycles 0 # Nu
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system.cpu.num_busy_cycles 294271952 # Number of busy cycles
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system.cpu.num_busy_cycles 294271952 # Number of busy cycles
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system.cpu.not_idle_fraction 1 # Percentage of non-idle cycles
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system.cpu.not_idle_fraction 1 # Percentage of non-idle cycles
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system.cpu.idle_fraction 0 # Percentage of idle cycles
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system.cpu.idle_fraction 0 # Percentage of idle cycles
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system.cpu.Branches 18732304 # Number of branches fetched
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system.cpu.icache.tags.replacements 2 # number of replacements
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system.cpu.icache.tags.replacements 2 # number of replacements
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system.cpu.icache.tags.tagsinuse 510.071144 # Cycle average of tags in use
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system.cpu.icache.tags.tagsinuse 510.071144 # Cycle average of tags in use
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system.cpu.icache.tags.total_refs 107830172 # Total number of references to valid blocks.
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system.cpu.icache.tags.total_refs 107830172 # Total number of references to valid blocks.
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@ -64,5 +64,6 @@ system.cpu.num_idle_cycles 0 # Nu
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system.cpu.num_busy_cycles 244431648 # Number of busy cycles
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system.cpu.num_busy_cycles 244431648 # Number of busy cycles
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system.cpu.not_idle_fraction 1 # Percentage of non-idle cycles
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system.cpu.not_idle_fraction 1 # Percentage of non-idle cycles
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system.cpu.idle_fraction 0 # Percentage of idle cycles
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system.cpu.idle_fraction 0 # Percentage of idle cycles
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system.cpu.Branches 29302884 # Number of branches fetched
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---------- End Simulation Statistics ----------
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---------- End Simulation Statistics ----------
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@ -68,6 +68,7 @@ system.cpu.num_idle_cycles 0 # Nu
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system.cpu.num_busy_cycles 722977060 # Number of busy cycles
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system.cpu.num_busy_cycles 722977060 # Number of busy cycles
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system.cpu.not_idle_fraction 1 # Percentage of non-idle cycles
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system.cpu.not_idle_fraction 1 # Percentage of non-idle cycles
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system.cpu.idle_fraction 0 # Percentage of idle cycles
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system.cpu.idle_fraction 0 # Percentage of idle cycles
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system.cpu.Branches 29302884 # Number of branches fetched
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system.cpu.icache.tags.replacements 25 # number of replacements
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system.cpu.icache.tags.replacements 25 # number of replacements
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system.cpu.icache.tags.tagsinuse 725.412977 # Cycle average of tags in use
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system.cpu.icache.tags.tagsinuse 725.412977 # Cycle average of tags in use
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system.cpu.icache.tags.total_refs 244420617 # Total number of references to valid blocks.
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system.cpu.icache.tags.total_refs 244420617 # Total number of references to valid blocks.
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@ -65,5 +65,6 @@ system.cpu.num_idle_cycles 0 # Nu
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system.cpu.num_busy_cycles 337900081 # Number of busy cycles
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system.cpu.num_busy_cycles 337900081 # Number of busy cycles
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system.cpu.not_idle_fraction 1 # Percentage of non-idle cycles
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system.cpu.not_idle_fraction 1 # Percentage of non-idle cycles
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system.cpu.idle_fraction 0 # Percentage of idle cycles
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system.cpu.idle_fraction 0 # Percentage of idle cycles
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system.cpu.Branches 29309705 # Number of branches fetched
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---------- End Simulation Statistics ----------
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---------- End Simulation Statistics ----------
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system.cpu.num_busy_cycles 731978130 # Number of busy cycles
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system.cpu.num_busy_cycles 731978130 # Number of busy cycles
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system.cpu.not_idle_fraction 1 # Percentage of non-idle cycles
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system.cpu.not_idle_fraction 1 # Percentage of non-idle cycles
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system.cpu.idle_fraction 0 # Percentage of idle cycles
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system.cpu.idle_fraction 0 # Percentage of idle cycles
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system.cpu.Branches 29309705 # Number of branches fetched
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system.cpu.icache.tags.replacements 24 # number of replacements
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system.cpu.icache.tags.replacements 24 # number of replacements
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system.cpu.icache.tags.tagsinuse 665.632508 # Cycle average of tags in use
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system.cpu.icache.tags.tagsinuse 665.632508 # Cycle average of tags in use
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system.cpu.icache.tags.total_refs 217695357 # Total number of references to valid blocks.
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system.cpu.icache.tags.total_refs 217695357 # Total number of references to valid blocks.
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system.cpu.num_busy_cycles 580997935 # Number of busy cycles
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system.cpu.num_busy_cycles 580997935 # Number of busy cycles
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system.cpu.not_idle_fraction 1 # Percentage of non-idle cycles
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system.cpu.not_idle_fraction 1 # Percentage of non-idle cycles
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system.cpu.idle_fraction 0 # Percentage of idle cycles
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system.cpu.idle_fraction 0 # Percentage of idle cycles
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system.cpu.Branches 121548301 # Number of branches fetched
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---------- End Simulation Statistics ----------
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---------- End Simulation Statistics ----------
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@ -160,6 +160,7 @@ system.cpu.num_idle_cycles 0 # Nu
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system.cpu.num_busy_cycles 1434732024 # Number of busy cycles
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system.cpu.num_busy_cycles 1434732024 # Number of busy cycles
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system.cpu.not_idle_fraction 1 # Percentage of non-idle cycles
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system.cpu.not_idle_fraction 1 # Percentage of non-idle cycles
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system.cpu.idle_fraction 0 # Percentage of idle cycles
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system.cpu.idle_fraction 0 # Percentage of idle cycles
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system.cpu.Branches 121548301 # Number of branches fetched
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system.cpu.icache.tags.replacements 9788 # number of replacements
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system.cpu.icache.tags.replacements 9788 # number of replacements
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system.cpu.icache.tags.tagsinuse 982.663229 # Cycle average of tags in use
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system.cpu.icache.tags.tagsinuse 982.663229 # Cycle average of tags in use
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system.cpu.icache.tags.total_refs 516599855 # Total number of references to valid blocks.
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system.cpu.icache.tags.total_refs 516599855 # Total number of references to valid blocks.
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Redirecting stdout to build/X86/tests/opt/long/se/20.parser/x86/linux/o3-timing/simout
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Redirecting stderr to build/X86/tests/opt/long/se/20.parser/x86/linux/o3-timing/simerr
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gem5 Simulator System. http://gem5.org
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gem5 Simulator System. http://gem5.org
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gem5 is copyrighted software; use the --copyright option for details.
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gem5 is copyrighted software; use the --copyright option for details.
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gem5 compiled Jan 22 2014 17:10:34
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gem5 compiled Feb 15 2014 16:30:59
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gem5 started Jan 22 2014 20:22:33
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gem5 started Feb 16 2014 01:49:09
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gem5 executing on u200540-lin
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gem5 executing on ribera.cs.wisc.edu
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command line: build/X86/gem5.opt -d build/X86/tests/opt/long/se/20.parser/x86/linux/o3-timing -re tests/run.py build/X86/tests/opt/long/se/20.parser/x86/linux/o3-timing
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command line: build/X86/gem5.opt -d build/X86/tests/opt/long/se/20.parser/x86/linux/o3-timing -re tests/run.py build/X86/tests/opt/long/se/20.parser/x86/linux/o3-timing
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Global frequency set at 1000000000000 ticks per second
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Global frequency set at 1000000000000 ticks per second
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info: Entering event queue @ 0. Starting simulation...
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info: Entering event queue @ 0. Starting simulation...
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@ -79,4 +81,4 @@ info: Increasing stack size by one page.
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about 2 million people attended
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about 2 million people attended
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the five best costumes got prizes
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the five best costumes got prizes
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No errors!
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No errors!
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Exiting @ tick 459105675500 because target called exit()
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Exiting @ tick 459118646000 because target called exit()
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File diff suppressed because it is too large
Load diff
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@ -65,5 +65,6 @@ system.cpu.num_idle_cycles 0 # Nu
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system.cpu.num_busy_cycles 1770458657 # Number of busy cycles
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system.cpu.num_busy_cycles 1770458657 # Number of busy cycles
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system.cpu.not_idle_fraction 1 # Percentage of non-idle cycles
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system.cpu.not_idle_fraction 1 # Percentage of non-idle cycles
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system.cpu.idle_fraction 0 # Percentage of idle cycles
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system.cpu.idle_fraction 0 # Percentage of idle cycles
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system.cpu.Branches 149758583 # Number of branches fetched
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---------- End Simulation Statistics ----------
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---------- End Simulation Statistics ----------
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system.cpu.num_busy_cycles 3295745698 # Number of busy cycles
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system.cpu.num_busy_cycles 3295745698 # Number of busy cycles
|
||||||
system.cpu.not_idle_fraction 1 # Percentage of non-idle cycles
|
system.cpu.not_idle_fraction 1 # Percentage of non-idle cycles
|
||||||
system.cpu.idle_fraction 0 # Percentage of idle cycles
|
system.cpu.idle_fraction 0 # Percentage of idle cycles
|
||||||
|
system.cpu.Branches 149758583 # Number of branches fetched
|
||||||
system.cpu.icache.tags.replacements 1253 # number of replacements
|
system.cpu.icache.tags.replacements 1253 # number of replacements
|
||||||
system.cpu.icache.tags.tagsinuse 881.356491 # Cycle average of tags in use
|
system.cpu.icache.tags.tagsinuse 881.356491 # Cycle average of tags in use
|
||||||
system.cpu.icache.tags.total_refs 1068344252 # Total number of references to valid blocks.
|
system.cpu.icache.tags.total_refs 1068344252 # Total number of references to valid blocks.
|
||||||
|
|
|
@ -94,5 +94,6 @@ system.cpu.num_idle_cycles 0 # Nu
|
||||||
system.cpu.num_busy_cycles 398664824 # Number of busy cycles
|
system.cpu.num_busy_cycles 398664824 # Number of busy cycles
|
||||||
system.cpu.not_idle_fraction 1 # Percentage of non-idle cycles
|
system.cpu.not_idle_fraction 1 # Percentage of non-idle cycles
|
||||||
system.cpu.idle_fraction 0 # Percentage of idle cycles
|
system.cpu.idle_fraction 0 # Percentage of idle cycles
|
||||||
|
system.cpu.Branches 44587532 # Number of branches fetched
|
||||||
|
|
||||||
---------- End Simulation Statistics ----------
|
---------- End Simulation Statistics ----------
|
||||||
|
|
|
@ -100,6 +100,7 @@ system.cpu.num_idle_cycles 0 # Nu
|
||||||
system.cpu.num_busy_cycles 1134670186 # Number of busy cycles
|
system.cpu.num_busy_cycles 1134670186 # Number of busy cycles
|
||||||
system.cpu.not_idle_fraction 1 # Percentage of non-idle cycles
|
system.cpu.not_idle_fraction 1 # Percentage of non-idle cycles
|
||||||
system.cpu.idle_fraction 0 # Percentage of idle cycles
|
system.cpu.idle_fraction 0 # Percentage of idle cycles
|
||||||
|
system.cpu.Branches 44587535 # Number of branches fetched
|
||||||
system.cpu.icache.tags.replacements 1769 # number of replacements
|
system.cpu.icache.tags.replacements 1769 # number of replacements
|
||||||
system.cpu.icache.tags.tagsinuse 1795.138964 # Cycle average of tags in use
|
system.cpu.icache.tags.tagsinuse 1795.138964 # Cycle average of tags in use
|
||||||
system.cpu.icache.tags.total_refs 398660993 # Total number of references to valid blocks.
|
system.cpu.icache.tags.total_refs 398660993 # Total number of references to valid blocks.
|
||||||
|
|
|
@ -146,5 +146,6 @@ system.cpu.num_idle_cycles 0 # Nu
|
||||||
system.cpu.num_busy_cycles 424688087 # Number of busy cycles
|
system.cpu.num_busy_cycles 424688087 # Number of busy cycles
|
||||||
system.cpu.not_idle_fraction 1 # Percentage of non-idle cycles
|
system.cpu.not_idle_fraction 1 # Percentage of non-idle cycles
|
||||||
system.cpu.idle_fraction 0 # Percentage of idle cycles
|
system.cpu.idle_fraction 0 # Percentage of idle cycles
|
||||||
|
system.cpu.Branches 30563502 # Number of branches fetched
|
||||||
|
|
||||||
---------- End Simulation Statistics ----------
|
---------- End Simulation Statistics ----------
|
||||||
|
|
|
@ -4,11 +4,11 @@ sim_seconds 0.525834 # Nu
|
||||||
sim_ticks 525834342000 # Number of ticks simulated
|
sim_ticks 525834342000 # Number of ticks simulated
|
||||||
final_tick 525834342000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
|
final_tick 525834342000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
|
||||||
sim_freq 1000000000000 # Frequency of simulated ticks
|
sim_freq 1000000000000 # Frequency of simulated ticks
|
||||||
host_inst_rate 719381 # Simulator instruction rate (inst/s)
|
host_inst_rate 485432 # Simulator instruction rate (inst/s)
|
||||||
host_op_rate 919702 # Simulator op (including micro ops) rate (op/s)
|
host_op_rate 620607 # Simulator op (including micro ops) rate (op/s)
|
||||||
host_tick_rate 1386947293 # Simulator tick rate (ticks/s)
|
host_tick_rate 935900071 # Simulator tick rate (ticks/s)
|
||||||
host_mem_usage 276148 # Number of bytes of host memory used
|
host_mem_usage 332908 # Number of bytes of host memory used
|
||||||
host_seconds 379.13 # Real time elapsed on the host
|
host_seconds 561.85 # Real time elapsed on the host
|
||||||
sim_insts 272739283 # Number of instructions simulated
|
sim_insts 272739283 # Number of instructions simulated
|
||||||
sim_ops 348687122 # Number of ops (including micro ops) simulated
|
sim_ops 348687122 # Number of ops (including micro ops) simulated
|
||||||
system.voltage_domain.voltage 1 # Voltage in Volts
|
system.voltage_domain.voltage 1 # Voltage in Volts
|
||||||
|
@ -152,6 +152,7 @@ system.cpu.num_idle_cycles 0 # Nu
|
||||||
system.cpu.num_busy_cycles 1051668684 # Number of busy cycles
|
system.cpu.num_busy_cycles 1051668684 # Number of busy cycles
|
||||||
system.cpu.not_idle_fraction 1 # Percentage of non-idle cycles
|
system.cpu.not_idle_fraction 1 # Percentage of non-idle cycles
|
||||||
system.cpu.idle_fraction 0 # Percentage of idle cycles
|
system.cpu.idle_fraction 0 # Percentage of idle cycles
|
||||||
|
system.cpu.Branches 30563501 # Number of branches fetched
|
||||||
system.cpu.icache.tags.replacements 13796 # number of replacements
|
system.cpu.icache.tags.replacements 13796 # number of replacements
|
||||||
system.cpu.icache.tags.tagsinuse 1765.993223 # Cycle average of tags in use
|
system.cpu.icache.tags.tagsinuse 1765.993223 # Cycle average of tags in use
|
||||||
system.cpu.icache.tags.total_refs 348644747 # Total number of references to valid blocks.
|
system.cpu.icache.tags.total_refs 348644747 # Total number of references to valid blocks.
|
||||||
|
|
|
@ -4,11 +4,11 @@ sim_seconds 1.004711 # Nu
|
||||||
sim_ticks 1004710587000 # Number of ticks simulated
|
sim_ticks 1004710587000 # Number of ticks simulated
|
||||||
final_tick 1004710587000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
|
final_tick 1004710587000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
|
||||||
sim_freq 1000000000000 # Frequency of simulated ticks
|
sim_freq 1000000000000 # Frequency of simulated ticks
|
||||||
host_inst_rate 3768106 # Simulator instruction rate (inst/s)
|
host_inst_rate 1945820 # Simulator instruction rate (inst/s)
|
||||||
host_op_rate 3768106 # Simulator op (including micro ops) rate (op/s)
|
host_op_rate 1945820 # Simulator op (including micro ops) rate (op/s)
|
||||||
host_tick_rate 1884459398 # Simulator tick rate (ticks/s)
|
host_tick_rate 973120006 # Simulator tick rate (ticks/s)
|
||||||
host_mem_usage 229696 # Number of bytes of host memory used
|
host_mem_usage 280320 # Number of bytes of host memory used
|
||||||
host_seconds 533.16 # Real time elapsed on the host
|
host_seconds 1032.46 # Real time elapsed on the host
|
||||||
sim_insts 2008987605 # Number of instructions simulated
|
sim_insts 2008987605 # Number of instructions simulated
|
||||||
sim_ops 2008987605 # Number of ops (including micro ops) simulated
|
sim_ops 2008987605 # Number of ops (including micro ops) simulated
|
||||||
system.voltage_domain.voltage 1 # Voltage in Volts
|
system.voltage_domain.voltage 1 # Voltage in Volts
|
||||||
|
@ -94,5 +94,6 @@ system.cpu.num_idle_cycles 0 # Nu
|
||||||
system.cpu.num_busy_cycles 2009421175 # Number of busy cycles
|
system.cpu.num_busy_cycles 2009421175 # Number of busy cycles
|
||||||
system.cpu.not_idle_fraction 1 # Percentage of non-idle cycles
|
system.cpu.not_idle_fraction 1 # Percentage of non-idle cycles
|
||||||
system.cpu.idle_fraction 0 # Percentage of idle cycles
|
system.cpu.idle_fraction 0 # Percentage of idle cycles
|
||||||
|
system.cpu.Branches 266706457 # Number of branches fetched
|
||||||
|
|
||||||
---------- End Simulation Statistics ----------
|
---------- End Simulation Statistics ----------
|
||||||
|
|
|
@ -4,11 +4,11 @@ sim_seconds 2.769740 # Nu
|
||||||
sim_ticks 2769739533000 # Number of ticks simulated
|
sim_ticks 2769739533000 # Number of ticks simulated
|
||||||
final_tick 2769739533000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
|
final_tick 2769739533000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
|
||||||
sim_freq 1000000000000 # Frequency of simulated ticks
|
sim_freq 1000000000000 # Frequency of simulated ticks
|
||||||
host_inst_rate 1540787 # Simulator instruction rate (inst/s)
|
host_inst_rate 1066482 # Simulator instruction rate (inst/s)
|
||||||
host_op_rate 1540787 # Simulator op (including micro ops) rate (op/s)
|
host_op_rate 1066482 # Simulator op (including micro ops) rate (op/s)
|
||||||
host_tick_rate 2124243508 # Simulator tick rate (ticks/s)
|
host_tick_rate 1470331870 # Simulator tick rate (ticks/s)
|
||||||
host_mem_usage 238596 # Number of bytes of host memory used
|
host_mem_usage 289152 # Number of bytes of host memory used
|
||||||
host_seconds 1303.87 # Real time elapsed on the host
|
host_seconds 1883.75 # Real time elapsed on the host
|
||||||
sim_insts 2008987605 # Number of instructions simulated
|
sim_insts 2008987605 # Number of instructions simulated
|
||||||
sim_ops 2008987605 # Number of ops (including micro ops) simulated
|
sim_ops 2008987605 # Number of ops (including micro ops) simulated
|
||||||
system.voltage_domain.voltage 1 # Voltage in Volts
|
system.voltage_domain.voltage 1 # Voltage in Volts
|
||||||
|
@ -108,6 +108,7 @@ system.cpu.num_idle_cycles 0 # Nu
|
||||||
system.cpu.num_busy_cycles 5539479066 # Number of busy cycles
|
system.cpu.num_busy_cycles 5539479066 # Number of busy cycles
|
||||||
system.cpu.not_idle_fraction 1 # Percentage of non-idle cycles
|
system.cpu.not_idle_fraction 1 # Percentage of non-idle cycles
|
||||||
system.cpu.idle_fraction 0 # Percentage of idle cycles
|
system.cpu.idle_fraction 0 # Percentage of idle cycles
|
||||||
|
system.cpu.Branches 266706457 # Number of branches fetched
|
||||||
system.cpu.icache.tags.replacements 9046 # number of replacements
|
system.cpu.icache.tags.replacements 9046 # number of replacements
|
||||||
system.cpu.icache.tags.tagsinuse 1478.418050 # Cycle average of tags in use
|
system.cpu.icache.tags.tagsinuse 1478.418050 # Cycle average of tags in use
|
||||||
system.cpu.icache.tags.total_refs 2009410475 # Total number of references to valid blocks.
|
system.cpu.icache.tags.total_refs 2009410475 # Total number of references to valid blocks.
|
||||||
|
|
|
@ -4,11 +4,11 @@ sim_seconds 0.945613 # Nu
|
||||||
sim_ticks 945613126000 # Number of ticks simulated
|
sim_ticks 945613126000 # Number of ticks simulated
|
||||||
final_tick 945613126000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
|
final_tick 945613126000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
|
||||||
sim_freq 1000000000000 # Frequency of simulated ticks
|
sim_freq 1000000000000 # Frequency of simulated ticks
|
||||||
host_inst_rate 1603190 # Simulator instruction rate (inst/s)
|
host_inst_rate 1077492 # Simulator instruction rate (inst/s)
|
||||||
host_op_rate 2183323 # Simulator op (including micro ops) rate (op/s)
|
host_op_rate 1467395 # Simulator op (including micro ops) rate (op/s)
|
||||||
host_tick_rate 1095071931 # Simulator tick rate (ticks/s)
|
host_tick_rate 735989505 # Simulator tick rate (ticks/s)
|
||||||
host_mem_usage 266996 # Number of bytes of host memory used
|
host_mem_usage 323780 # Number of bytes of host memory used
|
||||||
host_seconds 863.52 # Real time elapsed on the host
|
host_seconds 1284.82 # Real time elapsed on the host
|
||||||
sim_insts 1384381606 # Number of instructions simulated
|
sim_insts 1384381606 # Number of instructions simulated
|
||||||
sim_ops 1885336358 # Number of ops (including micro ops) simulated
|
sim_ops 1885336358 # Number of ops (including micro ops) simulated
|
||||||
system.voltage_domain.voltage 1 # Voltage in Volts
|
system.voltage_domain.voltage 1 # Voltage in Volts
|
||||||
|
@ -146,5 +146,6 @@ system.cpu.num_idle_cycles 0 # Nu
|
||||||
system.cpu.num_busy_cycles 1891226253 # Number of busy cycles
|
system.cpu.num_busy_cycles 1891226253 # Number of busy cycles
|
||||||
system.cpu.not_idle_fraction 1 # Percentage of non-idle cycles
|
system.cpu.not_idle_fraction 1 # Percentage of non-idle cycles
|
||||||
system.cpu.idle_fraction 0 # Percentage of idle cycles
|
system.cpu.idle_fraction 0 # Percentage of idle cycles
|
||||||
|
system.cpu.Branches 298259106 # Number of branches fetched
|
||||||
|
|
||||||
---------- End Simulation Statistics ----------
|
---------- End Simulation Statistics ----------
|
||||||
|
|
|
@ -4,11 +4,11 @@ sim_seconds 2.326119 # Nu
|
||||||
sim_ticks 2326118592000 # Number of ticks simulated
|
sim_ticks 2326118592000 # Number of ticks simulated
|
||||||
final_tick 2326118592000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
|
final_tick 2326118592000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
|
||||||
sim_freq 1000000000000 # Frequency of simulated ticks
|
sim_freq 1000000000000 # Frequency of simulated ticks
|
||||||
host_inst_rate 908275 # Simulator instruction rate (inst/s)
|
host_inst_rate 546207 # Simulator instruction rate (inst/s)
|
||||||
host_op_rate 1232140 # Simulator op (including micro ops) rate (op/s)
|
host_op_rate 740969 # Simulator op (including micro ops) rate (op/s)
|
||||||
host_tick_rate 1529204664 # Simulator tick rate (ticks/s)
|
host_tick_rate 919614125 # Simulator tick rate (ticks/s)
|
||||||
host_mem_usage 276728 # Number of bytes of host memory used
|
host_mem_usage 332488 # Number of bytes of host memory used
|
||||||
host_seconds 1521.13 # Real time elapsed on the host
|
host_seconds 2529.45 # Real time elapsed on the host
|
||||||
sim_insts 1381604339 # Number of instructions simulated
|
sim_insts 1381604339 # Number of instructions simulated
|
||||||
sim_ops 1874244941 # Number of ops (including micro ops) simulated
|
sim_ops 1874244941 # Number of ops (including micro ops) simulated
|
||||||
system.voltage_domain.voltage 1 # Voltage in Volts
|
system.voltage_domain.voltage 1 # Voltage in Volts
|
||||||
|
@ -160,6 +160,7 @@ system.cpu.num_idle_cycles 0 # Nu
|
||||||
system.cpu.num_busy_cycles 4652237184 # Number of busy cycles
|
system.cpu.num_busy_cycles 4652237184 # Number of busy cycles
|
||||||
system.cpu.not_idle_fraction 1 # Percentage of non-idle cycles
|
system.cpu.not_idle_fraction 1 # Percentage of non-idle cycles
|
||||||
system.cpu.idle_fraction 0 # Percentage of idle cycles
|
system.cpu.idle_fraction 0 # Percentage of idle cycles
|
||||||
|
system.cpu.Branches 298259106 # Number of branches fetched
|
||||||
system.cpu.icache.tags.replacements 18364 # number of replacements
|
system.cpu.icache.tags.replacements 18364 # number of replacements
|
||||||
system.cpu.icache.tags.tagsinuse 1392.317060 # Cycle average of tags in use
|
system.cpu.icache.tags.tagsinuse 1392.317060 # Cycle average of tags in use
|
||||||
system.cpu.icache.tags.total_refs 1390251699 # Total number of references to valid blocks.
|
system.cpu.icache.tags.total_refs 1390251699 # Total number of references to valid blocks.
|
||||||
|
|
|
@ -4,11 +4,11 @@ sim_seconds 0.044221 # Nu
|
||||||
sim_ticks 44221003000 # Number of ticks simulated
|
sim_ticks 44221003000 # Number of ticks simulated
|
||||||
final_tick 44221003000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
|
final_tick 44221003000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
|
||||||
sim_freq 1000000000000 # Frequency of simulated ticks
|
sim_freq 1000000000000 # Frequency of simulated ticks
|
||||||
host_inst_rate 3596409 # Simulator instruction rate (inst/s)
|
host_inst_rate 1834941 # Simulator instruction rate (inst/s)
|
||||||
host_op_rate 3596407 # Simulator op (including micro ops) rate (op/s)
|
host_op_rate 1834940 # Simulator op (including micro ops) rate (op/s)
|
||||||
host_tick_rate 1800265277 # Simulator tick rate (ticks/s)
|
host_tick_rate 918522034 # Simulator tick rate (ticks/s)
|
||||||
host_mem_usage 228820 # Number of bytes of host memory used
|
host_mem_usage 279452 # Number of bytes of host memory used
|
||||||
host_seconds 24.56 # Real time elapsed on the host
|
host_seconds 48.14 # Real time elapsed on the host
|
||||||
sim_insts 88340673 # Number of instructions simulated
|
sim_insts 88340673 # Number of instructions simulated
|
||||||
sim_ops 88340673 # Number of ops (including micro ops) simulated
|
sim_ops 88340673 # Number of ops (including micro ops) simulated
|
||||||
system.voltage_domain.voltage 1 # Voltage in Volts
|
system.voltage_domain.voltage 1 # Voltage in Volts
|
||||||
|
@ -94,5 +94,6 @@ system.cpu.num_idle_cycles 0 # Nu
|
||||||
system.cpu.num_busy_cycles 88442007 # Number of busy cycles
|
system.cpu.num_busy_cycles 88442007 # Number of busy cycles
|
||||||
system.cpu.not_idle_fraction 1 # Percentage of non-idle cycles
|
system.cpu.not_idle_fraction 1 # Percentage of non-idle cycles
|
||||||
system.cpu.idle_fraction 0 # Percentage of idle cycles
|
system.cpu.idle_fraction 0 # Percentage of idle cycles
|
||||||
|
system.cpu.Branches 13754477 # Number of branches fetched
|
||||||
|
|
||||||
---------- End Simulation Statistics ----------
|
---------- End Simulation Statistics ----------
|
||||||
|
|
|
@ -4,11 +4,11 @@ sim_seconds 0.133635 # Nu
|
||||||
sim_ticks 133634727000 # Number of ticks simulated
|
sim_ticks 133634727000 # Number of ticks simulated
|
||||||
final_tick 133634727000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
|
final_tick 133634727000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
|
||||||
sim_freq 1000000000000 # Frequency of simulated ticks
|
sim_freq 1000000000000 # Frequency of simulated ticks
|
||||||
host_inst_rate 1534458 # Simulator instruction rate (inst/s)
|
host_inst_rate 990858 # Simulator instruction rate (inst/s)
|
||||||
host_op_rate 1534458 # Simulator op (including micro ops) rate (op/s)
|
host_op_rate 990858 # Simulator op (including micro ops) rate (op/s)
|
||||||
host_tick_rate 2321204993 # Simulator tick rate (ticks/s)
|
host_tick_rate 1498890062 # Simulator tick rate (ticks/s)
|
||||||
host_mem_usage 237688 # Number of bytes of host memory used
|
host_mem_usage 288280 # Number of bytes of host memory used
|
||||||
host_seconds 57.57 # Real time elapsed on the host
|
host_seconds 89.16 # Real time elapsed on the host
|
||||||
sim_insts 88340673 # Number of instructions simulated
|
sim_insts 88340673 # Number of instructions simulated
|
||||||
sim_ops 88340673 # Number of ops (including micro ops) simulated
|
sim_ops 88340673 # Number of ops (including micro ops) simulated
|
||||||
system.voltage_domain.voltage 1 # Voltage in Volts
|
system.voltage_domain.voltage 1 # Voltage in Volts
|
||||||
|
@ -108,6 +108,7 @@ system.cpu.num_idle_cycles 0 # Nu
|
||||||
system.cpu.num_busy_cycles 267269454 # Number of busy cycles
|
system.cpu.num_busy_cycles 267269454 # Number of busy cycles
|
||||||
system.cpu.not_idle_fraction 1 # Percentage of non-idle cycles
|
system.cpu.not_idle_fraction 1 # Percentage of non-idle cycles
|
||||||
system.cpu.idle_fraction 0 # Percentage of idle cycles
|
system.cpu.idle_fraction 0 # Percentage of idle cycles
|
||||||
|
system.cpu.Branches 13754477 # Number of branches fetched
|
||||||
system.cpu.icache.tags.replacements 74391 # number of replacements
|
system.cpu.icache.tags.replacements 74391 # number of replacements
|
||||||
system.cpu.icache.tags.tagsinuse 1871.686406 # Cycle average of tags in use
|
system.cpu.icache.tags.tagsinuse 1871.686406 # Cycle average of tags in use
|
||||||
system.cpu.icache.tags.total_refs 88361638 # Total number of references to valid blocks.
|
system.cpu.icache.tags.total_refs 88361638 # Total number of references to valid blocks.
|
||||||
|
|
|
@ -4,11 +4,11 @@ sim_seconds 0.053932 # Nu
|
||||||
sim_ticks 53932157000 # Number of ticks simulated
|
sim_ticks 53932157000 # Number of ticks simulated
|
||||||
final_tick 53932157000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
|
final_tick 53932157000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
|
||||||
sim_freq 1000000000000 # Frequency of simulated ticks
|
sim_freq 1000000000000 # Frequency of simulated ticks
|
||||||
host_inst_rate 1720542 # Simulator instruction rate (inst/s)
|
host_inst_rate 1050888 # Simulator instruction rate (inst/s)
|
||||||
host_op_rate 2441608 # Simulator op (including micro ops) rate (op/s)
|
host_op_rate 1491308 # Simulator op (including micro ops) rate (op/s)
|
||||||
host_tick_rate 1308536096 # Simulator tick rate (ticks/s)
|
host_tick_rate 799239680 # Simulator tick rate (ticks/s)
|
||||||
host_mem_usage 265732 # Number of bytes of host memory used
|
host_mem_usage 322556 # Number of bytes of host memory used
|
||||||
host_seconds 41.22 # Real time elapsed on the host
|
host_seconds 67.48 # Real time elapsed on the host
|
||||||
sim_insts 70913181 # Number of instructions simulated
|
sim_insts 70913181 # Number of instructions simulated
|
||||||
sim_ops 100632428 # Number of ops (including micro ops) simulated
|
sim_ops 100632428 # Number of ops (including micro ops) simulated
|
||||||
system.voltage_domain.voltage 1 # Voltage in Volts
|
system.voltage_domain.voltage 1 # Voltage in Volts
|
||||||
|
@ -146,5 +146,6 @@ system.cpu.num_idle_cycles 0 # Nu
|
||||||
system.cpu.num_busy_cycles 107864315 # Number of busy cycles
|
system.cpu.num_busy_cycles 107864315 # Number of busy cycles
|
||||||
system.cpu.not_idle_fraction 1 # Percentage of non-idle cycles
|
system.cpu.not_idle_fraction 1 # Percentage of non-idle cycles
|
||||||
system.cpu.idle_fraction 0 # Percentage of idle cycles
|
system.cpu.idle_fraction 0 # Percentage of idle cycles
|
||||||
|
system.cpu.Branches 13741485 # Number of branches fetched
|
||||||
|
|
||||||
---------- End Simulation Statistics ----------
|
---------- End Simulation Statistics ----------
|
||||||
|
|
|
@ -4,11 +4,11 @@ sim_seconds 0.132689 # Nu
|
||||||
sim_ticks 132689045000 # Number of ticks simulated
|
sim_ticks 132689045000 # Number of ticks simulated
|
||||||
final_tick 132689045000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
|
final_tick 132689045000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
|
||||||
sim_freq 1000000000000 # Frequency of simulated ticks
|
sim_freq 1000000000000 # Frequency of simulated ticks
|
||||||
host_inst_rate 945773 # Simulator instruction rate (inst/s)
|
host_inst_rate 552138 # Simulator instruction rate (inst/s)
|
||||||
host_op_rate 1341131 # Simulator op (including micro ops) rate (op/s)
|
host_op_rate 782946 # Simulator op (including micro ops) rate (op/s)
|
||||||
host_tick_rate 1783248877 # Simulator tick rate (ticks/s)
|
host_tick_rate 1041052140 # Simulator tick rate (ticks/s)
|
||||||
host_mem_usage 275500 # Number of bytes of host memory used
|
host_mem_usage 332284 # Number of bytes of host memory used
|
||||||
host_seconds 74.41 # Real time elapsed on the host
|
host_seconds 127.46 # Real time elapsed on the host
|
||||||
sim_insts 70373628 # Number of instructions simulated
|
sim_insts 70373628 # Number of instructions simulated
|
||||||
sim_ops 99791654 # Number of ops (including micro ops) simulated
|
sim_ops 99791654 # Number of ops (including micro ops) simulated
|
||||||
system.voltage_domain.voltage 1 # Voltage in Volts
|
system.voltage_domain.voltage 1 # Voltage in Volts
|
||||||
|
@ -160,6 +160,7 @@ system.cpu.num_idle_cycles 0 # Nu
|
||||||
system.cpu.num_busy_cycles 265378090 # Number of busy cycles
|
system.cpu.num_busy_cycles 265378090 # Number of busy cycles
|
||||||
system.cpu.not_idle_fraction 1 # Percentage of non-idle cycles
|
system.cpu.not_idle_fraction 1 # Percentage of non-idle cycles
|
||||||
system.cpu.idle_fraction 0 # Percentage of idle cycles
|
system.cpu.idle_fraction 0 # Percentage of idle cycles
|
||||||
|
system.cpu.Branches 13741485 # Number of branches fetched
|
||||||
system.cpu.icache.tags.replacements 16890 # number of replacements
|
system.cpu.icache.tags.replacements 16890 # number of replacements
|
||||||
system.cpu.icache.tags.tagsinuse 1736.497265 # Cycle average of tags in use
|
system.cpu.icache.tags.tagsinuse 1736.497265 # Cycle average of tags in use
|
||||||
system.cpu.icache.tags.total_refs 78126161 # Total number of references to valid blocks.
|
system.cpu.icache.tags.total_refs 78126161 # Total number of references to valid blocks.
|
||||||
|
|
|
@ -4,11 +4,11 @@ sim_seconds 0.068149 # Nu
|
||||||
sim_ticks 68148672000 # Number of ticks simulated
|
sim_ticks 68148672000 # Number of ticks simulated
|
||||||
final_tick 68148672000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
|
final_tick 68148672000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
|
||||||
sim_freq 1000000000000 # Frequency of simulated ticks
|
sim_freq 1000000000000 # Frequency of simulated ticks
|
||||||
host_inst_rate 3132375 # Simulator instruction rate (inst/s)
|
host_inst_rate 1921737 # Simulator instruction rate (inst/s)
|
||||||
host_op_rate 3172933 # Simulator op (including micro ops) rate (op/s)
|
host_op_rate 1946620 # Simulator op (including micro ops) rate (op/s)
|
||||||
host_tick_rate 1588309038 # Simulator tick rate (ticks/s)
|
host_tick_rate 974440461 # Simulator tick rate (ticks/s)
|
||||||
host_mem_usage 237324 # Number of bytes of host memory used
|
host_mem_usage 287756 # Number of bytes of host memory used
|
||||||
host_seconds 42.91 # Real time elapsed on the host
|
host_seconds 69.94 # Real time elapsed on the host
|
||||||
sim_insts 134398962 # Number of instructions simulated
|
sim_insts 134398962 # Number of instructions simulated
|
||||||
sim_ops 136139190 # Number of ops (including micro ops) simulated
|
sim_ops 136139190 # Number of ops (including micro ops) simulated
|
||||||
system.voltage_domain.voltage 1 # Voltage in Volts
|
system.voltage_domain.voltage 1 # Voltage in Volts
|
||||||
|
@ -64,5 +64,6 @@ system.cpu.num_idle_cycles 0 # Nu
|
||||||
system.cpu.num_busy_cycles 136297345 # Number of busy cycles
|
system.cpu.num_busy_cycles 136297345 # Number of busy cycles
|
||||||
system.cpu.not_idle_fraction 1 # Percentage of non-idle cycles
|
system.cpu.not_idle_fraction 1 # Percentage of non-idle cycles
|
||||||
system.cpu.idle_fraction 0 # Percentage of idle cycles
|
system.cpu.idle_fraction 0 # Percentage of idle cycles
|
||||||
|
system.cpu.Branches 12719095 # Number of branches fetched
|
||||||
|
|
||||||
---------- End Simulation Statistics ----------
|
---------- End Simulation Statistics ----------
|
||||||
|
|
|
@ -4,11 +4,11 @@ sim_seconds 0.202242 # Nu
|
||||||
sim_ticks 202242260000 # Number of ticks simulated
|
sim_ticks 202242260000 # Number of ticks simulated
|
||||||
final_tick 202242260000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
|
final_tick 202242260000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
|
||||||
sim_freq 1000000000000 # Frequency of simulated ticks
|
sim_freq 1000000000000 # Frequency of simulated ticks
|
||||||
host_inst_rate 1441010 # Simulator instruction rate (inst/s)
|
host_inst_rate 840358 # Simulator instruction rate (inst/s)
|
||||||
host_op_rate 1459668 # Simulator op (including micro ops) rate (op/s)
|
host_op_rate 851239 # Simulator op (including micro ops) rate (op/s)
|
||||||
host_tick_rate 2168416558 # Simulator tick rate (ticks/s)
|
host_tick_rate 1264562009 # Simulator tick rate (ticks/s)
|
||||||
host_mem_usage 246160 # Number of bytes of host memory used
|
host_mem_usage 296592 # Number of bytes of host memory used
|
||||||
host_seconds 93.27 # Real time elapsed on the host
|
host_seconds 159.93 # Real time elapsed on the host
|
||||||
sim_insts 134398962 # Number of instructions simulated
|
sim_insts 134398962 # Number of instructions simulated
|
||||||
sim_ops 136139190 # Number of ops (including micro ops) simulated
|
sim_ops 136139190 # Number of ops (including micro ops) simulated
|
||||||
system.voltage_domain.voltage 1 # Voltage in Volts
|
system.voltage_domain.voltage 1 # Voltage in Volts
|
||||||
|
@ -76,6 +76,7 @@ system.cpu.num_idle_cycles 0 # Nu
|
||||||
system.cpu.num_busy_cycles 404484520 # Number of busy cycles
|
system.cpu.num_busy_cycles 404484520 # Number of busy cycles
|
||||||
system.cpu.not_idle_fraction 1 # Percentage of non-idle cycles
|
system.cpu.not_idle_fraction 1 # Percentage of non-idle cycles
|
||||||
system.cpu.idle_fraction 0 # Percentage of idle cycles
|
system.cpu.idle_fraction 0 # Percentage of idle cycles
|
||||||
|
system.cpu.Branches 12719095 # Number of branches fetched
|
||||||
system.cpu.icache.tags.replacements 184976 # number of replacements
|
system.cpu.icache.tags.replacements 184976 # number of replacements
|
||||||
system.cpu.icache.tags.tagsinuse 2004.815325 # Cycle average of tags in use
|
system.cpu.icache.tags.tagsinuse 2004.815325 # Cycle average of tags in use
|
||||||
system.cpu.icache.tags.total_refs 134366547 # Total number of references to valid blocks.
|
system.cpu.icache.tags.total_refs 134366547 # Total number of references to valid blocks.
|
||||||
|
|
|
@ -4,11 +4,11 @@ sim_seconds 0.913189 # Nu
|
||||||
sim_ticks 913189263000 # Number of ticks simulated
|
sim_ticks 913189263000 # Number of ticks simulated
|
||||||
final_tick 913189263000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
|
final_tick 913189263000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
|
||||||
sim_freq 1000000000000 # Frequency of simulated ticks
|
sim_freq 1000000000000 # Frequency of simulated ticks
|
||||||
host_inst_rate 3833053 # Simulator instruction rate (inst/s)
|
host_inst_rate 1966439 # Simulator instruction rate (inst/s)
|
||||||
host_op_rate 3833053 # Simulator op (including micro ops) rate (op/s)
|
host_op_rate 1966439 # Simulator op (including micro ops) rate (op/s)
|
||||||
host_tick_rate 1923475514 # Simulator tick rate (ticks/s)
|
host_tick_rate 986784511 # Simulator tick rate (ticks/s)
|
||||||
host_mem_usage 220744 # Number of bytes of host memory used
|
host_mem_usage 271364 # Number of bytes of host memory used
|
||||||
host_seconds 474.76 # Real time elapsed on the host
|
host_seconds 925.42 # Real time elapsed on the host
|
||||||
sim_insts 1819780127 # Number of instructions simulated
|
sim_insts 1819780127 # Number of instructions simulated
|
||||||
sim_ops 1819780127 # Number of ops (including micro ops) simulated
|
sim_ops 1819780127 # Number of ops (including micro ops) simulated
|
||||||
system.voltage_domain.voltage 1 # Voltage in Volts
|
system.voltage_domain.voltage 1 # Voltage in Volts
|
||||||
|
@ -94,5 +94,6 @@ system.cpu.num_idle_cycles 0 # Nu
|
||||||
system.cpu.num_busy_cycles 1826378527 # Number of busy cycles
|
system.cpu.num_busy_cycles 1826378527 # Number of busy cycles
|
||||||
system.cpu.not_idle_fraction 1 # Percentage of non-idle cycles
|
system.cpu.not_idle_fraction 1 # Percentage of non-idle cycles
|
||||||
system.cpu.idle_fraction 0 # Percentage of idle cycles
|
system.cpu.idle_fraction 0 # Percentage of idle cycles
|
||||||
|
system.cpu.Branches 214632552 # Number of branches fetched
|
||||||
|
|
||||||
---------- End Simulation Statistics ----------
|
---------- End Simulation Statistics ----------
|
||||||
|
|
|
@ -4,11 +4,11 @@ sim_seconds 2.623386 # Nu
|
||||||
sim_ticks 2623386226000 # Number of ticks simulated
|
sim_ticks 2623386226000 # Number of ticks simulated
|
||||||
final_tick 2623386226000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
|
final_tick 2623386226000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
|
||||||
sim_freq 1000000000000 # Frequency of simulated ticks
|
sim_freq 1000000000000 # Frequency of simulated ticks
|
||||||
host_inst_rate 1625838 # Simulator instruction rate (inst/s)
|
host_inst_rate 1078959 # Simulator instruction rate (inst/s)
|
||||||
host_op_rate 1625838 # Simulator op (including micro ops) rate (op/s)
|
host_op_rate 1078959 # Simulator op (including micro ops) rate (op/s)
|
||||||
host_tick_rate 2343799751 # Simulator tick rate (ticks/s)
|
host_tick_rate 1555422646 # Simulator tick rate (ticks/s)
|
||||||
host_mem_usage 229480 # Number of bytes of host memory used
|
host_mem_usage 280076 # Number of bytes of host memory used
|
||||||
host_seconds 1119.29 # Real time elapsed on the host
|
host_seconds 1686.61 # Real time elapsed on the host
|
||||||
sim_insts 1819780127 # Number of instructions simulated
|
sim_insts 1819780127 # Number of instructions simulated
|
||||||
sim_ops 1819780127 # Number of ops (including micro ops) simulated
|
sim_ops 1819780127 # Number of ops (including micro ops) simulated
|
||||||
system.voltage_domain.voltage 1 # Voltage in Volts
|
system.voltage_domain.voltage 1 # Voltage in Volts
|
||||||
|
@ -108,6 +108,7 @@ system.cpu.num_idle_cycles 0 # Nu
|
||||||
system.cpu.num_busy_cycles 5246772452 # Number of busy cycles
|
system.cpu.num_busy_cycles 5246772452 # Number of busy cycles
|
||||||
system.cpu.not_idle_fraction 1 # Percentage of non-idle cycles
|
system.cpu.not_idle_fraction 1 # Percentage of non-idle cycles
|
||||||
system.cpu.idle_fraction 0 # Percentage of idle cycles
|
system.cpu.idle_fraction 0 # Percentage of idle cycles
|
||||||
|
system.cpu.Branches 214632552 # Number of branches fetched
|
||||||
system.cpu.icache.tags.replacements 1 # number of replacements
|
system.cpu.icache.tags.replacements 1 # number of replacements
|
||||||
system.cpu.icache.tags.tagsinuse 612.458646 # Cycle average of tags in use
|
system.cpu.icache.tags.tagsinuse 612.458646 # Cycle average of tags in use
|
||||||
system.cpu.icache.tags.total_refs 1826377708 # Total number of references to valid blocks.
|
system.cpu.icache.tags.total_refs 1826377708 # Total number of references to valid blocks.
|
||||||
|
|
|
@ -146,5 +146,6 @@ system.cpu.num_idle_cycles 0 # Nu
|
||||||
system.cpu.num_busy_cycles 1723076401 # Number of busy cycles
|
system.cpu.num_busy_cycles 1723076401 # Number of busy cycles
|
||||||
system.cpu.not_idle_fraction 1 # Percentage of non-idle cycles
|
system.cpu.not_idle_fraction 1 # Percentage of non-idle cycles
|
||||||
system.cpu.idle_fraction 0 # Percentage of idle cycles
|
system.cpu.idle_fraction 0 # Percentage of idle cycles
|
||||||
|
system.cpu.Branches 213462426 # Number of branches fetched
|
||||||
|
|
||||||
---------- End Simulation Statistics ----------
|
---------- End Simulation Statistics ----------
|
||||||
|
|
|
@ -160,6 +160,7 @@ system.cpu.num_idle_cycles 0 # Nu
|
||||||
system.cpu.num_busy_cycles 4782410230 # Number of busy cycles
|
system.cpu.num_busy_cycles 4782410230 # Number of busy cycles
|
||||||
system.cpu.not_idle_fraction 1 # Percentage of non-idle cycles
|
system.cpu.not_idle_fraction 1 # Percentage of non-idle cycles
|
||||||
system.cpu.idle_fraction 0 # Percentage of idle cycles
|
system.cpu.idle_fraction 0 # Percentage of idle cycles
|
||||||
|
system.cpu.Branches 213462426 # Number of branches fetched
|
||||||
system.cpu.icache.tags.replacements 7 # number of replacements
|
system.cpu.icache.tags.replacements 7 # number of replacements
|
||||||
system.cpu.icache.tags.tagsinuse 514.976015 # Cycle average of tags in use
|
system.cpu.icache.tags.tagsinuse 514.976015 # Cycle average of tags in use
|
||||||
system.cpu.icache.tags.total_refs 1544564952 # Total number of references to valid blocks.
|
system.cpu.icache.tags.total_refs 1544564952 # Total number of references to valid blocks.
|
||||||
|
|
|
@ -4,11 +4,11 @@ sim_seconds 2.846007 # Nu
|
||||||
sim_ticks 2846007227500 # Number of ticks simulated
|
sim_ticks 2846007227500 # Number of ticks simulated
|
||||||
final_tick 2846007227500 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
|
final_tick 2846007227500 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
|
||||||
sim_freq 1000000000000 # Frequency of simulated ticks
|
sim_freq 1000000000000 # Frequency of simulated ticks
|
||||||
host_inst_rate 1743046 # Simulator instruction rate (inst/s)
|
host_inst_rate 1097459 # Simulator instruction rate (inst/s)
|
||||||
host_op_rate 2715824 # Simulator op (including micro ops) rate (op/s)
|
host_op_rate 1709940 # Simulator op (including micro ops) rate (op/s)
|
||||||
host_tick_rate 1649131867 # Simulator tick rate (ticks/s)
|
host_tick_rate 1038328376 # Simulator tick rate (ticks/s)
|
||||||
host_mem_usage 242928 # Number of bytes of host memory used
|
host_mem_usage 292828 # Number of bytes of host memory used
|
||||||
host_seconds 1725.76 # Real time elapsed on the host
|
host_seconds 2740.95 # Real time elapsed on the host
|
||||||
sim_insts 3008081022 # Number of instructions simulated
|
sim_insts 3008081022 # Number of instructions simulated
|
||||||
sim_ops 4686862596 # Number of ops (including micro ops) simulated
|
sim_ops 4686862596 # Number of ops (including micro ops) simulated
|
||||||
system.voltage_domain.voltage 1 # Voltage in Volts
|
system.voltage_domain.voltage 1 # Voltage in Volts
|
||||||
|
@ -65,5 +65,6 @@ system.cpu.num_idle_cycles 0 # Nu
|
||||||
system.cpu.num_busy_cycles 5692014456 # Number of busy cycles
|
system.cpu.num_busy_cycles 5692014456 # Number of busy cycles
|
||||||
system.cpu.not_idle_fraction 1 # Percentage of non-idle cycles
|
system.cpu.not_idle_fraction 1 # Percentage of non-idle cycles
|
||||||
system.cpu.idle_fraction 0 # Percentage of idle cycles
|
system.cpu.idle_fraction 0 # Percentage of idle cycles
|
||||||
|
system.cpu.Branches 248500691 # Number of branches fetched
|
||||||
|
|
||||||
---------- End Simulation Statistics ----------
|
---------- End Simulation Statistics ----------
|
||||||
|
|
|
@ -4,11 +4,11 @@ sim_seconds 5.882581 # Nu
|
||||||
sim_ticks 5882580526000 # Number of ticks simulated
|
sim_ticks 5882580526000 # Number of ticks simulated
|
||||||
final_tick 5882580526000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
|
final_tick 5882580526000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
|
||||||
sim_freq 1000000000000 # Frequency of simulated ticks
|
sim_freq 1000000000000 # Frequency of simulated ticks
|
||||||
host_inst_rate 833754 # Simulator instruction rate (inst/s)
|
host_inst_rate 532297 # Simulator instruction rate (inst/s)
|
||||||
host_op_rate 1299064 # Simulator op (including micro ops) rate (op/s)
|
host_op_rate 829367 # Simulator op (including micro ops) rate (op/s)
|
||||||
host_tick_rate 1630482633 # Simulator tick rate (ticks/s)
|
host_tick_rate 1040955661 # Simulator tick rate (ticks/s)
|
||||||
host_mem_usage 251632 # Number of bytes of host memory used
|
host_mem_usage 302560 # Number of bytes of host memory used
|
||||||
host_seconds 3607.88 # Real time elapsed on the host
|
host_seconds 5651.13 # Real time elapsed on the host
|
||||||
sim_insts 3008081022 # Number of instructions simulated
|
sim_insts 3008081022 # Number of instructions simulated
|
||||||
sim_ops 4686862596 # Number of ops (including micro ops) simulated
|
sim_ops 4686862596 # Number of ops (including micro ops) simulated
|
||||||
system.voltage_domain.voltage 1 # Voltage in Volts
|
system.voltage_domain.voltage 1 # Voltage in Volts
|
||||||
|
@ -81,6 +81,7 @@ system.cpu.num_idle_cycles 0 # Nu
|
||||||
system.cpu.num_busy_cycles 11765161052 # Number of busy cycles
|
system.cpu.num_busy_cycles 11765161052 # Number of busy cycles
|
||||||
system.cpu.not_idle_fraction 1 # Percentage of non-idle cycles
|
system.cpu.not_idle_fraction 1 # Percentage of non-idle cycles
|
||||||
system.cpu.idle_fraction 0 # Percentage of idle cycles
|
system.cpu.idle_fraction 0 # Percentage of idle cycles
|
||||||
|
system.cpu.Branches 248500691 # Number of branches fetched
|
||||||
system.cpu.icache.tags.replacements 10 # number of replacements
|
system.cpu.icache.tags.replacements 10 # number of replacements
|
||||||
system.cpu.icache.tags.tagsinuse 555.705054 # Cycle average of tags in use
|
system.cpu.icache.tags.tagsinuse 555.705054 # Cycle average of tags in use
|
||||||
system.cpu.icache.tags.total_refs 4013232208 # Total number of references to valid blocks.
|
system.cpu.icache.tags.total_refs 4013232208 # Total number of references to valid blocks.
|
||||||
|
|
|
@ -4,11 +4,11 @@ sim_seconds 0.045952 # Nu
|
||||||
sim_ticks 45951567500 # Number of ticks simulated
|
sim_ticks 45951567500 # Number of ticks simulated
|
||||||
final_tick 45951567500 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
|
final_tick 45951567500 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
|
||||||
sim_freq 1000000000000 # Frequency of simulated ticks
|
sim_freq 1000000000000 # Frequency of simulated ticks
|
||||||
host_inst_rate 2604589 # Simulator instruction rate (inst/s)
|
host_inst_rate 1649677 # Simulator instruction rate (inst/s)
|
||||||
host_op_rate 2604587 # Simulator op (including micro ops) rate (op/s)
|
host_op_rate 1649676 # Simulator op (including micro ops) rate (op/s)
|
||||||
host_tick_rate 1302294342 # Simulator tick rate (ticks/s)
|
host_tick_rate 824838449 # Simulator tick rate (ticks/s)
|
||||||
host_mem_usage 224388 # Number of bytes of host memory used
|
host_mem_usage 275016 # Number of bytes of host memory used
|
||||||
host_seconds 35.29 # Real time elapsed on the host
|
host_seconds 55.71 # Real time elapsed on the host
|
||||||
sim_insts 91903056 # Number of instructions simulated
|
sim_insts 91903056 # Number of instructions simulated
|
||||||
sim_ops 91903056 # Number of ops (including micro ops) simulated
|
sim_ops 91903056 # Number of ops (including micro ops) simulated
|
||||||
system.voltage_domain.voltage 1 # Voltage in Volts
|
system.voltage_domain.voltage 1 # Voltage in Volts
|
||||||
|
@ -94,5 +94,6 @@ system.cpu.num_idle_cycles 0 # Nu
|
||||||
system.cpu.num_busy_cycles 91903136 # Number of busy cycles
|
system.cpu.num_busy_cycles 91903136 # Number of busy cycles
|
||||||
system.cpu.not_idle_fraction 1 # Percentage of non-idle cycles
|
system.cpu.not_idle_fraction 1 # Percentage of non-idle cycles
|
||||||
system.cpu.idle_fraction 0 # Percentage of idle cycles
|
system.cpu.idle_fraction 0 # Percentage of idle cycles
|
||||||
|
system.cpu.Branches 10240685 # Number of branches fetched
|
||||||
|
|
||||||
---------- End Simulation Statistics ----------
|
---------- End Simulation Statistics ----------
|
||||||
|
|
|
@ -100,6 +100,7 @@ system.cpu.num_idle_cycles 0 # Nu
|
||||||
system.cpu.num_busy_cycles 237458632 # Number of busy cycles
|
system.cpu.num_busy_cycles 237458632 # Number of busy cycles
|
||||||
system.cpu.not_idle_fraction 1 # Percentage of non-idle cycles
|
system.cpu.not_idle_fraction 1 # Percentage of non-idle cycles
|
||||||
system.cpu.idle_fraction 0 # Percentage of idle cycles
|
system.cpu.idle_fraction 0 # Percentage of idle cycles
|
||||||
|
system.cpu.Branches 10240685 # Number of branches fetched
|
||||||
system.cpu.icache.tags.replacements 6681 # number of replacements
|
system.cpu.icache.tags.replacements 6681 # number of replacements
|
||||||
system.cpu.icache.tags.tagsinuse 1418.052773 # Cycle average of tags in use
|
system.cpu.icache.tags.tagsinuse 1418.052773 # Cycle average of tags in use
|
||||||
system.cpu.icache.tags.total_refs 91894580 # Total number of references to valid blocks.
|
system.cpu.icache.tags.total_refs 91894580 # Total number of references to valid blocks.
|
||||||
|
|
|
@ -146,5 +146,6 @@ system.cpu.num_idle_cycles 0 # Nu
|
||||||
system.cpu.num_busy_cycles 206213533 # Number of busy cycles
|
system.cpu.num_busy_cycles 206213533 # Number of busy cycles
|
||||||
system.cpu.not_idle_fraction 1 # Percentage of non-idle cycles
|
system.cpu.not_idle_fraction 1 # Percentage of non-idle cycles
|
||||||
system.cpu.idle_fraction 0 # Percentage of idle cycles
|
system.cpu.idle_fraction 0 # Percentage of idle cycles
|
||||||
|
system.cpu.Branches 40300311 # Number of branches fetched
|
||||||
|
|
||||||
---------- End Simulation Statistics ----------
|
---------- End Simulation Statistics ----------
|
||||||
|
|
|
@ -152,6 +152,7 @@ system.cpu.num_idle_cycles 0 # Nu
|
||||||
system.cpu.num_busy_cycles 464144608 # Number of busy cycles
|
system.cpu.num_busy_cycles 464144608 # Number of busy cycles
|
||||||
system.cpu.not_idle_fraction 1 # Percentage of non-idle cycles
|
system.cpu.not_idle_fraction 1 # Percentage of non-idle cycles
|
||||||
system.cpu.idle_fraction 0 # Percentage of idle cycles
|
system.cpu.idle_fraction 0 # Percentage of idle cycles
|
||||||
|
system.cpu.Branches 40300311 # Number of branches fetched
|
||||||
system.cpu.icache.tags.replacements 1506 # number of replacements
|
system.cpu.icache.tags.replacements 1506 # number of replacements
|
||||||
system.cpu.icache.tags.tagsinuse 1147.986161 # Cycle average of tags in use
|
system.cpu.icache.tags.tagsinuse 1147.986161 # Cycle average of tags in use
|
||||||
system.cpu.icache.tags.total_refs 189857001 # Total number of references to valid blocks.
|
system.cpu.icache.tags.total_refs 189857001 # Total number of references to valid blocks.
|
||||||
|
|
|
@ -64,5 +64,6 @@ system.cpu.num_idle_cycles 0 # Nu
|
||||||
system.cpu.num_busy_cycles 193445891 # Number of busy cycles
|
system.cpu.num_busy_cycles 193445891 # Number of busy cycles
|
||||||
system.cpu.not_idle_fraction 1 # Percentage of non-idle cycles
|
system.cpu.not_idle_fraction 1 # Percentage of non-idle cycles
|
||||||
system.cpu.idle_fraction 0 # Percentage of idle cycles
|
system.cpu.idle_fraction 0 # Percentage of idle cycles
|
||||||
|
system.cpu.Branches 15132745 # Number of branches fetched
|
||||||
|
|
||||||
---------- End Simulation Statistics ----------
|
---------- End Simulation Statistics ----------
|
||||||
|
|
|
@ -68,6 +68,7 @@ system.cpu.num_idle_cycles 0 # Nu
|
||||||
system.cpu.num_busy_cycles 541126164 # Number of busy cycles
|
system.cpu.num_busy_cycles 541126164 # Number of busy cycles
|
||||||
system.cpu.not_idle_fraction 1 # Percentage of non-idle cycles
|
system.cpu.not_idle_fraction 1 # Percentage of non-idle cycles
|
||||||
system.cpu.idle_fraction 0 # Percentage of idle cycles
|
system.cpu.idle_fraction 0 # Percentage of idle cycles
|
||||||
|
system.cpu.Branches 15132745 # Number of branches fetched
|
||||||
system.cpu.icache.tags.replacements 10362 # number of replacements
|
system.cpu.icache.tags.replacements 10362 # number of replacements
|
||||||
system.cpu.icache.tags.tagsinuse 1591.579171 # Cycle average of tags in use
|
system.cpu.icache.tags.tagsinuse 1591.579171 # Cycle average of tags in use
|
||||||
system.cpu.icache.tags.total_refs 193433248 # Total number of references to valid blocks.
|
system.cpu.icache.tags.total_refs 193433248 # Total number of references to valid blocks.
|
||||||
|
|
|
@ -65,5 +65,6 @@ system.cpu.num_idle_cycles 0 # Nu
|
||||||
system.cpu.num_busy_cycles 262786559 # Number of busy cycles
|
system.cpu.num_busy_cycles 262786559 # Number of busy cycles
|
||||||
system.cpu.not_idle_fraction 1 # Percentage of non-idle cycles
|
system.cpu.not_idle_fraction 1 # Percentage of non-idle cycles
|
||||||
system.cpu.idle_fraction 0 # Percentage of idle cycles
|
system.cpu.idle_fraction 0 # Percentage of idle cycles
|
||||||
|
system.cpu.Branches 12326938 # Number of branches fetched
|
||||||
|
|
||||||
---------- End Simulation Statistics ----------
|
---------- End Simulation Statistics ----------
|
||||||
|
|
|
@ -73,6 +73,7 @@ system.cpu.num_idle_cycles 0 # Nu
|
||||||
system.cpu.num_busy_cycles 501907914 # Number of busy cycles
|
system.cpu.num_busy_cycles 501907914 # Number of busy cycles
|
||||||
system.cpu.not_idle_fraction 1 # Percentage of non-idle cycles
|
system.cpu.not_idle_fraction 1 # Percentage of non-idle cycles
|
||||||
system.cpu.idle_fraction 0 # Percentage of idle cycles
|
system.cpu.idle_fraction 0 # Percentage of idle cycles
|
||||||
|
system.cpu.Branches 12326938 # Number of branches fetched
|
||||||
system.cpu.icache.tags.replacements 2836 # number of replacements
|
system.cpu.icache.tags.replacements 2836 # number of replacements
|
||||||
system.cpu.icache.tags.tagsinuse 1455.296642 # Cycle average of tags in use
|
system.cpu.icache.tags.tagsinuse 1455.296642 # Cycle average of tags in use
|
||||||
system.cpu.icache.tags.total_refs 173489674 # Total number of references to valid blocks.
|
system.cpu.icache.tags.total_refs 173489674 # Total number of references to valid blocks.
|
||||||
|
|
|
@ -306,6 +306,7 @@ system.cpu0.num_idle_cycles 3683437200.584730
|
||||||
system.cpu0.num_busy_cycles 57233845.415270 # Number of busy cycles
|
system.cpu0.num_busy_cycles 57233845.415270 # Number of busy cycles
|
||||||
system.cpu0.not_idle_fraction 0.015300 # Percentage of non-idle cycles
|
system.cpu0.not_idle_fraction 0.015300 # Percentage of non-idle cycles
|
||||||
system.cpu0.idle_fraction 0.984700 # Percentage of idle cycles
|
system.cpu0.idle_fraction 0.984700 # Percentage of idle cycles
|
||||||
|
system.cpu0.Branches 8650704 # Number of branches fetched
|
||||||
system.cpu0.kern.inst.arm 0 # number of arm instructions executed
|
system.cpu0.kern.inst.arm 0 # number of arm instructions executed
|
||||||
system.cpu0.kern.inst.quiesce 6283 # number of quiesce instructions executed
|
system.cpu0.kern.inst.quiesce 6283 # number of quiesce instructions executed
|
||||||
system.cpu0.kern.inst.hwrei 197120 # number of hwrei instructions executed
|
system.cpu0.kern.inst.hwrei 197120 # number of hwrei instructions executed
|
||||||
|
@ -610,6 +611,7 @@ system.cpu1.num_idle_cycles 3734312190.077655
|
||||||
system.cpu1.num_busy_cycles 5936690.922345 # Number of busy cycles
|
system.cpu1.num_busy_cycles 5936690.922345 # Number of busy cycles
|
||||||
system.cpu1.not_idle_fraction 0.001587 # Percentage of non-idle cycles
|
system.cpu1.not_idle_fraction 0.001587 # Percentage of non-idle cycles
|
||||||
system.cpu1.idle_fraction 0.998413 # Percentage of idle cycles
|
system.cpu1.idle_fraction 0.998413 # Percentage of idle cycles
|
||||||
|
system.cpu1.Branches 836747 # Number of branches fetched
|
||||||
system.cpu1.kern.inst.arm 0 # number of arm instructions executed
|
system.cpu1.kern.inst.arm 0 # number of arm instructions executed
|
||||||
system.cpu1.kern.inst.quiesce 2204 # number of quiesce instructions executed
|
system.cpu1.kern.inst.quiesce 2204 # number of quiesce instructions executed
|
||||||
system.cpu1.kern.inst.hwrei 39554 # number of hwrei instructions executed
|
system.cpu1.kern.inst.hwrei 39554 # number of hwrei instructions executed
|
||||||
|
|
|
@ -159,6 +159,7 @@ system.cpu.num_idle_cycles 3598609086.391618
|
||||||
system.cpu.num_busy_cycles 60055430.608382 # Number of busy cycles
|
system.cpu.num_busy_cycles 60055430.608382 # Number of busy cycles
|
||||||
system.cpu.not_idle_fraction 0.016415 # Percentage of non-idle cycles
|
system.cpu.not_idle_fraction 0.016415 # Percentage of non-idle cycles
|
||||||
system.cpu.idle_fraction 0.983585 # Percentage of idle cycles
|
system.cpu.idle_fraction 0.983585 # Percentage of idle cycles
|
||||||
|
system.cpu.Branches 9064385 # Number of branches fetched
|
||||||
system.cpu.kern.inst.arm 0 # number of arm instructions executed
|
system.cpu.kern.inst.arm 0 # number of arm instructions executed
|
||||||
system.cpu.kern.inst.quiesce 6357 # number of quiesce instructions executed
|
system.cpu.kern.inst.quiesce 6357 # number of quiesce instructions executed
|
||||||
system.cpu.kern.inst.hwrei 211319 # number of hwrei instructions executed
|
system.cpu.kern.inst.hwrei 211319 # number of hwrei instructions executed
|
||||||
|
|
|
@ -890,6 +890,7 @@ system.cpu0.num_idle_cycles 3698209766.998114
|
||||||
system.cpu0.num_busy_cycles 223609982.001886 # Number of busy cycles
|
system.cpu0.num_busy_cycles 223609982.001886 # Number of busy cycles
|
||||||
system.cpu0.not_idle_fraction 0.057017 # Percentage of non-idle cycles
|
system.cpu0.not_idle_fraction 0.057017 # Percentage of non-idle cycles
|
||||||
system.cpu0.idle_fraction 0.942983 # Percentage of idle cycles
|
system.cpu0.idle_fraction 0.942983 # Percentage of idle cycles
|
||||||
|
system.cpu0.Branches 7227606 # Number of branches fetched
|
||||||
system.cpu0.kern.inst.arm 0 # number of arm instructions executed
|
system.cpu0.kern.inst.arm 0 # number of arm instructions executed
|
||||||
system.cpu0.kern.inst.quiesce 6813 # number of quiesce instructions executed
|
system.cpu0.kern.inst.quiesce 6813 # number of quiesce instructions executed
|
||||||
system.cpu0.kern.inst.hwrei 165343 # number of hwrei instructions executed
|
system.cpu0.kern.inst.hwrei 165343 # number of hwrei instructions executed
|
||||||
|
@ -1416,6 +1417,7 @@ system.cpu1.num_idle_cycles 3870487590.349789
|
||||||
system.cpu1.num_busy_cycles 49440202.650211 # Number of busy cycles
|
system.cpu1.num_busy_cycles 49440202.650211 # Number of busy cycles
|
||||||
system.cpu1.not_idle_fraction 0.012613 # Percentage of non-idle cycles
|
system.cpu1.not_idle_fraction 0.012613 # Percentage of non-idle cycles
|
||||||
system.cpu1.idle_fraction 0.987387 # Percentage of idle cycles
|
system.cpu1.idle_fraction 0.987387 # Percentage of idle cycles
|
||||||
|
system.cpu1.Branches 1846576 # Number of branches fetched
|
||||||
system.cpu1.kern.inst.arm 0 # number of arm instructions executed
|
system.cpu1.kern.inst.arm 0 # number of arm instructions executed
|
||||||
system.cpu1.kern.inst.quiesce 2744 # number of quiesce instructions executed
|
system.cpu1.kern.inst.quiesce 2744 # number of quiesce instructions executed
|
||||||
system.cpu1.kern.inst.hwrei 78268 # number of hwrei instructions executed
|
system.cpu1.kern.inst.hwrei 78268 # number of hwrei instructions executed
|
||||||
|
|
|
@ -571,6 +571,7 @@ system.cpu.num_idle_cycles 3588896828.998131
|
||||||
system.cpu.num_busy_cycles 251959253.001869 # Number of busy cycles
|
system.cpu.num_busy_cycles 251959253.001869 # Number of busy cycles
|
||||||
system.cpu.not_idle_fraction 0.065600 # Percentage of non-idle cycles
|
system.cpu.not_idle_fraction 0.065600 # Percentage of non-idle cycles
|
||||||
system.cpu.idle_fraction 0.934400 # Percentage of idle cycles
|
system.cpu.idle_fraction 0.934400 # Percentage of idle cycles
|
||||||
|
system.cpu.Branches 8421946 # Number of branches fetched
|
||||||
system.cpu.kern.inst.arm 0 # number of arm instructions executed
|
system.cpu.kern.inst.arm 0 # number of arm instructions executed
|
||||||
system.cpu.kern.inst.quiesce 6376 # number of quiesce instructions executed
|
system.cpu.kern.inst.quiesce 6376 # number of quiesce instructions executed
|
||||||
system.cpu.kern.inst.hwrei 211963 # number of hwrei instructions executed
|
system.cpu.kern.inst.hwrei 211963 # number of hwrei instructions executed
|
||||||
|
|
|
@ -4,15 +4,33 @@ sim_seconds 0.912097 # Nu
|
||||||
sim_ticks 912096767500 # Number of ticks simulated
|
sim_ticks 912096767500 # Number of ticks simulated
|
||||||
final_tick 912096767500 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
|
final_tick 912096767500 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
|
||||||
sim_freq 1000000000000 # Frequency of simulated ticks
|
sim_freq 1000000000000 # Frequency of simulated ticks
|
||||||
host_inst_rate 1391627 # Simulator instruction rate (inst/s)
|
host_inst_rate 734225 # Simulator instruction rate (inst/s)
|
||||||
host_op_rate 1791703 # Simulator op (including micro ops) rate (op/s)
|
host_op_rate 945306 # Simulator op (including micro ops) rate (op/s)
|
||||||
host_tick_rate 20594093924 # Simulator tick rate (ticks/s)
|
host_tick_rate 10865482551 # Simulator tick rate (ticks/s)
|
||||||
host_mem_usage 421260 # Number of bytes of host memory used
|
host_mem_usage 476960 # Number of bytes of host memory used
|
||||||
host_seconds 44.29 # Real time elapsed on the host
|
host_seconds 83.94 # Real time elapsed on the host
|
||||||
sim_insts 61634065 # Number of instructions simulated
|
sim_insts 61634065 # Number of instructions simulated
|
||||||
sim_ops 79353129 # Number of ops (including micro ops) simulated
|
sim_ops 79353129 # Number of ops (including micro ops) simulated
|
||||||
system.voltage_domain.voltage 1 # Voltage in Volts
|
system.voltage_domain.voltage 1 # Voltage in Volts
|
||||||
system.clk_domain.clock 1000 # Clock period in ticks
|
system.clk_domain.clock 1000 # Clock period in ticks
|
||||||
|
system.realview.nvmem.bytes_read::cpu0.inst 20 # Number of bytes read from this memory
|
||||||
|
system.realview.nvmem.bytes_read::cpu1.inst 48 # Number of bytes read from this memory
|
||||||
|
system.realview.nvmem.bytes_read::total 68 # Number of bytes read from this memory
|
||||||
|
system.realview.nvmem.bytes_inst_read::cpu0.inst 20 # Number of instructions bytes read from this memory
|
||||||
|
system.realview.nvmem.bytes_inst_read::cpu1.inst 48 # Number of instructions bytes read from this memory
|
||||||
|
system.realview.nvmem.bytes_inst_read::total 68 # Number of instructions bytes read from this memory
|
||||||
|
system.realview.nvmem.num_reads::cpu0.inst 5 # Number of read requests responded to by this memory
|
||||||
|
system.realview.nvmem.num_reads::cpu1.inst 12 # Number of read requests responded to by this memory
|
||||||
|
system.realview.nvmem.num_reads::total 17 # Number of read requests responded to by this memory
|
||||||
|
system.realview.nvmem.bw_read::cpu0.inst 22 # Total read bandwidth from this memory (bytes/s)
|
||||||
|
system.realview.nvmem.bw_read::cpu1.inst 53 # Total read bandwidth from this memory (bytes/s)
|
||||||
|
system.realview.nvmem.bw_read::total 75 # Total read bandwidth from this memory (bytes/s)
|
||||||
|
system.realview.nvmem.bw_inst_read::cpu0.inst 22 # Instruction read bandwidth from this memory (bytes/s)
|
||||||
|
system.realview.nvmem.bw_inst_read::cpu1.inst 53 # Instruction read bandwidth from this memory (bytes/s)
|
||||||
|
system.realview.nvmem.bw_inst_read::total 75 # Instruction read bandwidth from this memory (bytes/s)
|
||||||
|
system.realview.nvmem.bw_total::cpu0.inst 22 # Total bandwidth to/from this memory (bytes/s)
|
||||||
|
system.realview.nvmem.bw_total::cpu1.inst 53 # Total bandwidth to/from this memory (bytes/s)
|
||||||
|
system.realview.nvmem.bw_total::total 75 # Total bandwidth to/from this memory (bytes/s)
|
||||||
system.physmem.bytes_read::realview.clcd 39321600 # Number of bytes read from this memory
|
system.physmem.bytes_read::realview.clcd 39321600 # Number of bytes read from this memory
|
||||||
system.physmem.bytes_read::cpu0.dtb.walker 64 # Number of bytes read from this memory
|
system.physmem.bytes_read::cpu0.dtb.walker 64 # Number of bytes read from this memory
|
||||||
system.physmem.bytes_read::cpu0.itb.walker 192 # Number of bytes read from this memory
|
system.physmem.bytes_read::cpu0.itb.walker 192 # Number of bytes read from this memory
|
||||||
|
@ -68,24 +86,6 @@ system.physmem.bw_total::cpu1.dtb.walker 211 # To
|
||||||
system.physmem.bw_total::cpu1.inst 235278 # Total bandwidth to/from this memory (bytes/s)
|
system.physmem.bw_total::cpu1.inst 235278 # Total bandwidth to/from this memory (bytes/s)
|
||||||
system.physmem.bw_total::cpu1.data 6988978 # Total bandwidth to/from this memory (bytes/s)
|
system.physmem.bw_total::cpu1.data 6988978 # Total bandwidth to/from this memory (bytes/s)
|
||||||
system.physmem.bw_total::total 62341477 # Total bandwidth to/from this memory (bytes/s)
|
system.physmem.bw_total::total 62341477 # Total bandwidth to/from this memory (bytes/s)
|
||||||
system.realview.nvmem.bytes_read::cpu0.inst 20 # Number of bytes read from this memory
|
|
||||||
system.realview.nvmem.bytes_read::cpu1.inst 48 # Number of bytes read from this memory
|
|
||||||
system.realview.nvmem.bytes_read::total 68 # Number of bytes read from this memory
|
|
||||||
system.realview.nvmem.bytes_inst_read::cpu0.inst 20 # Number of instructions bytes read from this memory
|
|
||||||
system.realview.nvmem.bytes_inst_read::cpu1.inst 48 # Number of instructions bytes read from this memory
|
|
||||||
system.realview.nvmem.bytes_inst_read::total 68 # Number of instructions bytes read from this memory
|
|
||||||
system.realview.nvmem.num_reads::cpu0.inst 5 # Number of read requests responded to by this memory
|
|
||||||
system.realview.nvmem.num_reads::cpu1.inst 12 # Number of read requests responded to by this memory
|
|
||||||
system.realview.nvmem.num_reads::total 17 # Number of read requests responded to by this memory
|
|
||||||
system.realview.nvmem.bw_read::cpu0.inst 22 # Total read bandwidth from this memory (bytes/s)
|
|
||||||
system.realview.nvmem.bw_read::cpu1.inst 53 # Total read bandwidth from this memory (bytes/s)
|
|
||||||
system.realview.nvmem.bw_read::total 75 # Total read bandwidth from this memory (bytes/s)
|
|
||||||
system.realview.nvmem.bw_inst_read::cpu0.inst 22 # Instruction read bandwidth from this memory (bytes/s)
|
|
||||||
system.realview.nvmem.bw_inst_read::cpu1.inst 53 # Instruction read bandwidth from this memory (bytes/s)
|
|
||||||
system.realview.nvmem.bw_inst_read::total 75 # Instruction read bandwidth from this memory (bytes/s)
|
|
||||||
system.realview.nvmem.bw_total::cpu0.inst 22 # Total bandwidth to/from this memory (bytes/s)
|
|
||||||
system.realview.nvmem.bw_total::cpu1.inst 53 # Total bandwidth to/from this memory (bytes/s)
|
|
||||||
system.realview.nvmem.bw_total::total 75 # Total bandwidth to/from this memory (bytes/s)
|
|
||||||
system.membus.throughput 64986682 # Throughput (bytes/s)
|
system.membus.throughput 64986682 # Throughput (bytes/s)
|
||||||
system.membus.data_through_bus 59274143 # Total data (bytes)
|
system.membus.data_through_bus 59274143 # Total data (bytes)
|
||||||
system.membus.snoop_data_through_bus 0 # Total snoop data (bytes)
|
system.membus.snoop_data_through_bus 0 # Total snoop data (bytes)
|
||||||
|
@ -396,6 +396,7 @@ system.cpu0.num_idle_cycles 1783997907.577739
|
||||||
system.cpu0.num_busy_cycles 39673507.422261 # Number of busy cycles
|
system.cpu0.num_busy_cycles 39673507.422261 # Number of busy cycles
|
||||||
system.cpu0.not_idle_fraction 0.021755 # Percentage of non-idle cycles
|
system.cpu0.not_idle_fraction 0.021755 # Percentage of non-idle cycles
|
||||||
system.cpu0.idle_fraction 0.978245 # Percentage of idle cycles
|
system.cpu0.idle_fraction 0.978245 # Percentage of idle cycles
|
||||||
|
system.cpu0.Branches 5491598 # Number of branches fetched
|
||||||
system.cpu0.kern.inst.arm 0 # number of arm instructions executed
|
system.cpu0.kern.inst.arm 0 # number of arm instructions executed
|
||||||
system.cpu0.kern.inst.quiesce 50449 # number of quiesce instructions executed
|
system.cpu0.kern.inst.quiesce 50449 # number of quiesce instructions executed
|
||||||
system.cpu0.icache.tags.replacements 428546 # number of replacements
|
system.cpu0.icache.tags.replacements 428546 # number of replacements
|
||||||
|
@ -625,6 +626,7 @@ system.cpu1.num_idle_cycles 1783399616.755682
|
||||||
system.cpu1.num_busy_cycles 40793919.244318 # Number of busy cycles
|
system.cpu1.num_busy_cycles 40793919.244318 # Number of busy cycles
|
||||||
system.cpu1.not_idle_fraction 0.022363 # Percentage of non-idle cycles
|
system.cpu1.not_idle_fraction 0.022363 # Percentage of non-idle cycles
|
||||||
system.cpu1.idle_fraction 0.977637 # Percentage of idle cycles
|
system.cpu1.idle_fraction 0.977637 # Percentage of idle cycles
|
||||||
|
system.cpu1.Branches 5037975 # Number of branches fetched
|
||||||
system.cpu1.kern.inst.arm 0 # number of arm instructions executed
|
system.cpu1.kern.inst.arm 0 # number of arm instructions executed
|
||||||
system.cpu1.kern.inst.quiesce 40450 # number of quiesce instructions executed
|
system.cpu1.kern.inst.quiesce 40450 # number of quiesce instructions executed
|
||||||
system.cpu1.icache.tags.replacements 433942 # number of replacements
|
system.cpu1.icache.tags.replacements 433942 # number of replacements
|
||||||
|
|
|
@ -4,15 +4,27 @@ sim_seconds 2.332810 # Nu
|
||||||
sim_ticks 2332810269000 # Number of ticks simulated
|
sim_ticks 2332810269000 # Number of ticks simulated
|
||||||
final_tick 2332810269000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
|
final_tick 2332810269000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
|
||||||
sim_freq 1000000000000 # Frequency of simulated ticks
|
sim_freq 1000000000000 # Frequency of simulated ticks
|
||||||
host_inst_rate 1274625 # Simulator instruction rate (inst/s)
|
host_inst_rate 702757 # Simulator instruction rate (inst/s)
|
||||||
host_op_rate 1639090 # Simulator op (including micro ops) rate (op/s)
|
host_op_rate 903702 # Simulator op (including micro ops) rate (op/s)
|
||||||
host_tick_rate 49222371545 # Simulator tick rate (ticks/s)
|
host_tick_rate 27138460197 # Simulator tick rate (ticks/s)
|
||||||
host_mem_usage 420236 # Number of bytes of host memory used
|
host_mem_usage 475940 # Number of bytes of host memory used
|
||||||
host_seconds 47.39 # Real time elapsed on the host
|
host_seconds 85.96 # Real time elapsed on the host
|
||||||
sim_insts 60408649 # Number of instructions simulated
|
sim_insts 60408649 # Number of instructions simulated
|
||||||
sim_ops 77681829 # Number of ops (including micro ops) simulated
|
sim_ops 77681829 # Number of ops (including micro ops) simulated
|
||||||
system.voltage_domain.voltage 1 # Voltage in Volts
|
system.voltage_domain.voltage 1 # Voltage in Volts
|
||||||
system.clk_domain.clock 1000 # Clock period in ticks
|
system.clk_domain.clock 1000 # Clock period in ticks
|
||||||
|
system.realview.nvmem.bytes_read::cpu.inst 20 # Number of bytes read from this memory
|
||||||
|
system.realview.nvmem.bytes_read::total 20 # Number of bytes read from this memory
|
||||||
|
system.realview.nvmem.bytes_inst_read::cpu.inst 20 # Number of instructions bytes read from this memory
|
||||||
|
system.realview.nvmem.bytes_inst_read::total 20 # Number of instructions bytes read from this memory
|
||||||
|
system.realview.nvmem.num_reads::cpu.inst 5 # Number of read requests responded to by this memory
|
||||||
|
system.realview.nvmem.num_reads::total 5 # Number of read requests responded to by this memory
|
||||||
|
system.realview.nvmem.bw_read::cpu.inst 9 # Total read bandwidth from this memory (bytes/s)
|
||||||
|
system.realview.nvmem.bw_read::total 9 # Total read bandwidth from this memory (bytes/s)
|
||||||
|
system.realview.nvmem.bw_inst_read::cpu.inst 9 # Instruction read bandwidth from this memory (bytes/s)
|
||||||
|
system.realview.nvmem.bw_inst_read::total 9 # Instruction read bandwidth from this memory (bytes/s)
|
||||||
|
system.realview.nvmem.bw_total::cpu.inst 9 # Total bandwidth to/from this memory (bytes/s)
|
||||||
|
system.realview.nvmem.bw_total::total 9 # Total bandwidth to/from this memory (bytes/s)
|
||||||
system.physmem.bytes_read::realview.clcd 111673344 # Number of bytes read from this memory
|
system.physmem.bytes_read::realview.clcd 111673344 # Number of bytes read from this memory
|
||||||
system.physmem.bytes_read::cpu.dtb.walker 320 # Number of bytes read from this memory
|
system.physmem.bytes_read::cpu.dtb.walker 320 # Number of bytes read from this memory
|
||||||
system.physmem.bytes_read::cpu.itb.walker 192 # Number of bytes read from this memory
|
system.physmem.bytes_read::cpu.itb.walker 192 # Number of bytes read from this memory
|
||||||
|
@ -51,18 +63,6 @@ system.physmem.bw_total::cpu.itb.walker 82 # To
|
||||||
system.physmem.bw_total::cpu.inst 302279 # Total bandwidth to/from this memory (bytes/s)
|
system.physmem.bw_total::cpu.inst 302279 # Total bandwidth to/from this memory (bytes/s)
|
||||||
system.physmem.bw_total::cpu.data 5181500 # Total bandwidth to/from this memory (bytes/s)
|
system.physmem.bw_total::cpu.data 5181500 # Total bandwidth to/from this memory (bytes/s)
|
||||||
system.physmem.bw_total::total 54942190 # Total bandwidth to/from this memory (bytes/s)
|
system.physmem.bw_total::total 54942190 # Total bandwidth to/from this memory (bytes/s)
|
||||||
system.realview.nvmem.bytes_read::cpu.inst 20 # Number of bytes read from this memory
|
|
||||||
system.realview.nvmem.bytes_read::total 20 # Number of bytes read from this memory
|
|
||||||
system.realview.nvmem.bytes_inst_read::cpu.inst 20 # Number of instructions bytes read from this memory
|
|
||||||
system.realview.nvmem.bytes_inst_read::total 20 # Number of instructions bytes read from this memory
|
|
||||||
system.realview.nvmem.num_reads::cpu.inst 5 # Number of read requests responded to by this memory
|
|
||||||
system.realview.nvmem.num_reads::total 5 # Number of read requests responded to by this memory
|
|
||||||
system.realview.nvmem.bw_read::cpu.inst 9 # Total read bandwidth from this memory (bytes/s)
|
|
||||||
system.realview.nvmem.bw_read::total 9 # Total read bandwidth from this memory (bytes/s)
|
|
||||||
system.realview.nvmem.bw_inst_read::cpu.inst 9 # Instruction read bandwidth from this memory (bytes/s)
|
|
||||||
system.realview.nvmem.bw_inst_read::total 9 # Instruction read bandwidth from this memory (bytes/s)
|
|
||||||
system.realview.nvmem.bw_total::cpu.inst 9 # Total bandwidth to/from this memory (bytes/s)
|
|
||||||
system.realview.nvmem.bw_total::total 9 # Total bandwidth to/from this memory (bytes/s)
|
|
||||||
system.membus.throughput 55969605 # Throughput (bytes/s)
|
system.membus.throughput 55969605 # Throughput (bytes/s)
|
||||||
system.membus.data_through_bus 130566470 # Total data (bytes)
|
system.membus.data_through_bus 130566470 # Total data (bytes)
|
||||||
system.membus.snoop_data_through_bus 0 # Total snoop data (bytes)
|
system.membus.snoop_data_through_bus 0 # Total snoop data (bytes)
|
||||||
|
@ -181,6 +181,7 @@ system.cpu.num_idle_cycles 4586822073.007145
|
||||||
system.cpu.num_busy_cycles 78798465.992855 # Number of busy cycles
|
system.cpu.num_busy_cycles 78798465.992855 # Number of busy cycles
|
||||||
system.cpu.not_idle_fraction 0.016889 # Percentage of non-idle cycles
|
system.cpu.not_idle_fraction 0.016889 # Percentage of non-idle cycles
|
||||||
system.cpu.idle_fraction 0.983111 # Percentage of idle cycles
|
system.cpu.idle_fraction 0.983111 # Percentage of idle cycles
|
||||||
|
system.cpu.Branches 10298723 # Number of branches fetched
|
||||||
system.cpu.kern.inst.arm 0 # number of arm instructions executed
|
system.cpu.kern.inst.arm 0 # number of arm instructions executed
|
||||||
system.cpu.kern.inst.quiesce 82795 # number of quiesce instructions executed
|
system.cpu.kern.inst.quiesce 82795 # number of quiesce instructions executed
|
||||||
system.cpu.icache.tags.replacements 850590 # number of replacements
|
system.cpu.icache.tags.replacements 850590 # number of replacements
|
||||||
|
|
|
@ -4,15 +4,33 @@ sim_seconds 1.196139 # Nu
|
||||||
sim_ticks 1196139241000 # Number of ticks simulated
|
sim_ticks 1196139241000 # Number of ticks simulated
|
||||||
final_tick 1196139241000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
|
final_tick 1196139241000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
|
||||||
sim_freq 1000000000000 # Frequency of simulated ticks
|
sim_freq 1000000000000 # Frequency of simulated ticks
|
||||||
host_inst_rate 553961 # Simulator instruction rate (inst/s)
|
host_inst_rate 363491 # Simulator instruction rate (inst/s)
|
||||||
host_op_rate 705843 # Simulator op (including micro ops) rate (op/s)
|
host_op_rate 463152 # Simulator op (including micro ops) rate (op/s)
|
||||||
host_tick_rate 10781179789 # Simulator tick rate (ticks/s)
|
host_tick_rate 7074263356 # Simulator tick rate (ticks/s)
|
||||||
host_mem_usage 425360 # Number of bytes of host memory used
|
host_mem_usage 480032 # Number of bytes of host memory used
|
||||||
host_seconds 110.95 # Real time elapsed on the host
|
host_seconds 169.08 # Real time elapsed on the host
|
||||||
sim_insts 61460236 # Number of instructions simulated
|
sim_insts 61460236 # Number of instructions simulated
|
||||||
sim_ops 78311148 # Number of ops (including micro ops) simulated
|
sim_ops 78311148 # Number of ops (including micro ops) simulated
|
||||||
system.voltage_domain.voltage 1 # Voltage in Volts
|
system.voltage_domain.voltage 1 # Voltage in Volts
|
||||||
system.clk_domain.clock 1000 # Clock period in ticks
|
system.clk_domain.clock 1000 # Clock period in ticks
|
||||||
|
system.realview.nvmem.bytes_read::cpu0.inst 20 # Number of bytes read from this memory
|
||||||
|
system.realview.nvmem.bytes_read::cpu1.inst 48 # Number of bytes read from this memory
|
||||||
|
system.realview.nvmem.bytes_read::total 68 # Number of bytes read from this memory
|
||||||
|
system.realview.nvmem.bytes_inst_read::cpu0.inst 20 # Number of instructions bytes read from this memory
|
||||||
|
system.realview.nvmem.bytes_inst_read::cpu1.inst 48 # Number of instructions bytes read from this memory
|
||||||
|
system.realview.nvmem.bytes_inst_read::total 68 # Number of instructions bytes read from this memory
|
||||||
|
system.realview.nvmem.num_reads::cpu0.inst 5 # Number of read requests responded to by this memory
|
||||||
|
system.realview.nvmem.num_reads::cpu1.inst 12 # Number of read requests responded to by this memory
|
||||||
|
system.realview.nvmem.num_reads::total 17 # Number of read requests responded to by this memory
|
||||||
|
system.realview.nvmem.bw_read::cpu0.inst 17 # Total read bandwidth from this memory (bytes/s)
|
||||||
|
system.realview.nvmem.bw_read::cpu1.inst 40 # Total read bandwidth from this memory (bytes/s)
|
||||||
|
system.realview.nvmem.bw_read::total 57 # Total read bandwidth from this memory (bytes/s)
|
||||||
|
system.realview.nvmem.bw_inst_read::cpu0.inst 17 # Instruction read bandwidth from this memory (bytes/s)
|
||||||
|
system.realview.nvmem.bw_inst_read::cpu1.inst 40 # Instruction read bandwidth from this memory (bytes/s)
|
||||||
|
system.realview.nvmem.bw_inst_read::total 57 # Instruction read bandwidth from this memory (bytes/s)
|
||||||
|
system.realview.nvmem.bw_total::cpu0.inst 17 # Total bandwidth to/from this memory (bytes/s)
|
||||||
|
system.realview.nvmem.bw_total::cpu1.inst 40 # Total bandwidth to/from this memory (bytes/s)
|
||||||
|
system.realview.nvmem.bw_total::total 57 # Total bandwidth to/from this memory (bytes/s)
|
||||||
system.physmem.bytes_read::realview.clcd 51904512 # Number of bytes read from this memory
|
system.physmem.bytes_read::realview.clcd 51904512 # Number of bytes read from this memory
|
||||||
system.physmem.bytes_read::cpu0.dtb.walker 64 # Number of bytes read from this memory
|
system.physmem.bytes_read::cpu0.dtb.walker 64 # Number of bytes read from this memory
|
||||||
system.physmem.bytes_read::cpu0.itb.walker 128 # Number of bytes read from this memory
|
system.physmem.bytes_read::cpu0.itb.walker 128 # Number of bytes read from this memory
|
||||||
|
@ -610,24 +628,6 @@ system.physmem.writeRowHitRate 83.49 # Ro
|
||||||
system.physmem.avgGap 160007.15 # Average gap between requests
|
system.physmem.avgGap 160007.15 # Average gap between requests
|
||||||
system.physmem.pageHitRate 98.90 # Row buffer hit rate, read and write combined
|
system.physmem.pageHitRate 98.90 # Row buffer hit rate, read and write combined
|
||||||
system.physmem.prechargeAllPercent 4.90 # Percentage of time for which DRAM has all the banks in precharge state
|
system.physmem.prechargeAllPercent 4.90 # Percentage of time for which DRAM has all the banks in precharge state
|
||||||
system.realview.nvmem.bytes_read::cpu0.inst 20 # Number of bytes read from this memory
|
|
||||||
system.realview.nvmem.bytes_read::cpu1.inst 48 # Number of bytes read from this memory
|
|
||||||
system.realview.nvmem.bytes_read::total 68 # Number of bytes read from this memory
|
|
||||||
system.realview.nvmem.bytes_inst_read::cpu0.inst 20 # Number of instructions bytes read from this memory
|
|
||||||
system.realview.nvmem.bytes_inst_read::cpu1.inst 48 # Number of instructions bytes read from this memory
|
|
||||||
system.realview.nvmem.bytes_inst_read::total 68 # Number of instructions bytes read from this memory
|
|
||||||
system.realview.nvmem.num_reads::cpu0.inst 5 # Number of read requests responded to by this memory
|
|
||||||
system.realview.nvmem.num_reads::cpu1.inst 12 # Number of read requests responded to by this memory
|
|
||||||
system.realview.nvmem.num_reads::total 17 # Number of read requests responded to by this memory
|
|
||||||
system.realview.nvmem.bw_read::cpu0.inst 17 # Total read bandwidth from this memory (bytes/s)
|
|
||||||
system.realview.nvmem.bw_read::cpu1.inst 40 # Total read bandwidth from this memory (bytes/s)
|
|
||||||
system.realview.nvmem.bw_read::total 57 # Total read bandwidth from this memory (bytes/s)
|
|
||||||
system.realview.nvmem.bw_inst_read::cpu0.inst 17 # Instruction read bandwidth from this memory (bytes/s)
|
|
||||||
system.realview.nvmem.bw_inst_read::cpu1.inst 40 # Instruction read bandwidth from this memory (bytes/s)
|
|
||||||
system.realview.nvmem.bw_inst_read::total 57 # Instruction read bandwidth from this memory (bytes/s)
|
|
||||||
system.realview.nvmem.bw_total::cpu0.inst 17 # Total bandwidth to/from this memory (bytes/s)
|
|
||||||
system.realview.nvmem.bw_total::cpu1.inst 40 # Total bandwidth to/from this memory (bytes/s)
|
|
||||||
system.realview.nvmem.bw_total::total 57 # Total bandwidth to/from this memory (bytes/s)
|
|
||||||
system.membus.throughput 59936382 # Throughput (bytes/s)
|
system.membus.throughput 59936382 # Throughput (bytes/s)
|
||||||
system.membus.trans_dist::ReadReq 7703367 # Transaction distribution
|
system.membus.trans_dist::ReadReq 7703367 # Transaction distribution
|
||||||
system.membus.trans_dist::ReadResp 7703367 # Transaction distribution
|
system.membus.trans_dist::ReadResp 7703367 # Transaction distribution
|
||||||
|
@ -1396,6 +1396,7 @@ system.cpu0.num_idle_cycles 2246536230.490122
|
||||||
system.cpu0.num_busy_cycles 145742251.509878 # Number of busy cycles
|
system.cpu0.num_busy_cycles 145742251.509878 # Number of busy cycles
|
||||||
system.cpu0.not_idle_fraction 0.060922 # Percentage of non-idle cycles
|
system.cpu0.not_idle_fraction 0.060922 # Percentage of non-idle cycles
|
||||||
system.cpu0.idle_fraction 0.939078 # Percentage of idle cycles
|
system.cpu0.idle_fraction 0.939078 # Percentage of idle cycles
|
||||||
|
system.cpu0.Branches 5599941 # Number of branches fetched
|
||||||
system.cpu0.kern.inst.arm 0 # number of arm instructions executed
|
system.cpu0.kern.inst.arm 0 # number of arm instructions executed
|
||||||
system.cpu0.kern.inst.quiesce 46939 # number of quiesce instructions executed
|
system.cpu0.kern.inst.quiesce 46939 # number of quiesce instructions executed
|
||||||
system.cpu0.icache.tags.replacements 424872 # number of replacements
|
system.cpu0.icache.tags.replacements 424872 # number of replacements
|
||||||
|
@ -1758,6 +1759,7 @@ system.cpu1.num_idle_cycles 1874235342.195830
|
||||||
system.cpu1.num_busy_cycles 516568442.804169 # Number of busy cycles
|
system.cpu1.num_busy_cycles 516568442.804169 # Number of busy cycles
|
||||||
system.cpu1.not_idle_fraction 0.216065 # Percentage of non-idle cycles
|
system.cpu1.not_idle_fraction 0.216065 # Percentage of non-idle cycles
|
||||||
system.cpu1.idle_fraction 0.783935 # Percentage of idle cycles
|
system.cpu1.idle_fraction 0.783935 # Percentage of idle cycles
|
||||||
|
system.cpu1.Branches 4947677 # Number of branches fetched
|
||||||
system.cpu1.kern.inst.arm 0 # number of arm instructions executed
|
system.cpu1.kern.inst.arm 0 # number of arm instructions executed
|
||||||
system.cpu1.kern.inst.quiesce 44317 # number of quiesce instructions executed
|
system.cpu1.kern.inst.quiesce 44317 # number of quiesce instructions executed
|
||||||
system.cpu1.icache.tags.replacements 469929 # number of replacements
|
system.cpu1.icache.tags.replacements 469929 # number of replacements
|
||||||
|
|
|
@ -4,15 +4,27 @@ sim_seconds 2.616536 # Nu
|
||||||
sim_ticks 2616536483000 # Number of ticks simulated
|
sim_ticks 2616536483000 # Number of ticks simulated
|
||||||
final_tick 2616536483000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
|
final_tick 2616536483000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
|
||||||
sim_freq 1000000000000 # Frequency of simulated ticks
|
sim_freq 1000000000000 # Frequency of simulated ticks
|
||||||
host_inst_rate 506890 # Simulator instruction rate (inst/s)
|
host_inst_rate 317845 # Simulator instruction rate (inst/s)
|
||||||
host_op_rate 645039 # Simulator op (including micro ops) rate (op/s)
|
host_op_rate 404472 # Simulator op (including micro ops) rate (op/s)
|
||||||
host_tick_rate 22032386663 # Simulator tick rate (ticks/s)
|
host_tick_rate 13815397020 # Simulator tick rate (ticks/s)
|
||||||
host_mem_usage 421264 # Number of bytes of host memory used
|
host_mem_usage 476964 # Number of bytes of host memory used
|
||||||
host_seconds 118.76 # Real time elapsed on the host
|
host_seconds 189.39 # Real time elapsed on the host
|
||||||
sim_insts 60197590 # Number of instructions simulated
|
sim_insts 60197590 # Number of instructions simulated
|
||||||
sim_ops 76603983 # Number of ops (including micro ops) simulated
|
sim_ops 76603983 # Number of ops (including micro ops) simulated
|
||||||
system.voltage_domain.voltage 1 # Voltage in Volts
|
system.voltage_domain.voltage 1 # Voltage in Volts
|
||||||
system.clk_domain.clock 1000 # Clock period in ticks
|
system.clk_domain.clock 1000 # Clock period in ticks
|
||||||
|
system.realview.nvmem.bytes_read::cpu.inst 20 # Number of bytes read from this memory
|
||||||
|
system.realview.nvmem.bytes_read::total 20 # Number of bytes read from this memory
|
||||||
|
system.realview.nvmem.bytes_inst_read::cpu.inst 20 # Number of instructions bytes read from this memory
|
||||||
|
system.realview.nvmem.bytes_inst_read::total 20 # Number of instructions bytes read from this memory
|
||||||
|
system.realview.nvmem.num_reads::cpu.inst 5 # Number of read requests responded to by this memory
|
||||||
|
system.realview.nvmem.num_reads::total 5 # Number of read requests responded to by this memory
|
||||||
|
system.realview.nvmem.bw_read::cpu.inst 8 # Total read bandwidth from this memory (bytes/s)
|
||||||
|
system.realview.nvmem.bw_read::total 8 # Total read bandwidth from this memory (bytes/s)
|
||||||
|
system.realview.nvmem.bw_inst_read::cpu.inst 8 # Instruction read bandwidth from this memory (bytes/s)
|
||||||
|
system.realview.nvmem.bw_inst_read::total 8 # Instruction read bandwidth from this memory (bytes/s)
|
||||||
|
system.realview.nvmem.bw_total::cpu.inst 8 # Total bandwidth to/from this memory (bytes/s)
|
||||||
|
system.realview.nvmem.bw_total::total 8 # Total bandwidth to/from this memory (bytes/s)
|
||||||
system.physmem.bytes_read::realview.clcd 122683392 # Number of bytes read from this memory
|
system.physmem.bytes_read::realview.clcd 122683392 # Number of bytes read from this memory
|
||||||
system.physmem.bytes_read::cpu.dtb.walker 320 # Number of bytes read from this memory
|
system.physmem.bytes_read::cpu.dtb.walker 320 # Number of bytes read from this memory
|
||||||
system.physmem.bytes_read::cpu.itb.walker 128 # Number of bytes read from this memory
|
system.physmem.bytes_read::cpu.itb.walker 128 # Number of bytes read from this memory
|
||||||
|
@ -639,18 +651,6 @@ system.physmem.writeRowHitRate 85.22 # Ro
|
||||||
system.physmem.avgGap 160458.16 # Average gap between requests
|
system.physmem.avgGap 160458.16 # Average gap between requests
|
||||||
system.physmem.pageHitRate 99.43 # Row buffer hit rate, read and write combined
|
system.physmem.pageHitRate 99.43 # Row buffer hit rate, read and write combined
|
||||||
system.physmem.prechargeAllPercent 2.19 # Percentage of time for which DRAM has all the banks in precharge state
|
system.physmem.prechargeAllPercent 2.19 # Percentage of time for which DRAM has all the banks in precharge state
|
||||||
system.realview.nvmem.bytes_read::cpu.inst 20 # Number of bytes read from this memory
|
|
||||||
system.realview.nvmem.bytes_read::total 20 # Number of bytes read from this memory
|
|
||||||
system.realview.nvmem.bytes_inst_read::cpu.inst 20 # Number of instructions bytes read from this memory
|
|
||||||
system.realview.nvmem.bytes_inst_read::total 20 # Number of instructions bytes read from this memory
|
|
||||||
system.realview.nvmem.num_reads::cpu.inst 5 # Number of read requests responded to by this memory
|
|
||||||
system.realview.nvmem.num_reads::total 5 # Number of read requests responded to by this memory
|
|
||||||
system.realview.nvmem.bw_read::cpu.inst 8 # Total read bandwidth from this memory (bytes/s)
|
|
||||||
system.realview.nvmem.bw_read::total 8 # Total read bandwidth from this memory (bytes/s)
|
|
||||||
system.realview.nvmem.bw_inst_read::cpu.inst 8 # Instruction read bandwidth from this memory (bytes/s)
|
|
||||||
system.realview.nvmem.bw_inst_read::total 8 # Instruction read bandwidth from this memory (bytes/s)
|
|
||||||
system.realview.nvmem.bw_total::cpu.inst 8 # Total bandwidth to/from this memory (bytes/s)
|
|
||||||
system.realview.nvmem.bw_total::total 8 # Total bandwidth to/from this memory (bytes/s)
|
|
||||||
system.membus.throughput 54116538 # Throughput (bytes/s)
|
system.membus.throughput 54116538 # Throughput (bytes/s)
|
||||||
system.membus.trans_dist::ReadReq 16546563 # Transaction distribution
|
system.membus.trans_dist::ReadReq 16546563 # Transaction distribution
|
||||||
system.membus.trans_dist::ReadResp 16546563 # Transaction distribution
|
system.membus.trans_dist::ReadResp 16546563 # Transaction distribution
|
||||||
|
@ -920,6 +920,7 @@ system.cpu.num_idle_cycles 4581527140.608249
|
||||||
system.cpu.num_busy_cycles 651545825.391751 # Number of busy cycles
|
system.cpu.num_busy_cycles 651545825.391751 # Number of busy cycles
|
||||||
system.cpu.not_idle_fraction 0.124505 # Percentage of non-idle cycles
|
system.cpu.not_idle_fraction 0.124505 # Percentage of non-idle cycles
|
||||||
system.cpu.idle_fraction 0.875495 # Percentage of idle cycles
|
system.cpu.idle_fraction 0.875495 # Percentage of idle cycles
|
||||||
|
system.cpu.Branches 10308279 # Number of branches fetched
|
||||||
system.cpu.kern.inst.arm 0 # number of arm instructions executed
|
system.cpu.kern.inst.arm 0 # number of arm instructions executed
|
||||||
system.cpu.kern.inst.quiesce 83016 # number of quiesce instructions executed
|
system.cpu.kern.inst.quiesce 83016 # number of quiesce instructions executed
|
||||||
system.cpu.icache.tags.replacements 856260 # number of replacements
|
system.cpu.icache.tags.replacements 856260 # number of replacements
|
||||||
|
|
|
@ -365,6 +365,7 @@ system.cpu0.num_idle_cycles 4553702806.473283
|
||||||
system.cpu0.num_busy_cycles 79951892.526717 # Number of busy cycles
|
system.cpu0.num_busy_cycles 79951892.526717 # Number of busy cycles
|
||||||
system.cpu0.not_idle_fraction 0.017255 # Percentage of non-idle cycles
|
system.cpu0.not_idle_fraction 0.017255 # Percentage of non-idle cycles
|
||||||
system.cpu0.idle_fraction 0.982745 # Percentage of idle cycles
|
system.cpu0.idle_fraction 0.982745 # Percentage of idle cycles
|
||||||
|
system.cpu0.Branches 5613939 # Number of branches fetched
|
||||||
system.cpu0.kern.inst.arm 0 # number of arm instructions executed
|
system.cpu0.kern.inst.arm 0 # number of arm instructions executed
|
||||||
system.cpu0.kern.inst.quiesce 82795 # number of quiesce instructions executed
|
system.cpu0.kern.inst.quiesce 82795 # number of quiesce instructions executed
|
||||||
system.cpu0.icache.tags.replacements 850590 # number of replacements
|
system.cpu0.icache.tags.replacements 850590 # number of replacements
|
||||||
|
@ -632,6 +633,7 @@ system.cpu1.num_idle_cycles 4215699127.014197
|
||||||
system.cpu1.num_busy_cycles 62272692.985803 # Number of busy cycles
|
system.cpu1.num_busy_cycles 62272692.985803 # Number of busy cycles
|
||||||
system.cpu1.not_idle_fraction 0.014557 # Percentage of non-idle cycles
|
system.cpu1.not_idle_fraction 0.014557 # Percentage of non-idle cycles
|
||||||
system.cpu1.idle_fraction 0.985443 # Percentage of idle cycles
|
system.cpu1.idle_fraction 0.985443 # Percentage of idle cycles
|
||||||
|
system.cpu1.Branches 4684784 # Number of branches fetched
|
||||||
system.cpu1.kern.inst.arm 0 # number of arm instructions executed
|
system.cpu1.kern.inst.arm 0 # number of arm instructions executed
|
||||||
system.cpu1.kern.inst.quiesce 0 # number of quiesce instructions executed
|
system.cpu1.kern.inst.quiesce 0 # number of quiesce instructions executed
|
||||||
system.iocache.tags.replacements 0 # number of replacements
|
system.iocache.tags.replacements 0 # number of replacements
|
||||||
|
|
|
@ -4,11 +4,11 @@ sim_seconds 5.112126 # Nu
|
||||||
sim_ticks 5112126264500 # Number of ticks simulated
|
sim_ticks 5112126264500 # Number of ticks simulated
|
||||||
final_tick 5112126264500 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
|
final_tick 5112126264500 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
|
||||||
sim_freq 1000000000000 # Frequency of simulated ticks
|
sim_freq 1000000000000 # Frequency of simulated ticks
|
||||||
host_inst_rate 1777208 # Simulator instruction rate (inst/s)
|
host_inst_rate 1019778 # Simulator instruction rate (inst/s)
|
||||||
host_op_rate 3638722 # Simulator op (including micro ops) rate (op/s)
|
host_op_rate 2087932 # Simulator op (including micro ops) rate (op/s)
|
||||||
host_tick_rate 45442487875 # Simulator tick rate (ticks/s)
|
host_tick_rate 26075321841 # Simulator tick rate (ticks/s)
|
||||||
host_mem_usage 590176 # Number of bytes of host memory used
|
host_mem_usage 640200 # Number of bytes of host memory used
|
||||||
host_seconds 112.50 # Real time elapsed on the host
|
host_seconds 196.05 # Real time elapsed on the host
|
||||||
sim_insts 199929810 # Number of instructions simulated
|
sim_insts 199929810 # Number of instructions simulated
|
||||||
sim_ops 409343850 # Number of ops (including micro ops) simulated
|
sim_ops 409343850 # Number of ops (including micro ops) simulated
|
||||||
system.voltage_domain.voltage 1 # Voltage in Volts
|
system.voltage_domain.voltage 1 # Voltage in Volts
|
||||||
|
@ -140,6 +140,7 @@ system.cpu.num_idle_cycles 9770518213.691833
|
||||||
system.cpu.num_busy_cycles 453735690.308166 # Number of busy cycles
|
system.cpu.num_busy_cycles 453735690.308166 # Number of busy cycles
|
||||||
system.cpu.not_idle_fraction 0.044378 # Percentage of non-idle cycles
|
system.cpu.not_idle_fraction 0.044378 # Percentage of non-idle cycles
|
||||||
system.cpu.idle_fraction 0.955622 # Percentage of idle cycles
|
system.cpu.idle_fraction 0.955622 # Percentage of idle cycles
|
||||||
|
system.cpu.Branches 43125514 # Number of branches fetched
|
||||||
system.cpu.kern.inst.arm 0 # number of arm instructions executed
|
system.cpu.kern.inst.arm 0 # number of arm instructions executed
|
||||||
system.cpu.kern.inst.quiesce 0 # number of quiesce instructions executed
|
system.cpu.kern.inst.quiesce 0 # number of quiesce instructions executed
|
||||||
system.cpu.icache.tags.replacements 790558 # number of replacements
|
system.cpu.icache.tags.replacements 790558 # number of replacements
|
||||||
|
|
|
@ -649,6 +649,7 @@ system.cpu.num_idle_cycles 9785238216.998117
|
||||||
system.cpu.num_busy_cycles 607542143.001883 # Number of busy cycles
|
system.cpu.num_busy_cycles 607542143.001883 # Number of busy cycles
|
||||||
system.cpu.not_idle_fraction 0.058458 # Percentage of non-idle cycles
|
system.cpu.not_idle_fraction 0.058458 # Percentage of non-idle cycles
|
||||||
system.cpu.idle_fraction 0.941542 # Percentage of idle cycles
|
system.cpu.idle_fraction 0.941542 # Percentage of idle cycles
|
||||||
|
system.cpu.Branches 26307103 # Number of branches fetched
|
||||||
system.cpu.kern.inst.arm 0 # number of arm instructions executed
|
system.cpu.kern.inst.arm 0 # number of arm instructions executed
|
||||||
system.cpu.kern.inst.quiesce 0 # number of quiesce instructions executed
|
system.cpu.kern.inst.quiesce 0 # number of quiesce instructions executed
|
||||||
system.cpu.icache.tags.replacements 788090 # number of replacements
|
system.cpu.icache.tags.replacements 788090 # number of replacements
|
||||||
|
|
|
@ -112,6 +112,7 @@ testsys.cpu.num_idle_cycles 380542207.362158
|
||||||
testsys.cpu.num_busy_cycles 20262547.637842 # Number of busy cycles
|
testsys.cpu.num_busy_cycles 20262547.637842 # Number of busy cycles
|
||||||
testsys.cpu.not_idle_fraction 0.050555 # Percentage of non-idle cycles
|
testsys.cpu.not_idle_fraction 0.050555 # Percentage of non-idle cycles
|
||||||
testsys.cpu.idle_fraction 0.949445 # Percentage of idle cycles
|
testsys.cpu.idle_fraction 0.949445 # Percentage of idle cycles
|
||||||
|
testsys.cpu.Branches 2929848 # Number of branches fetched
|
||||||
testsys.cpu.kern.inst.arm 0 # number of arm instructions executed
|
testsys.cpu.kern.inst.arm 0 # number of arm instructions executed
|
||||||
testsys.cpu.kern.inst.quiesce 19580 # number of quiesce instructions executed
|
testsys.cpu.kern.inst.quiesce 19580 # number of quiesce instructions executed
|
||||||
testsys.cpu.kern.inst.hwrei 153667 # number of hwrei instructions executed
|
testsys.cpu.kern.inst.hwrei 153667 # number of hwrei instructions executed
|
||||||
|
@ -334,6 +335,7 @@ drivesys.cpu.num_idle_cycles 782579974.227931
|
||||||
drivesys.cpu.num_busy_cycles 19051473.772069 # Number of busy cycles
|
drivesys.cpu.num_busy_cycles 19051473.772069 # Number of busy cycles
|
||||||
drivesys.cpu.not_idle_fraction 0.023766 # Percentage of non-idle cycles
|
drivesys.cpu.not_idle_fraction 0.023766 # Percentage of non-idle cycles
|
||||||
drivesys.cpu.idle_fraction 0.976234 # Percentage of idle cycles
|
drivesys.cpu.idle_fraction 0.976234 # Percentage of idle cycles
|
||||||
|
drivesys.cpu.Branches 2793313 # Number of branches fetched
|
||||||
drivesys.cpu.kern.inst.arm 0 # number of arm instructions executed
|
drivesys.cpu.kern.inst.arm 0 # number of arm instructions executed
|
||||||
drivesys.cpu.kern.inst.quiesce 19876 # number of quiesce instructions executed
|
drivesys.cpu.kern.inst.quiesce 19876 # number of quiesce instructions executed
|
||||||
drivesys.cpu.kern.inst.hwrei 143591 # number of hwrei instructions executed
|
drivesys.cpu.kern.inst.hwrei 143591 # number of hwrei instructions executed
|
||||||
|
@ -453,11 +455,11 @@ sim_seconds 0.000407 # Nu
|
||||||
sim_ticks 407341500 # Number of ticks simulated
|
sim_ticks 407341500 # Number of ticks simulated
|
||||||
final_tick 4321621592000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
|
final_tick 4321621592000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
|
||||||
sim_freq 1000000000000 # Frequency of simulated ticks
|
sim_freq 1000000000000 # Frequency of simulated ticks
|
||||||
host_inst_rate 11306223920 # Simulator instruction rate (inst/s)
|
host_inst_rate 6913599452 # Simulator instruction rate (inst/s)
|
||||||
host_op_rate 11302970418 # Simulator op (including micro ops) rate (op/s)
|
host_op_rate 6911980937 # Simulator op (including micro ops) rate (op/s)
|
||||||
host_tick_rate 8786485437 # Simulator tick rate (ticks/s)
|
host_tick_rate 5373353780 # Simulator tick rate (ticks/s)
|
||||||
host_mem_usage 473604 # Number of bytes of host memory used
|
host_mem_usage 524140 # Number of bytes of host memory used
|
||||||
host_seconds 0.05 # Real time elapsed on the host
|
host_seconds 0.08 # Real time elapsed on the host
|
||||||
sim_insts 523862353 # Number of instructions simulated
|
sim_insts 523862353 # Number of instructions simulated
|
||||||
sim_ops 523862353 # Number of ops (including micro ops) simulated
|
sim_ops 523862353 # Number of ops (including micro ops) simulated
|
||||||
testsys.voltage_domain.voltage 1 # Voltage in Volts
|
testsys.voltage_domain.voltage 1 # Voltage in Volts
|
||||||
|
@ -558,6 +560,7 @@ testsys.cpu.num_idle_cycles 784609.171892 # N
|
||||||
testsys.cpu.num_busy_cycles 36406.828108 # Number of busy cycles
|
testsys.cpu.num_busy_cycles 36406.828108 # Number of busy cycles
|
||||||
testsys.cpu.not_idle_fraction 0.044344 # Percentage of non-idle cycles
|
testsys.cpu.not_idle_fraction 0.044344 # Percentage of non-idle cycles
|
||||||
testsys.cpu.idle_fraction 0.955656 # Percentage of idle cycles
|
testsys.cpu.idle_fraction 0.955656 # Percentage of idle cycles
|
||||||
|
testsys.cpu.Branches 5238 # Number of branches fetched
|
||||||
testsys.cpu.kern.inst.arm 0 # number of arm instructions executed
|
testsys.cpu.kern.inst.arm 0 # number of arm instructions executed
|
||||||
testsys.cpu.kern.inst.quiesce 40 # number of quiesce instructions executed
|
testsys.cpu.kern.inst.quiesce 40 # number of quiesce instructions executed
|
||||||
testsys.cpu.kern.inst.hwrei 295 # number of hwrei instructions executed
|
testsys.cpu.kern.inst.hwrei 295 # number of hwrei instructions executed
|
||||||
|
@ -731,6 +734,7 @@ drivesys.cpu.num_idle_cycles 1590157.359061 #
|
||||||
drivesys.cpu.num_busy_cycles 36082.640939 # Number of busy cycles
|
drivesys.cpu.num_busy_cycles 36082.640939 # Number of busy cycles
|
||||||
drivesys.cpu.not_idle_fraction 0.022188 # Percentage of non-idle cycles
|
drivesys.cpu.not_idle_fraction 0.022188 # Percentage of non-idle cycles
|
||||||
drivesys.cpu.idle_fraction 0.977812 # Percentage of idle cycles
|
drivesys.cpu.idle_fraction 0.977812 # Percentage of idle cycles
|
||||||
|
drivesys.cpu.Branches 5243 # Number of branches fetched
|
||||||
drivesys.cpu.kern.inst.arm 0 # number of arm instructions executed
|
drivesys.cpu.kern.inst.arm 0 # number of arm instructions executed
|
||||||
drivesys.cpu.kern.inst.quiesce 41 # number of quiesce instructions executed
|
drivesys.cpu.kern.inst.quiesce 41 # number of quiesce instructions executed
|
||||||
drivesys.cpu.kern.inst.hwrei 295 # number of hwrei instructions executed
|
drivesys.cpu.kern.inst.hwrei 295 # number of hwrei instructions executed
|
||||||
|
|
|
@ -4,11 +4,11 @@ sim_seconds 0.000003 # Nu
|
||||||
sim_ticks 3208000 # Number of ticks simulated
|
sim_ticks 3208000 # Number of ticks simulated
|
||||||
final_tick 3208000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
|
final_tick 3208000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
|
||||||
sim_freq 1000000000000 # Frequency of simulated ticks
|
sim_freq 1000000000000 # Frequency of simulated ticks
|
||||||
host_inst_rate 44230 # Simulator instruction rate (inst/s)
|
host_inst_rate 105446 # Simulator instruction rate (inst/s)
|
||||||
host_op_rate 44225 # Simulator op (including micro ops) rate (op/s)
|
host_op_rate 105415 # Simulator op (including micro ops) rate (op/s)
|
||||||
host_tick_rate 22200446 # Simulator tick rate (ticks/s)
|
host_tick_rate 52907298 # Simulator tick rate (ticks/s)
|
||||||
host_mem_usage 220024 # Number of bytes of host memory used
|
host_mem_usage 268408 # Number of bytes of host memory used
|
||||||
host_seconds 0.14 # Real time elapsed on the host
|
host_seconds 0.06 # Real time elapsed on the host
|
||||||
sim_insts 6390 # Number of instructions simulated
|
sim_insts 6390 # Number of instructions simulated
|
||||||
sim_ops 6390 # Number of ops (including micro ops) simulated
|
sim_ops 6390 # Number of ops (including micro ops) simulated
|
||||||
system.voltage_domain.voltage 1 # Voltage in Volts
|
system.voltage_domain.voltage 1 # Voltage in Volts
|
||||||
|
@ -94,5 +94,6 @@ system.cpu.num_idle_cycles 0 # Nu
|
||||||
system.cpu.num_busy_cycles 6417 # Number of busy cycles
|
system.cpu.num_busy_cycles 6417 # Number of busy cycles
|
||||||
system.cpu.not_idle_fraction 1 # Percentage of non-idle cycles
|
system.cpu.not_idle_fraction 1 # Percentage of non-idle cycles
|
||||||
system.cpu.idle_fraction 0 # Percentage of idle cycles
|
system.cpu.idle_fraction 0 # Percentage of idle cycles
|
||||||
|
system.cpu.Branches 1050 # Number of branches fetched
|
||||||
|
|
||||||
---------- End Simulation Statistics ----------
|
---------- End Simulation Statistics ----------
|
||||||
|
|
|
@ -4,11 +4,11 @@ sim_seconds 0.000139 # Nu
|
||||||
sim_ticks 138616 # Number of ticks simulated
|
sim_ticks 138616 # Number of ticks simulated
|
||||||
final_tick 138616 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
|
final_tick 138616 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
|
||||||
sim_freq 1000000000 # Frequency of simulated ticks
|
sim_freq 1000000000 # Frequency of simulated ticks
|
||||||
host_inst_rate 26295 # Simulator instruction rate (inst/s)
|
host_inst_rate 22907 # Simulator instruction rate (inst/s)
|
||||||
host_op_rate 26294 # Simulator op (including micro ops) rate (op/s)
|
host_op_rate 22905 # Simulator op (including micro ops) rate (op/s)
|
||||||
host_tick_rate 570348 # Simulator tick rate (ticks/s)
|
host_tick_rate 496843 # Simulator tick rate (ticks/s)
|
||||||
host_mem_usage 126360 # Number of bytes of host memory used
|
host_mem_usage 174712 # Number of bytes of host memory used
|
||||||
host_seconds 0.24 # Real time elapsed on the host
|
host_seconds 0.28 # Real time elapsed on the host
|
||||||
sim_insts 6390 # Number of instructions simulated
|
sim_insts 6390 # Number of instructions simulated
|
||||||
sim_ops 6390 # Number of ops (including micro ops) simulated
|
sim_ops 6390 # Number of ops (including micro ops) simulated
|
||||||
system.voltage_domain.voltage 1 # Voltage in Volts
|
system.voltage_domain.voltage 1 # Voltage in Volts
|
||||||
|
@ -209,6 +209,7 @@ system.cpu.num_idle_cycles 0 # Nu
|
||||||
system.cpu.num_busy_cycles 138616 # Number of busy cycles
|
system.cpu.num_busy_cycles 138616 # Number of busy cycles
|
||||||
system.cpu.not_idle_fraction 1 # Percentage of non-idle cycles
|
system.cpu.not_idle_fraction 1 # Percentage of non-idle cycles
|
||||||
system.cpu.idle_fraction 0 # Percentage of idle cycles
|
system.cpu.idle_fraction 0 # Percentage of idle cycles
|
||||||
|
system.cpu.Branches 1050 # Number of branches fetched
|
||||||
system.ruby.network.routers0.throttle0.link_utilization 5.369871
|
system.ruby.network.routers0.throttle0.link_utilization 5.369871
|
||||||
system.ruby.network.routers0.throttle0.msg_count.Request_Control::0 1041
|
system.ruby.network.routers0.throttle0.msg_count.Request_Control::0 1041
|
||||||
system.ruby.network.routers0.throttle0.msg_count.Response_Data::1 1490
|
system.ruby.network.routers0.throttle0.msg_count.Response_Data::1 1490
|
||||||
|
|
|
@ -4,10 +4,10 @@ sim_seconds 0.000118 # Nu
|
||||||
sim_ticks 117611 # Number of ticks simulated
|
sim_ticks 117611 # Number of ticks simulated
|
||||||
final_tick 117611 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
|
final_tick 117611 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
|
||||||
sim_freq 1000000000 # Frequency of simulated ticks
|
sim_freq 1000000000 # Frequency of simulated ticks
|
||||||
host_inst_rate 23182 # Simulator instruction rate (inst/s)
|
host_inst_rate 22851 # Simulator instruction rate (inst/s)
|
||||||
host_op_rate 23181 # Simulator op (including micro ops) rate (op/s)
|
host_op_rate 22850 # Simulator op (including micro ops) rate (op/s)
|
||||||
host_tick_rate 426626 # Simulator tick rate (ticks/s)
|
host_tick_rate 420529 # Simulator tick rate (ticks/s)
|
||||||
host_mem_usage 130676 # Number of bytes of host memory used
|
host_mem_usage 177976 # Number of bytes of host memory used
|
||||||
host_seconds 0.28 # Real time elapsed on the host
|
host_seconds 0.28 # Real time elapsed on the host
|
||||||
sim_insts 6390 # Number of instructions simulated
|
sim_insts 6390 # Number of instructions simulated
|
||||||
sim_ops 6390 # Number of ops (including micro ops) simulated
|
sim_ops 6390 # Number of ops (including micro ops) simulated
|
||||||
|
@ -199,6 +199,7 @@ system.cpu.num_idle_cycles 0 # Nu
|
||||||
system.cpu.num_busy_cycles 117611 # Number of busy cycles
|
system.cpu.num_busy_cycles 117611 # Number of busy cycles
|
||||||
system.cpu.not_idle_fraction 1 # Percentage of non-idle cycles
|
system.cpu.not_idle_fraction 1 # Percentage of non-idle cycles
|
||||||
system.cpu.idle_fraction 0 # Percentage of idle cycles
|
system.cpu.idle_fraction 0 # Percentage of idle cycles
|
||||||
|
system.cpu.Branches 1050 # Number of branches fetched
|
||||||
system.ruby.network.routers0.throttle0.link_utilization 5.786874
|
system.ruby.network.routers0.throttle0.link_utilization 5.786874
|
||||||
system.ruby.network.routers0.throttle0.msg_count.Response_Data::2 1109
|
system.ruby.network.routers0.throttle0.msg_count.Response_Data::2 1109
|
||||||
system.ruby.network.routers0.throttle0.msg_count.ResponseL2hit_Data::2 253
|
system.ruby.network.routers0.throttle0.msg_count.ResponseL2hit_Data::2 253
|
||||||
|
|
|
@ -4,11 +4,11 @@ sim_seconds 0.000114 # Nu
|
||||||
sim_ticks 113627 # Number of ticks simulated
|
sim_ticks 113627 # Number of ticks simulated
|
||||||
final_tick 113627 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
|
final_tick 113627 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
|
||||||
sim_freq 1000000000 # Frequency of simulated ticks
|
sim_freq 1000000000 # Frequency of simulated ticks
|
||||||
host_inst_rate 25426 # Simulator instruction rate (inst/s)
|
host_inst_rate 33215 # Simulator instruction rate (inst/s)
|
||||||
host_op_rate 25424 # Simulator op (including micro ops) rate (op/s)
|
host_op_rate 33212 # Simulator op (including micro ops) rate (op/s)
|
||||||
host_tick_rate 452072 # Simulator tick rate (ticks/s)
|
host_tick_rate 590518 # Simulator tick rate (ticks/s)
|
||||||
host_mem_usage 127540 # Number of bytes of host memory used
|
host_mem_usage 174836 # Number of bytes of host memory used
|
||||||
host_seconds 0.25 # Real time elapsed on the host
|
host_seconds 0.19 # Real time elapsed on the host
|
||||||
sim_insts 6390 # Number of instructions simulated
|
sim_insts 6390 # Number of instructions simulated
|
||||||
sim_ops 6390 # Number of ops (including micro ops) simulated
|
sim_ops 6390 # Number of ops (including micro ops) simulated
|
||||||
system.voltage_domain.voltage 1 # Voltage in Volts
|
system.voltage_domain.voltage 1 # Voltage in Volts
|
||||||
|
@ -185,6 +185,7 @@ system.cpu.num_idle_cycles 0 # Nu
|
||||||
system.cpu.num_busy_cycles 113627 # Number of busy cycles
|
system.cpu.num_busy_cycles 113627 # Number of busy cycles
|
||||||
system.cpu.not_idle_fraction 1 # Percentage of non-idle cycles
|
system.cpu.not_idle_fraction 1 # Percentage of non-idle cycles
|
||||||
system.cpu.idle_fraction 0 # Percentage of idle cycles
|
system.cpu.idle_fraction 0 # Percentage of idle cycles
|
||||||
|
system.cpu.Branches 1050 # Number of branches fetched
|
||||||
system.ruby.network.routers0.throttle0.link_utilization 5.473611
|
system.ruby.network.routers0.throttle0.link_utilization 5.473611
|
||||||
system.ruby.network.routers0.throttle0.msg_count.Response_Data::4 1178
|
system.ruby.network.routers0.throttle0.msg_count.Response_Data::4 1178
|
||||||
system.ruby.network.routers0.throttle0.msg_count.ResponseL2hit_Data::4 204
|
system.ruby.network.routers0.throttle0.msg_count.ResponseL2hit_Data::4 204
|
||||||
|
|
|
@ -4,11 +4,11 @@ sim_seconds 0.000093 # Nu
|
||||||
sim_ticks 93341 # Number of ticks simulated
|
sim_ticks 93341 # Number of ticks simulated
|
||||||
final_tick 93341 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
|
final_tick 93341 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
|
||||||
sim_freq 1000000000 # Frequency of simulated ticks
|
sim_freq 1000000000 # Frequency of simulated ticks
|
||||||
host_inst_rate 34391 # Simulator instruction rate (inst/s)
|
host_inst_rate 36927 # Simulator instruction rate (inst/s)
|
||||||
host_op_rate 34389 # Simulator op (including micro ops) rate (op/s)
|
host_op_rate 36923 # Simulator op (including micro ops) rate (op/s)
|
||||||
host_tick_rate 502293 # Simulator tick rate (ticks/s)
|
host_tick_rate 539288 # Simulator tick rate (ticks/s)
|
||||||
host_mem_usage 127476 # Number of bytes of host memory used
|
host_mem_usage 175784 # Number of bytes of host memory used
|
||||||
host_seconds 0.19 # Real time elapsed on the host
|
host_seconds 0.17 # Real time elapsed on the host
|
||||||
sim_insts 6390 # Number of instructions simulated
|
sim_insts 6390 # Number of instructions simulated
|
||||||
sim_ops 6390 # Number of ops (including micro ops) simulated
|
sim_ops 6390 # Number of ops (including micro ops) simulated
|
||||||
system.voltage_domain.voltage 1 # Voltage in Volts
|
system.voltage_domain.voltage 1 # Voltage in Volts
|
||||||
|
@ -184,6 +184,7 @@ system.cpu.num_idle_cycles 0 # Nu
|
||||||
system.cpu.num_busy_cycles 93341 # Number of busy cycles
|
system.cpu.num_busy_cycles 93341 # Number of busy cycles
|
||||||
system.cpu.not_idle_fraction 1 # Percentage of non-idle cycles
|
system.cpu.not_idle_fraction 1 # Percentage of non-idle cycles
|
||||||
system.cpu.idle_fraction 0 # Percentage of idle cycles
|
system.cpu.idle_fraction 0 # Percentage of idle cycles
|
||||||
|
system.cpu.Branches 1050 # Number of branches fetched
|
||||||
system.ruby.network.routers0.throttle0.link_utilization 6.199848
|
system.ruby.network.routers0.throttle0.link_utilization 6.199848
|
||||||
system.ruby.network.routers0.throttle0.msg_count.Response_Data::4 1159
|
system.ruby.network.routers0.throttle0.msg_count.Response_Data::4 1159
|
||||||
system.ruby.network.routers0.throttle0.msg_count.Writeback_Control::3 1143
|
system.ruby.network.routers0.throttle0.msg_count.Writeback_Control::3 1143
|
||||||
|
|
|
@ -4,11 +4,11 @@ sim_seconds 0.000144 # Nu
|
||||||
sim_ticks 143853 # Number of ticks simulated
|
sim_ticks 143853 # Number of ticks simulated
|
||||||
final_tick 143853 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
|
final_tick 143853 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
|
||||||
sim_freq 1000000000 # Frequency of simulated ticks
|
sim_freq 1000000000 # Frequency of simulated ticks
|
||||||
host_inst_rate 41580 # Simulator instruction rate (inst/s)
|
host_inst_rate 33822 # Simulator instruction rate (inst/s)
|
||||||
host_op_rate 41576 # Simulator op (including micro ops) rate (op/s)
|
host_op_rate 33819 # Simulator op (including micro ops) rate (op/s)
|
||||||
host_tick_rate 935887 # Simulator tick rate (ticks/s)
|
host_tick_rate 761273 # Simulator tick rate (ticks/s)
|
||||||
host_mem_usage 126996 # Number of bytes of host memory used
|
host_mem_usage 174328 # Number of bytes of host memory used
|
||||||
host_seconds 0.15 # Real time elapsed on the host
|
host_seconds 0.19 # Real time elapsed on the host
|
||||||
sim_insts 6390 # Number of instructions simulated
|
sim_insts 6390 # Number of instructions simulated
|
||||||
sim_ops 6390 # Number of ops (including micro ops) simulated
|
sim_ops 6390 # Number of ops (including micro ops) simulated
|
||||||
system.voltage_domain.voltage 1 # Voltage in Volts
|
system.voltage_domain.voltage 1 # Voltage in Volts
|
||||||
|
@ -159,6 +159,7 @@ system.cpu.num_idle_cycles 0 # Nu
|
||||||
system.cpu.num_busy_cycles 143853 # Number of busy cycles
|
system.cpu.num_busy_cycles 143853 # Number of busy cycles
|
||||||
system.cpu.not_idle_fraction 1 # Percentage of non-idle cycles
|
system.cpu.not_idle_fraction 1 # Percentage of non-idle cycles
|
||||||
system.cpu.idle_fraction 0 # Percentage of idle cycles
|
system.cpu.idle_fraction 0 # Percentage of idle cycles
|
||||||
|
system.cpu.Branches 1050 # Number of branches fetched
|
||||||
system.ruby.network.routers0.throttle0.link_utilization 6.011692
|
system.ruby.network.routers0.throttle0.link_utilization 6.011692
|
||||||
system.ruby.network.routers0.throttle0.msg_count.Response_Data::4 1730
|
system.ruby.network.routers0.throttle0.msg_count.Response_Data::4 1730
|
||||||
system.ruby.network.routers0.throttle0.msg_count.Writeback_Control::3 1726
|
system.ruby.network.routers0.throttle0.msg_count.Writeback_Control::3 1726
|
||||||
|
|
|
@ -4,11 +4,11 @@ sim_seconds 0.000033 # Nu
|
||||||
sim_ticks 32544000 # Number of ticks simulated
|
sim_ticks 32544000 # Number of ticks simulated
|
||||||
final_tick 32544000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
|
final_tick 32544000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
|
||||||
sim_freq 1000000000000 # Frequency of simulated ticks
|
sim_freq 1000000000000 # Frequency of simulated ticks
|
||||||
host_inst_rate 61527 # Simulator instruction rate (inst/s)
|
host_inst_rate 163681 # Simulator instruction rate (inst/s)
|
||||||
host_op_rate 61510 # Simulator op (including micro ops) rate (op/s)
|
host_op_rate 163603 # Simulator op (including micro ops) rate (op/s)
|
||||||
host_tick_rate 313188739 # Simulator tick rate (ticks/s)
|
host_tick_rate 832819326 # Simulator tick rate (ticks/s)
|
||||||
host_mem_usage 228704 # Number of bytes of host memory used
|
host_mem_usage 277116 # Number of bytes of host memory used
|
||||||
host_seconds 0.10 # Real time elapsed on the host
|
host_seconds 0.04 # Real time elapsed on the host
|
||||||
sim_insts 6390 # Number of instructions simulated
|
sim_insts 6390 # Number of instructions simulated
|
||||||
sim_ops 6390 # Number of ops (including micro ops) simulated
|
sim_ops 6390 # Number of ops (including micro ops) simulated
|
||||||
system.voltage_domain.voltage 1 # Voltage in Volts
|
system.voltage_domain.voltage 1 # Voltage in Volts
|
||||||
|
@ -100,6 +100,7 @@ system.cpu.num_idle_cycles 0 # Nu
|
||||||
system.cpu.num_busy_cycles 65088 # Number of busy cycles
|
system.cpu.num_busy_cycles 65088 # Number of busy cycles
|
||||||
system.cpu.not_idle_fraction 1 # Percentage of non-idle cycles
|
system.cpu.not_idle_fraction 1 # Percentage of non-idle cycles
|
||||||
system.cpu.idle_fraction 0 # Percentage of idle cycles
|
system.cpu.idle_fraction 0 # Percentage of idle cycles
|
||||||
|
system.cpu.Branches 1050 # Number of branches fetched
|
||||||
system.cpu.icache.tags.replacements 0 # number of replacements
|
system.cpu.icache.tags.replacements 0 # number of replacements
|
||||||
system.cpu.icache.tags.tagsinuse 127.998991 # Cycle average of tags in use
|
system.cpu.icache.tags.tagsinuse 127.998991 # Cycle average of tags in use
|
||||||
system.cpu.icache.tags.total_refs 6122 # Total number of references to valid blocks.
|
system.cpu.icache.tags.total_refs 6122 # Total number of references to valid blocks.
|
||||||
|
|
|
@ -4,11 +4,11 @@ sim_seconds 0.000001 # Nu
|
||||||
sim_ticks 1297500 # Number of ticks simulated
|
sim_ticks 1297500 # Number of ticks simulated
|
||||||
final_tick 1297500 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
|
final_tick 1297500 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
|
||||||
sim_freq 1000000000000 # Frequency of simulated ticks
|
sim_freq 1000000000000 # Frequency of simulated ticks
|
||||||
host_inst_rate 31206 # Simulator instruction rate (inst/s)
|
host_inst_rate 59390 # Simulator instruction rate (inst/s)
|
||||||
host_op_rate 31196 # Simulator op (including micro ops) rate (op/s)
|
host_op_rate 59366 # Simulator op (including micro ops) rate (op/s)
|
||||||
host_tick_rate 15701703 # Simulator tick rate (ticks/s)
|
host_tick_rate 29878318 # Simulator tick rate (ticks/s)
|
||||||
host_mem_usage 219708 # Number of bytes of host memory used
|
host_mem_usage 267100 # Number of bytes of host memory used
|
||||||
host_seconds 0.08 # Real time elapsed on the host
|
host_seconds 0.04 # Real time elapsed on the host
|
||||||
sim_insts 2577 # Number of instructions simulated
|
sim_insts 2577 # Number of instructions simulated
|
||||||
sim_ops 2577 # Number of ops (including micro ops) simulated
|
sim_ops 2577 # Number of ops (including micro ops) simulated
|
||||||
system.voltage_domain.voltage 1 # Voltage in Volts
|
system.voltage_domain.voltage 1 # Voltage in Volts
|
||||||
|
@ -94,5 +94,6 @@ system.cpu.num_idle_cycles 0 # Nu
|
||||||
system.cpu.num_busy_cycles 2596 # Number of busy cycles
|
system.cpu.num_busy_cycles 2596 # Number of busy cycles
|
||||||
system.cpu.not_idle_fraction 1 # Percentage of non-idle cycles
|
system.cpu.not_idle_fraction 1 # Percentage of non-idle cycles
|
||||||
system.cpu.idle_fraction 0 # Percentage of idle cycles
|
system.cpu.idle_fraction 0 # Percentage of idle cycles
|
||||||
|
system.cpu.Branches 396 # Number of branches fetched
|
||||||
|
|
||||||
---------- End Simulation Statistics ----------
|
---------- End Simulation Statistics ----------
|
||||||
|
|
|
@ -4,11 +4,11 @@ sim_seconds 0.000053 # Nu
|
||||||
sim_ticks 52548 # Number of ticks simulated
|
sim_ticks 52548 # Number of ticks simulated
|
||||||
final_tick 52548 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
|
final_tick 52548 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
|
||||||
sim_freq 1000000000 # Frequency of simulated ticks
|
sim_freq 1000000000 # Frequency of simulated ticks
|
||||||
host_inst_rate 25744 # Simulator instruction rate (inst/s)
|
host_inst_rate 18733 # Simulator instruction rate (inst/s)
|
||||||
host_op_rate 25740 # Simulator op (including micro ops) rate (op/s)
|
host_op_rate 18730 # Simulator op (including micro ops) rate (op/s)
|
||||||
host_tick_rate 524809 # Simulator tick rate (ticks/s)
|
host_tick_rate 381878 # Simulator tick rate (ticks/s)
|
||||||
host_mem_usage 124924 # Number of bytes of host memory used
|
host_mem_usage 173280 # Number of bytes of host memory used
|
||||||
host_seconds 0.10 # Real time elapsed on the host
|
host_seconds 0.14 # Real time elapsed on the host
|
||||||
sim_insts 2577 # Number of instructions simulated
|
sim_insts 2577 # Number of instructions simulated
|
||||||
sim_ops 2577 # Number of ops (including micro ops) simulated
|
sim_ops 2577 # Number of ops (including micro ops) simulated
|
||||||
system.voltage_domain.voltage 1 # Voltage in Volts
|
system.voltage_domain.voltage 1 # Voltage in Volts
|
||||||
|
@ -208,6 +208,7 @@ system.cpu.num_idle_cycles 0 # Nu
|
||||||
system.cpu.num_busy_cycles 52548 # Number of busy cycles
|
system.cpu.num_busy_cycles 52548 # Number of busy cycles
|
||||||
system.cpu.not_idle_fraction 1 # Percentage of non-idle cycles
|
system.cpu.not_idle_fraction 1 # Percentage of non-idle cycles
|
||||||
system.cpu.idle_fraction 0 # Percentage of idle cycles
|
system.cpu.idle_fraction 0 # Percentage of idle cycles
|
||||||
|
system.cpu.Branches 396 # Number of branches fetched
|
||||||
system.ruby.network.routers0.throttle0.link_utilization 5.426467
|
system.ruby.network.routers0.throttle0.link_utilization 5.426467
|
||||||
system.ruby.network.routers0.throttle0.msg_count.Request_Control::0 431
|
system.ruby.network.routers0.throttle0.msg_count.Request_Control::0 431
|
||||||
system.ruby.network.routers0.throttle0.msg_count.Response_Data::1 572
|
system.ruby.network.routers0.throttle0.msg_count.Response_Data::1 572
|
||||||
|
|
|
@ -4,11 +4,11 @@ sim_seconds 0.000045 # Nu
|
||||||
sim_ticks 44968 # Number of ticks simulated
|
sim_ticks 44968 # Number of ticks simulated
|
||||||
final_tick 44968 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
|
final_tick 44968 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
|
||||||
sim_freq 1000000000 # Frequency of simulated ticks
|
sim_freq 1000000000 # Frequency of simulated ticks
|
||||||
host_inst_rate 17948 # Simulator instruction rate (inst/s)
|
host_inst_rate 20165 # Simulator instruction rate (inst/s)
|
||||||
host_op_rate 17946 # Simulator op (including micro ops) rate (op/s)
|
host_op_rate 20162 # Simulator op (including micro ops) rate (op/s)
|
||||||
host_tick_rate 313128 # Simulator tick rate (ticks/s)
|
host_tick_rate 351768 # Simulator tick rate (ticks/s)
|
||||||
host_mem_usage 128348 # Number of bytes of host memory used
|
host_mem_usage 175636 # Number of bytes of host memory used
|
||||||
host_seconds 0.14 # Real time elapsed on the host
|
host_seconds 0.13 # Real time elapsed on the host
|
||||||
sim_insts 2577 # Number of instructions simulated
|
sim_insts 2577 # Number of instructions simulated
|
||||||
sim_ops 2577 # Number of ops (including micro ops) simulated
|
sim_ops 2577 # Number of ops (including micro ops) simulated
|
||||||
system.voltage_domain.voltage 1 # Voltage in Volts
|
system.voltage_domain.voltage 1 # Voltage in Volts
|
||||||
|
@ -199,6 +199,7 @@ system.cpu.num_idle_cycles 0 # Nu
|
||||||
system.cpu.num_busy_cycles 44968 # Number of busy cycles
|
system.cpu.num_busy_cycles 44968 # Number of busy cycles
|
||||||
system.cpu.not_idle_fraction 1 # Percentage of non-idle cycles
|
system.cpu.not_idle_fraction 1 # Percentage of non-idle cycles
|
||||||
system.cpu.idle_fraction 0 # Percentage of idle cycles
|
system.cpu.idle_fraction 0 # Percentage of idle cycles
|
||||||
|
system.cpu.Branches 396 # Number of branches fetched
|
||||||
system.ruby.network.routers0.throttle0.link_utilization 5.661804
|
system.ruby.network.routers0.throttle0.link_utilization 5.661804
|
||||||
system.ruby.network.routers0.throttle0.msg_count.Response_Data::2 423
|
system.ruby.network.routers0.throttle0.msg_count.Response_Data::2 423
|
||||||
system.ruby.network.routers0.throttle0.msg_count.ResponseL2hit_Data::2 87
|
system.ruby.network.routers0.throttle0.msg_count.ResponseL2hit_Data::2 87
|
||||||
|
|
|
@ -4,10 +4,10 @@ sim_seconds 0.000043 # Nu
|
||||||
sim_ticks 43073 # Number of ticks simulated
|
sim_ticks 43073 # Number of ticks simulated
|
||||||
final_tick 43073 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
|
final_tick 43073 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
|
||||||
sim_freq 1000000000 # Frequency of simulated ticks
|
sim_freq 1000000000 # Frequency of simulated ticks
|
||||||
host_inst_rate 26553 # Simulator instruction rate (inst/s)
|
host_inst_rate 26989 # Simulator instruction rate (inst/s)
|
||||||
host_op_rate 26550 # Simulator op (including micro ops) rate (op/s)
|
host_op_rate 26984 # Simulator op (including micro ops) rate (op/s)
|
||||||
host_tick_rate 443703 # Simulator tick rate (ticks/s)
|
host_tick_rate 450937 # Simulator tick rate (ticks/s)
|
||||||
host_mem_usage 126100 # Number of bytes of host memory used
|
host_mem_usage 173396 # Number of bytes of host memory used
|
||||||
host_seconds 0.10 # Real time elapsed on the host
|
host_seconds 0.10 # Real time elapsed on the host
|
||||||
sim_insts 2577 # Number of instructions simulated
|
sim_insts 2577 # Number of instructions simulated
|
||||||
sim_ops 2577 # Number of ops (including micro ops) simulated
|
sim_ops 2577 # Number of ops (including micro ops) simulated
|
||||||
|
@ -185,6 +185,7 @@ system.cpu.num_idle_cycles 0 # Nu
|
||||||
system.cpu.num_busy_cycles 43073 # Number of busy cycles
|
system.cpu.num_busy_cycles 43073 # Number of busy cycles
|
||||||
system.cpu.not_idle_fraction 1 # Percentage of non-idle cycles
|
system.cpu.not_idle_fraction 1 # Percentage of non-idle cycles
|
||||||
system.cpu.idle_fraction 0 # Percentage of idle cycles
|
system.cpu.idle_fraction 0 # Percentage of idle cycles
|
||||||
|
system.cpu.Branches 396 # Number of branches fetched
|
||||||
system.ruby.network.routers0.throttle0.link_utilization 5.412904
|
system.ruby.network.routers0.throttle0.link_utilization 5.412904
|
||||||
system.ruby.network.routers0.throttle0.msg_count.Response_Data::4 448
|
system.ruby.network.routers0.throttle0.msg_count.Response_Data::4 448
|
||||||
system.ruby.network.routers0.throttle0.msg_count.ResponseL2hit_Data::4 70
|
system.ruby.network.routers0.throttle0.msg_count.ResponseL2hit_Data::4 70
|
||||||
|
|
|
@ -4,11 +4,11 @@ sim_seconds 0.000035 # Nu
|
||||||
sim_ticks 35432 # Number of ticks simulated
|
sim_ticks 35432 # Number of ticks simulated
|
||||||
final_tick 35432 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
|
final_tick 35432 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
|
||||||
sim_freq 1000000000 # Frequency of simulated ticks
|
sim_freq 1000000000 # Frequency of simulated ticks
|
||||||
host_inst_rate 28350 # Simulator instruction rate (inst/s)
|
host_inst_rate 26797 # Simulator instruction rate (inst/s)
|
||||||
host_op_rate 28346 # Simulator op (including micro ops) rate (op/s)
|
host_op_rate 26791 # Simulator op (including micro ops) rate (op/s)
|
||||||
host_tick_rate 389675 # Simulator tick rate (ticks/s)
|
host_tick_rate 368294 # Simulator tick rate (ticks/s)
|
||||||
host_mem_usage 126044 # Number of bytes of host memory used
|
host_mem_usage 174352 # Number of bytes of host memory used
|
||||||
host_seconds 0.09 # Real time elapsed on the host
|
host_seconds 0.10 # Real time elapsed on the host
|
||||||
sim_insts 2577 # Number of instructions simulated
|
sim_insts 2577 # Number of instructions simulated
|
||||||
sim_ops 2577 # Number of ops (including micro ops) simulated
|
sim_ops 2577 # Number of ops (including micro ops) simulated
|
||||||
system.voltage_domain.voltage 1 # Voltage in Volts
|
system.voltage_domain.voltage 1 # Voltage in Volts
|
||||||
|
@ -183,6 +183,7 @@ system.cpu.num_idle_cycles 0 # Nu
|
||||||
system.cpu.num_busy_cycles 35432 # Number of busy cycles
|
system.cpu.num_busy_cycles 35432 # Number of busy cycles
|
||||||
system.cpu.not_idle_fraction 1 # Percentage of non-idle cycles
|
system.cpu.not_idle_fraction 1 # Percentage of non-idle cycles
|
||||||
system.cpu.idle_fraction 0 # Percentage of idle cycles
|
system.cpu.idle_fraction 0 # Percentage of idle cycles
|
||||||
|
system.cpu.Branches 396 # Number of branches fetched
|
||||||
system.ruby.network.routers0.throttle0.link_utilization 6.200610
|
system.ruby.network.routers0.throttle0.link_utilization 6.200610
|
||||||
system.ruby.network.routers0.throttle0.msg_count.Response_Data::4 441
|
system.ruby.network.routers0.throttle0.msg_count.Response_Data::4 441
|
||||||
system.ruby.network.routers0.throttle0.msg_count.Writeback_Control::3 425
|
system.ruby.network.routers0.throttle0.msg_count.Writeback_Control::3 425
|
||||||
|
|
|
@ -4,11 +4,11 @@ sim_seconds 0.000052 # Nu
|
||||||
sim_ticks 52498 # Number of ticks simulated
|
sim_ticks 52498 # Number of ticks simulated
|
||||||
final_tick 52498 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
|
final_tick 52498 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
|
||||||
sim_freq 1000000000 # Frequency of simulated ticks
|
sim_freq 1000000000 # Frequency of simulated ticks
|
||||||
host_inst_rate 24935 # Simulator instruction rate (inst/s)
|
host_inst_rate 23247 # Simulator instruction rate (inst/s)
|
||||||
host_op_rate 24932 # Simulator op (including micro ops) rate (op/s)
|
host_op_rate 23243 # Simulator op (including micro ops) rate (op/s)
|
||||||
host_tick_rate 507835 # Simulator tick rate (ticks/s)
|
host_tick_rate 473432 # Simulator tick rate (ticks/s)
|
||||||
host_mem_usage 124536 # Number of bytes of host memory used
|
host_mem_usage 172892 # Number of bytes of host memory used
|
||||||
host_seconds 0.10 # Real time elapsed on the host
|
host_seconds 0.11 # Real time elapsed on the host
|
||||||
sim_insts 2577 # Number of instructions simulated
|
sim_insts 2577 # Number of instructions simulated
|
||||||
sim_ops 2577 # Number of ops (including micro ops) simulated
|
sim_ops 2577 # Number of ops (including micro ops) simulated
|
||||||
system.voltage_domain.voltage 1 # Voltage in Volts
|
system.voltage_domain.voltage 1 # Voltage in Volts
|
||||||
|
@ -158,6 +158,7 @@ system.cpu.num_idle_cycles 0 # Nu
|
||||||
system.cpu.num_busy_cycles 52498 # Number of busy cycles
|
system.cpu.num_busy_cycles 52498 # Number of busy cycles
|
||||||
system.cpu.not_idle_fraction 1 # Percentage of non-idle cycles
|
system.cpu.not_idle_fraction 1 # Percentage of non-idle cycles
|
||||||
system.cpu.idle_fraction 0 # Percentage of idle cycles
|
system.cpu.idle_fraction 0 # Percentage of idle cycles
|
||||||
|
system.cpu.Branches 396 # Number of branches fetched
|
||||||
system.ruby.network.routers0.throttle0.link_utilization 5.958322
|
system.ruby.network.routers0.throttle0.link_utilization 5.958322
|
||||||
system.ruby.network.routers0.throttle0.msg_count.Response_Data::4 626
|
system.ruby.network.routers0.throttle0.msg_count.Response_Data::4 626
|
||||||
system.ruby.network.routers0.throttle0.msg_count.Writeback_Control::3 622
|
system.ruby.network.routers0.throttle0.msg_count.Writeback_Control::3 622
|
||||||
|
|
|
@ -4,11 +4,11 @@ sim_seconds 0.000017 # Nu
|
||||||
sim_ticks 16524000 # Number of ticks simulated
|
sim_ticks 16524000 # Number of ticks simulated
|
||||||
final_tick 16524000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
|
final_tick 16524000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
|
||||||
sim_freq 1000000000000 # Frequency of simulated ticks
|
sim_freq 1000000000000 # Frequency of simulated ticks
|
||||||
host_inst_rate 33204 # Simulator instruction rate (inst/s)
|
host_inst_rate 56666 # Simulator instruction rate (inst/s)
|
||||||
host_op_rate 33192 # Simulator op (including micro ops) rate (op/s)
|
host_op_rate 56644 # Simulator op (including micro ops) rate (op/s)
|
||||||
host_tick_rate 212757424 # Simulator tick rate (ticks/s)
|
host_tick_rate 363064230 # Simulator tick rate (ticks/s)
|
||||||
host_mem_usage 228444 # Number of bytes of host memory used
|
host_mem_usage 275808 # Number of bytes of host memory used
|
||||||
host_seconds 0.08 # Real time elapsed on the host
|
host_seconds 0.05 # Real time elapsed on the host
|
||||||
sim_insts 2577 # Number of instructions simulated
|
sim_insts 2577 # Number of instructions simulated
|
||||||
sim_ops 2577 # Number of ops (including micro ops) simulated
|
sim_ops 2577 # Number of ops (including micro ops) simulated
|
||||||
system.voltage_domain.voltage 1 # Voltage in Volts
|
system.voltage_domain.voltage 1 # Voltage in Volts
|
||||||
|
@ -100,6 +100,7 @@ system.cpu.num_idle_cycles 0 # Nu
|
||||||
system.cpu.num_busy_cycles 33048 # Number of busy cycles
|
system.cpu.num_busy_cycles 33048 # Number of busy cycles
|
||||||
system.cpu.not_idle_fraction 1 # Percentage of non-idle cycles
|
system.cpu.not_idle_fraction 1 # Percentage of non-idle cycles
|
||||||
system.cpu.idle_fraction 0 # Percentage of idle cycles
|
system.cpu.idle_fraction 0 # Percentage of idle cycles
|
||||||
|
system.cpu.Branches 396 # Number of branches fetched
|
||||||
system.cpu.icache.tags.replacements 0 # number of replacements
|
system.cpu.icache.tags.replacements 0 # number of replacements
|
||||||
system.cpu.icache.tags.tagsinuse 80.050296 # Cycle average of tags in use
|
system.cpu.icache.tags.tagsinuse 80.050296 # Cycle average of tags in use
|
||||||
system.cpu.icache.tags.total_refs 2423 # Total number of references to valid blocks.
|
system.cpu.icache.tags.total_refs 2423 # Total number of references to valid blocks.
|
||||||
|
|
|
@ -4,11 +4,11 @@ sim_seconds 0.000003 # Nu
|
||||||
sim_ticks 2870500 # Number of ticks simulated
|
sim_ticks 2870500 # Number of ticks simulated
|
||||||
final_tick 2870500 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
|
final_tick 2870500 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
|
||||||
sim_freq 1000000000000 # Frequency of simulated ticks
|
sim_freq 1000000000000 # Frequency of simulated ticks
|
||||||
host_inst_rate 147367 # Simulator instruction rate (inst/s)
|
host_inst_rate 97101 # Simulator instruction rate (inst/s)
|
||||||
host_op_rate 183813 # Simulator op (including micro ops) rate (op/s)
|
host_op_rate 121123 # Simulator op (including micro ops) rate (op/s)
|
||||||
host_tick_rate 92059834 # Simulator tick rate (ticks/s)
|
host_tick_rate 60664840 # Simulator tick rate (ticks/s)
|
||||||
host_mem_usage 256900 # Number of bytes of host memory used
|
host_mem_usage 311632 # Number of bytes of host memory used
|
||||||
host_seconds 0.03 # Real time elapsed on the host
|
host_seconds 0.05 # Real time elapsed on the host
|
||||||
sim_insts 4591 # Number of instructions simulated
|
sim_insts 4591 # Number of instructions simulated
|
||||||
sim_ops 5729 # Number of ops (including micro ops) simulated
|
sim_ops 5729 # Number of ops (including micro ops) simulated
|
||||||
system.voltage_domain.voltage 1 # Voltage in Volts
|
system.voltage_domain.voltage 1 # Voltage in Volts
|
||||||
|
@ -233,5 +233,6 @@ system.cpu.num_idle_cycles 0 # Nu
|
||||||
system.cpu.num_busy_cycles 5742 # Number of busy cycles
|
system.cpu.num_busy_cycles 5742 # Number of busy cycles
|
||||||
system.cpu.not_idle_fraction 1 # Percentage of non-idle cycles
|
system.cpu.not_idle_fraction 1 # Percentage of non-idle cycles
|
||||||
system.cpu.idle_fraction 0 # Percentage of idle cycles
|
system.cpu.idle_fraction 0 # Percentage of idle cycles
|
||||||
|
system.cpu.Branches 1007 # Number of branches fetched
|
||||||
|
|
||||||
---------- End Simulation Statistics ----------
|
---------- End Simulation Statistics ----------
|
||||||
|
|
|
@ -4,11 +4,11 @@ sim_seconds 0.000003 # Nu
|
||||||
sim_ticks 2870500 # Number of ticks simulated
|
sim_ticks 2870500 # Number of ticks simulated
|
||||||
final_tick 2870500 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
|
final_tick 2870500 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
|
||||||
sim_freq 1000000000000 # Frequency of simulated ticks
|
sim_freq 1000000000000 # Frequency of simulated ticks
|
||||||
host_inst_rate 135849 # Simulator instruction rate (inst/s)
|
host_inst_rate 82560 # Simulator instruction rate (inst/s)
|
||||||
host_op_rate 169454 # Simulator op (including micro ops) rate (op/s)
|
host_op_rate 102991 # Simulator op (including micro ops) rate (op/s)
|
||||||
host_tick_rate 84871687 # Simulator tick rate (ticks/s)
|
host_tick_rate 51587489 # Simulator tick rate (ticks/s)
|
||||||
host_mem_usage 256868 # Number of bytes of host memory used
|
host_mem_usage 311624 # Number of bytes of host memory used
|
||||||
host_seconds 0.03 # Real time elapsed on the host
|
host_seconds 0.06 # Real time elapsed on the host
|
||||||
sim_insts 4591 # Number of instructions simulated
|
sim_insts 4591 # Number of instructions simulated
|
||||||
sim_ops 5729 # Number of ops (including micro ops) simulated
|
sim_ops 5729 # Number of ops (including micro ops) simulated
|
||||||
system.voltage_domain.voltage 1 # Voltage in Volts
|
system.voltage_domain.voltage 1 # Voltage in Volts
|
||||||
|
@ -146,5 +146,6 @@ system.cpu.num_idle_cycles 0 # Nu
|
||||||
system.cpu.num_busy_cycles 5742 # Number of busy cycles
|
system.cpu.num_busy_cycles 5742 # Number of busy cycles
|
||||||
system.cpu.not_idle_fraction 1 # Percentage of non-idle cycles
|
system.cpu.not_idle_fraction 1 # Percentage of non-idle cycles
|
||||||
system.cpu.idle_fraction 0 # Percentage of idle cycles
|
system.cpu.idle_fraction 0 # Percentage of idle cycles
|
||||||
|
system.cpu.Branches 1007 # Number of branches fetched
|
||||||
|
|
||||||
---------- End Simulation Statistics ----------
|
---------- End Simulation Statistics ----------
|
||||||
|
|
|
@ -4,11 +4,11 @@ sim_seconds 0.000026 # Nu
|
||||||
sim_ticks 25969000 # Number of ticks simulated
|
sim_ticks 25969000 # Number of ticks simulated
|
||||||
final_tick 25969000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
|
final_tick 25969000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
|
||||||
sim_freq 1000000000000 # Frequency of simulated ticks
|
sim_freq 1000000000000 # Frequency of simulated ticks
|
||||||
host_inst_rate 122117 # Simulator instruction rate (inst/s)
|
host_inst_rate 82063 # Simulator instruction rate (inst/s)
|
||||||
host_op_rate 151672 # Simulator op (including micro ops) rate (op/s)
|
host_op_rate 101927 # Simulator op (including micro ops) rate (op/s)
|
||||||
host_tick_rate 694181161 # Simulator tick rate (ticks/s)
|
host_tick_rate 466514904 # Simulator tick rate (ticks/s)
|
||||||
host_mem_usage 266760 # Number of bytes of host memory used
|
host_mem_usage 320464 # Number of bytes of host memory used
|
||||||
host_seconds 0.04 # Real time elapsed on the host
|
host_seconds 0.06 # Real time elapsed on the host
|
||||||
sim_insts 4565 # Number of instructions simulated
|
sim_insts 4565 # Number of instructions simulated
|
||||||
sim_ops 5672 # Number of ops (including micro ops) simulated
|
sim_ops 5672 # Number of ops (including micro ops) simulated
|
||||||
system.voltage_domain.voltage 1 # Voltage in Volts
|
system.voltage_domain.voltage 1 # Voltage in Volts
|
||||||
|
@ -152,6 +152,7 @@ system.cpu.num_idle_cycles 0 # Nu
|
||||||
system.cpu.num_busy_cycles 51938 # Number of busy cycles
|
system.cpu.num_busy_cycles 51938 # Number of busy cycles
|
||||||
system.cpu.not_idle_fraction 1 # Percentage of non-idle cycles
|
system.cpu.not_idle_fraction 1 # Percentage of non-idle cycles
|
||||||
system.cpu.idle_fraction 0 # Percentage of idle cycles
|
system.cpu.idle_fraction 0 # Percentage of idle cycles
|
||||||
|
system.cpu.Branches 1007 # Number of branches fetched
|
||||||
system.cpu.icache.tags.replacements 1 # number of replacements
|
system.cpu.icache.tags.replacements 1 # number of replacements
|
||||||
system.cpu.icache.tags.tagsinuse 114.614391 # Cycle average of tags in use
|
system.cpu.icache.tags.tagsinuse 114.614391 # Cycle average of tags in use
|
||||||
system.cpu.icache.tags.total_refs 4364 # Total number of references to valid blocks.
|
system.cpu.icache.tags.total_refs 4364 # Total number of references to valid blocks.
|
||||||
|
|
|
@ -4,11 +4,11 @@ sim_seconds 0.000003 # Nu
|
||||||
sim_ticks 2907000 # Number of ticks simulated
|
sim_ticks 2907000 # Number of ticks simulated
|
||||||
final_tick 2907000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
|
final_tick 2907000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
|
||||||
sim_freq 1000000000000 # Frequency of simulated ticks
|
sim_freq 1000000000000 # Frequency of simulated ticks
|
||||||
host_inst_rate 88855 # Simulator instruction rate (inst/s)
|
host_inst_rate 99853 # Simulator instruction rate (inst/s)
|
||||||
host_op_rate 88837 # Simulator op (including micro ops) rate (op/s)
|
host_op_rate 99820 # Simulator op (including micro ops) rate (op/s)
|
||||||
host_tick_rate 44409305 # Simulator tick rate (ticks/s)
|
host_tick_rate 49894332 # Simulator tick rate (ticks/s)
|
||||||
host_mem_usage 220784 # Number of bytes of host memory used
|
host_mem_usage 269208 # Number of bytes of host memory used
|
||||||
host_seconds 0.07 # Real time elapsed on the host
|
host_seconds 0.06 # Real time elapsed on the host
|
||||||
sim_insts 5814 # Number of instructions simulated
|
sim_insts 5814 # Number of instructions simulated
|
||||||
sim_ops 5814 # Number of ops (including micro ops) simulated
|
sim_ops 5814 # Number of ops (including micro ops) simulated
|
||||||
system.voltage_domain.voltage 1 # Voltage in Volts
|
system.voltage_domain.voltage 1 # Voltage in Volts
|
||||||
|
@ -80,5 +80,6 @@ system.cpu.num_idle_cycles 0 # Nu
|
||||||
system.cpu.num_busy_cycles 5815 # Number of busy cycles
|
system.cpu.num_busy_cycles 5815 # Number of busy cycles
|
||||||
system.cpu.not_idle_fraction 1 # Percentage of non-idle cycles
|
system.cpu.not_idle_fraction 1 # Percentage of non-idle cycles
|
||||||
system.cpu.idle_fraction 0 # Percentage of idle cycles
|
system.cpu.idle_fraction 0 # Percentage of idle cycles
|
||||||
|
system.cpu.Branches 915 # Number of branches fetched
|
||||||
|
|
||||||
---------- End Simulation Statistics ----------
|
---------- End Simulation Statistics ----------
|
||||||
|
|
|
@ -4,11 +4,11 @@ sim_seconds 0.000125 # Nu
|
||||||
sim_ticks 125334 # Number of ticks simulated
|
sim_ticks 125334 # Number of ticks simulated
|
||||||
final_tick 125334 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
|
final_tick 125334 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
|
||||||
sim_freq 1000000000 # Frequency of simulated ticks
|
sim_freq 1000000000 # Frequency of simulated ticks
|
||||||
host_inst_rate 38153 # Simulator instruction rate (inst/s)
|
host_inst_rate 31744 # Simulator instruction rate (inst/s)
|
||||||
host_op_rate 38149 # Simulator op (including micro ops) rate (op/s)
|
host_op_rate 31741 # Simulator op (including micro ops) rate (op/s)
|
||||||
host_tick_rate 822314 # Simulator tick rate (ticks/s)
|
host_tick_rate 684175 # Simulator tick rate (ticks/s)
|
||||||
host_mem_usage 127760 # Number of bytes of host memory used
|
host_mem_usage 176152 # Number of bytes of host memory used
|
||||||
host_seconds 0.15 # Real time elapsed on the host
|
host_seconds 0.18 # Real time elapsed on the host
|
||||||
sim_insts 5814 # Number of instructions simulated
|
sim_insts 5814 # Number of instructions simulated
|
||||||
sim_ops 5814 # Number of ops (including micro ops) simulated
|
sim_ops 5814 # Number of ops (including micro ops) simulated
|
||||||
system.voltage_domain.voltage 1 # Voltage in Volts
|
system.voltage_domain.voltage 1 # Voltage in Volts
|
||||||
|
@ -145,6 +145,7 @@ system.cpu.num_idle_cycles 0 # Nu
|
||||||
system.cpu.num_busy_cycles 125334 # Number of busy cycles
|
system.cpu.num_busy_cycles 125334 # Number of busy cycles
|
||||||
system.cpu.not_idle_fraction 1 # Percentage of non-idle cycles
|
system.cpu.not_idle_fraction 1 # Percentage of non-idle cycles
|
||||||
system.cpu.idle_fraction 0 # Percentage of idle cycles
|
system.cpu.idle_fraction 0 # Percentage of idle cycles
|
||||||
|
system.cpu.Branches 915 # Number of branches fetched
|
||||||
system.ruby.network.routers0.throttle0.link_utilization 5.954490
|
system.ruby.network.routers0.throttle0.link_utilization 5.954490
|
||||||
system.ruby.network.routers0.throttle0.msg_count.Response_Data::4 1493
|
system.ruby.network.routers0.throttle0.msg_count.Response_Data::4 1493
|
||||||
system.ruby.network.routers0.throttle0.msg_count.Writeback_Control::3 1489
|
system.ruby.network.routers0.throttle0.msg_count.Writeback_Control::3 1489
|
||||||
|
|
|
@ -4,11 +4,11 @@ sim_seconds 0.000032 # Nu
|
||||||
sim_ticks 31633000 # Number of ticks simulated
|
sim_ticks 31633000 # Number of ticks simulated
|
||||||
final_tick 31633000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
|
final_tick 31633000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
|
||||||
sim_freq 1000000000000 # Frequency of simulated ticks
|
sim_freq 1000000000000 # Frequency of simulated ticks
|
||||||
host_inst_rate 65946 # Simulator instruction rate (inst/s)
|
host_inst_rate 119247 # Simulator instruction rate (inst/s)
|
||||||
host_op_rate 65935 # Simulator op (including micro ops) rate (op/s)
|
host_op_rate 119199 # Simulator op (including micro ops) rate (op/s)
|
||||||
host_tick_rate 358688094 # Simulator tick rate (ticks/s)
|
host_tick_rate 648290000 # Simulator tick rate (ticks/s)
|
||||||
host_mem_usage 230484 # Number of bytes of host memory used
|
host_mem_usage 277916 # Number of bytes of host memory used
|
||||||
host_seconds 0.09 # Real time elapsed on the host
|
host_seconds 0.05 # Real time elapsed on the host
|
||||||
sim_insts 5814 # Number of instructions simulated
|
sim_insts 5814 # Number of instructions simulated
|
||||||
sim_ops 5814 # Number of ops (including micro ops) simulated
|
sim_ops 5814 # Number of ops (including micro ops) simulated
|
||||||
system.voltage_domain.voltage 1 # Voltage in Volts
|
system.voltage_domain.voltage 1 # Voltage in Volts
|
||||||
|
@ -86,6 +86,7 @@ system.cpu.num_idle_cycles 0 # Nu
|
||||||
system.cpu.num_busy_cycles 63266 # Number of busy cycles
|
system.cpu.num_busy_cycles 63266 # Number of busy cycles
|
||||||
system.cpu.not_idle_fraction 1 # Percentage of non-idle cycles
|
system.cpu.not_idle_fraction 1 # Percentage of non-idle cycles
|
||||||
system.cpu.idle_fraction 0 # Percentage of idle cycles
|
system.cpu.idle_fraction 0 # Percentage of idle cycles
|
||||||
|
system.cpu.Branches 915 # Number of branches fetched
|
||||||
system.cpu.icache.tags.replacements 13 # number of replacements
|
system.cpu.icache.tags.replacements 13 # number of replacements
|
||||||
system.cpu.icache.tags.tagsinuse 132.545353 # Cycle average of tags in use
|
system.cpu.icache.tags.tagsinuse 132.545353 # Cycle average of tags in use
|
||||||
system.cpu.icache.tags.total_refs 5513 # Total number of references to valid blocks.
|
system.cpu.icache.tags.total_refs 5513 # Total number of references to valid blocks.
|
||||||
|
|
|
@ -4,11 +4,11 @@ sim_seconds 0.000003 # Nu
|
||||||
sim_ticks 2896000 # Number of ticks simulated
|
sim_ticks 2896000 # Number of ticks simulated
|
||||||
final_tick 2896000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
|
final_tick 2896000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
|
||||||
sim_freq 1000000000000 # Frequency of simulated ticks
|
sim_freq 1000000000000 # Frequency of simulated ticks
|
||||||
host_inst_rate 80864 # Simulator instruction rate (inst/s)
|
host_inst_rate 139089 # Simulator instruction rate (inst/s)
|
||||||
host_op_rate 80849 # Simulator op (including micro ops) rate (op/s)
|
host_op_rate 138996 # Simulator op (including micro ops) rate (op/s)
|
||||||
host_tick_rate 40410591 # Simulator tick rate (ticks/s)
|
host_tick_rate 69453756 # Simulator tick rate (ticks/s)
|
||||||
host_mem_usage 216708 # Number of bytes of host memory used
|
host_mem_usage 265200 # Number of bytes of host memory used
|
||||||
host_seconds 0.07 # Real time elapsed on the host
|
host_seconds 0.04 # Real time elapsed on the host
|
||||||
sim_insts 5793 # Number of instructions simulated
|
sim_insts 5793 # Number of instructions simulated
|
||||||
sim_ops 5793 # Number of ops (including micro ops) simulated
|
sim_ops 5793 # Number of ops (including micro ops) simulated
|
||||||
system.voltage_domain.voltage 1 # Voltage in Volts
|
system.voltage_domain.voltage 1 # Voltage in Volts
|
||||||
|
@ -80,5 +80,6 @@ system.cpu.num_idle_cycles 0 # Nu
|
||||||
system.cpu.num_busy_cycles 5793 # Number of busy cycles
|
system.cpu.num_busy_cycles 5793 # Number of busy cycles
|
||||||
system.cpu.not_idle_fraction 1 # Percentage of non-idle cycles
|
system.cpu.not_idle_fraction 1 # Percentage of non-idle cycles
|
||||||
system.cpu.idle_fraction 0 # Percentage of idle cycles
|
system.cpu.idle_fraction 0 # Percentage of idle cycles
|
||||||
|
system.cpu.Branches 1037 # Number of branches fetched
|
||||||
|
|
||||||
---------- End Simulation Statistics ----------
|
---------- End Simulation Statistics ----------
|
||||||
|
|
|
@ -18,6 +18,7 @@ eventq_index=0
|
||||||
init_param=0
|
init_param=0
|
||||||
kernel=
|
kernel=
|
||||||
load_addr_mask=1099511627775
|
load_addr_mask=1099511627775
|
||||||
|
load_offset=0
|
||||||
mem_mode=atomic
|
mem_mode=atomic
|
||||||
mem_ranges=
|
mem_ranges=
|
||||||
memories=system.physmem
|
memories=system.physmem
|
||||||
|
@ -42,6 +43,7 @@ voltage_domain=system.voltage_domain
|
||||||
[system.cpu]
|
[system.cpu]
|
||||||
type=AtomicSimpleCPU
|
type=AtomicSimpleCPU
|
||||||
children=dtb interrupts isa itb tracer workload
|
children=dtb interrupts isa itb tracer workload
|
||||||
|
branchPred=Null
|
||||||
checker=Null
|
checker=Null
|
||||||
clk_domain=system.cpu_clk_domain
|
clk_domain=system.cpu_clk_domain
|
||||||
cpu_id=0
|
cpu_id=0
|
||||||
|
@ -108,7 +110,7 @@ env=
|
||||||
errout=cerr
|
errout=cerr
|
||||||
euid=100
|
euid=100
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
executable=/dist/test-progs/hello/bin/sparc/linux/hello
|
executable=tests/test-progs/hello/bin/sparc/linux/hello
|
||||||
gid=100
|
gid=100
|
||||||
input=cin
|
input=cin
|
||||||
max_stack_size=67108864
|
max_stack_size=67108864
|
||||||
|
|
|
@ -1,9 +1,11 @@
|
||||||
|
Redirecting stdout to build/SPARC/tests/opt/quick/se/00.hello/sparc/linux/simple-atomic/simout
|
||||||
|
Redirecting stderr to build/SPARC/tests/opt/quick/se/00.hello/sparc/linux/simple-atomic/simerr
|
||||||
gem5 Simulator System. http://gem5.org
|
gem5 Simulator System. http://gem5.org
|
||||||
gem5 is copyrighted software; use the --copyright option for details.
|
gem5 is copyrighted software; use the --copyright option for details.
|
||||||
|
|
||||||
gem5 compiled Jan 22 2014 17:04:27
|
gem5 compiled Feb 15 2014 16:11:41
|
||||||
gem5 started Jan 22 2014 17:29:22
|
gem5 started Feb 15 2014 16:12:32
|
||||||
gem5 executing on u200540-lin
|
gem5 executing on ribera.cs.wisc.edu
|
||||||
command line: build/SPARC/gem5.opt -d build/SPARC/tests/opt/quick/se/00.hello/sparc/linux/simple-atomic -re tests/run.py build/SPARC/tests/opt/quick/se/00.hello/sparc/linux/simple-atomic
|
command line: build/SPARC/gem5.opt -d build/SPARC/tests/opt/quick/se/00.hello/sparc/linux/simple-atomic -re tests/run.py build/SPARC/tests/opt/quick/se/00.hello/sparc/linux/simple-atomic
|
||||||
Global frequency set at 1000000000000 ticks per second
|
Global frequency set at 1000000000000 ticks per second
|
||||||
info: Entering event queue @ 0. Starting simulation...
|
info: Entering event queue @ 0. Starting simulation...
|
||||||
|
|
|
@ -4,11 +4,11 @@ sim_seconds 0.000003 # Nu
|
||||||
sim_ticks 2694500 # Number of ticks simulated
|
sim_ticks 2694500 # Number of ticks simulated
|
||||||
final_tick 2694500 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
|
final_tick 2694500 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
|
||||||
sim_freq 1000000000000 # Frequency of simulated ticks
|
sim_freq 1000000000000 # Frequency of simulated ticks
|
||||||
host_inst_rate 53422 # Simulator instruction rate (inst/s)
|
host_inst_rate 97647 # Simulator instruction rate (inst/s)
|
||||||
host_op_rate 53415 # Simulator op (including micro ops) rate (op/s)
|
host_op_rate 97614 # Simulator op (including micro ops) rate (op/s)
|
||||||
host_tick_rate 27014162 # Simulator tick rate (ticks/s)
|
host_tick_rate 49358124 # Simulator tick rate (ticks/s)
|
||||||
host_mem_usage 227132 # Number of bytes of host memory used
|
host_mem_usage 275540 # Number of bytes of host memory used
|
||||||
host_seconds 0.10 # Real time elapsed on the host
|
host_seconds 0.05 # Real time elapsed on the host
|
||||||
sim_insts 5327 # Number of instructions simulated
|
sim_insts 5327 # Number of instructions simulated
|
||||||
sim_ops 5327 # Number of ops (including micro ops) simulated
|
sim_ops 5327 # Number of ops (including micro ops) simulated
|
||||||
system.voltage_domain.voltage 1 # Voltage in Volts
|
system.voltage_domain.voltage 1 # Voltage in Volts
|
||||||
|
@ -62,5 +62,6 @@ system.cpu.num_idle_cycles 0 # Nu
|
||||||
system.cpu.num_busy_cycles 5390 # Number of busy cycles
|
system.cpu.num_busy_cycles 5390 # Number of busy cycles
|
||||||
system.cpu.not_idle_fraction 1 # Percentage of non-idle cycles
|
system.cpu.not_idle_fraction 1 # Percentage of non-idle cycles
|
||||||
system.cpu.idle_fraction 0 # Percentage of idle cycles
|
system.cpu.idle_fraction 0 # Percentage of idle cycles
|
||||||
|
system.cpu.Branches 1121 # Number of branches fetched
|
||||||
|
|
||||||
---------- End Simulation Statistics ----------
|
---------- End Simulation Statistics ----------
|
||||||
|
|
|
@ -18,6 +18,7 @@ eventq_index=0
|
||||||
init_param=0
|
init_param=0
|
||||||
kernel=
|
kernel=
|
||||||
load_addr_mask=1099511627775
|
load_addr_mask=1099511627775
|
||||||
|
load_offset=0
|
||||||
mem_mode=timing
|
mem_mode=timing
|
||||||
mem_ranges=0:268435455
|
mem_ranges=0:268435455
|
||||||
memories=system.physmem
|
memories=system.physmem
|
||||||
|
@ -42,6 +43,7 @@ voltage_domain=system.voltage_domain
|
||||||
[system.cpu]
|
[system.cpu]
|
||||||
type=TimingSimpleCPU
|
type=TimingSimpleCPU
|
||||||
children=clk_domain dtb interrupts isa itb tracer workload
|
children=clk_domain dtb interrupts isa itb tracer workload
|
||||||
|
branchPred=Null
|
||||||
checker=Null
|
checker=Null
|
||||||
clk_domain=system.cpu.clk_domain
|
clk_domain=system.cpu.clk_domain
|
||||||
cpu_id=0
|
cpu_id=0
|
||||||
|
@ -107,7 +109,7 @@ env=
|
||||||
errout=cerr
|
errout=cerr
|
||||||
euid=100
|
euid=100
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
executable=/dist/test-progs/hello/bin/sparc/linux/hello
|
executable=tests/test-progs/hello/bin/sparc/linux/hello
|
||||||
gid=100
|
gid=100
|
||||||
input=cin
|
input=cin
|
||||||
max_stack_size=67108864
|
max_stack_size=67108864
|
||||||
|
|
|
@ -1,9 +1,11 @@
|
||||||
|
Redirecting stdout to build/SPARC/tests/opt/quick/se/00.hello/sparc/linux/simple-timing-ruby/simout
|
||||||
|
Redirecting stderr to build/SPARC/tests/opt/quick/se/00.hello/sparc/linux/simple-timing-ruby/simerr
|
||||||
gem5 Simulator System. http://gem5.org
|
gem5 Simulator System. http://gem5.org
|
||||||
gem5 is copyrighted software; use the --copyright option for details.
|
gem5 is copyrighted software; use the --copyright option for details.
|
||||||
|
|
||||||
gem5 compiled Jan 22 2014 17:04:27
|
gem5 compiled Feb 15 2014 16:11:41
|
||||||
gem5 started Jan 22 2014 17:29:33
|
gem5 started Feb 15 2014 16:12:47
|
||||||
gem5 executing on u200540-lin
|
gem5 executing on ribera.cs.wisc.edu
|
||||||
command line: build/SPARC/gem5.opt -d build/SPARC/tests/opt/quick/se/00.hello/sparc/linux/simple-timing-ruby -re tests/run.py build/SPARC/tests/opt/quick/se/00.hello/sparc/linux/simple-timing-ruby
|
command line: build/SPARC/gem5.opt -d build/SPARC/tests/opt/quick/se/00.hello/sparc/linux/simple-timing-ruby -re tests/run.py build/SPARC/tests/opt/quick/se/00.hello/sparc/linux/simple-timing-ruby
|
||||||
Global frequency set at 1000000000 ticks per second
|
Global frequency set at 1000000000 ticks per second
|
||||||
info: Entering event queue @ 0. Starting simulation...
|
info: Entering event queue @ 0. Starting simulation...
|
||||||
|
|
|
@ -4,10 +4,10 @@ sim_seconds 0.000108 # Nu
|
||||||
sim_ticks 107952 # Number of ticks simulated
|
sim_ticks 107952 # Number of ticks simulated
|
||||||
final_tick 107952 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
|
final_tick 107952 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
|
||||||
sim_freq 1000000000 # Frequency of simulated ticks
|
sim_freq 1000000000 # Frequency of simulated ticks
|
||||||
host_inst_rate 32230 # Simulator instruction rate (inst/s)
|
host_inst_rate 31490 # Simulator instruction rate (inst/s)
|
||||||
host_op_rate 32227 # Simulator op (including micro ops) rate (op/s)
|
host_op_rate 31486 # Simulator op (including micro ops) rate (op/s)
|
||||||
host_tick_rate 653032 # Simulator tick rate (ticks/s)
|
host_tick_rate 638004 # Simulator tick rate (ticks/s)
|
||||||
host_mem_usage 134144 # Number of bytes of host memory used
|
host_mem_usage 182480 # Number of bytes of host memory used
|
||||||
host_seconds 0.17 # Real time elapsed on the host
|
host_seconds 0.17 # Real time elapsed on the host
|
||||||
sim_insts 5327 # Number of instructions simulated
|
sim_insts 5327 # Number of instructions simulated
|
||||||
sim_ops 5327 # Number of ops (including micro ops) simulated
|
sim_ops 5327 # Number of ops (including micro ops) simulated
|
||||||
|
@ -127,6 +127,7 @@ system.cpu.num_idle_cycles 0 # Nu
|
||||||
system.cpu.num_busy_cycles 107952 # Number of busy cycles
|
system.cpu.num_busy_cycles 107952 # Number of busy cycles
|
||||||
system.cpu.not_idle_fraction 1 # Percentage of non-idle cycles
|
system.cpu.not_idle_fraction 1 # Percentage of non-idle cycles
|
||||||
system.cpu.idle_fraction 0 # Percentage of idle cycles
|
system.cpu.idle_fraction 0 # Percentage of idle cycles
|
||||||
|
system.cpu.Branches 1121 # Number of branches fetched
|
||||||
system.ruby.network.routers0.throttle0.link_utilization 5.968393
|
system.ruby.network.routers0.throttle0.link_utilization 5.968393
|
||||||
system.ruby.network.routers0.throttle0.msg_count.Response_Data::4 1289
|
system.ruby.network.routers0.throttle0.msg_count.Response_Data::4 1289
|
||||||
system.ruby.network.routers0.throttle0.msg_count.Writeback_Control::3 1285
|
system.ruby.network.routers0.throttle0.msg_count.Writeback_Control::3 1285
|
||||||
|
|
|
@ -18,6 +18,7 @@ eventq_index=0
|
||||||
init_param=0
|
init_param=0
|
||||||
kernel=
|
kernel=
|
||||||
load_addr_mask=1099511627775
|
load_addr_mask=1099511627775
|
||||||
|
load_offset=0
|
||||||
mem_mode=timing
|
mem_mode=timing
|
||||||
mem_ranges=
|
mem_ranges=
|
||||||
memories=system.physmem
|
memories=system.physmem
|
||||||
|
@ -42,6 +43,7 @@ voltage_domain=system.voltage_domain
|
||||||
[system.cpu]
|
[system.cpu]
|
||||||
type=TimingSimpleCPU
|
type=TimingSimpleCPU
|
||||||
children=dcache dtb icache interrupts isa itb l2cache toL2Bus tracer workload
|
children=dcache dtb icache interrupts isa itb l2cache toL2Bus tracer workload
|
||||||
|
branchPred=Null
|
||||||
checker=Null
|
checker=Null
|
||||||
clk_domain=system.cpu_clk_domain
|
clk_domain=system.cpu_clk_domain
|
||||||
cpu_id=0
|
cpu_id=0
|
||||||
|
@ -217,7 +219,7 @@ env=
|
||||||
errout=cerr
|
errout=cerr
|
||||||
euid=100
|
euid=100
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
executable=/dist/test-progs/hello/bin/sparc/linux/hello
|
executable=tests/test-progs/hello/bin/sparc/linux/hello
|
||||||
gid=100
|
gid=100
|
||||||
input=cin
|
input=cin
|
||||||
max_stack_size=67108864
|
max_stack_size=67108864
|
||||||
|
|
|
@ -1,9 +1,11 @@
|
||||||
|
Redirecting stdout to build/SPARC/tests/opt/quick/se/00.hello/sparc/linux/simple-timing/simout
|
||||||
|
Redirecting stderr to build/SPARC/tests/opt/quick/se/00.hello/sparc/linux/simple-timing/simerr
|
||||||
gem5 Simulator System. http://gem5.org
|
gem5 Simulator System. http://gem5.org
|
||||||
gem5 is copyrighted software; use the --copyright option for details.
|
gem5 is copyrighted software; use the --copyright option for details.
|
||||||
|
|
||||||
gem5 compiled Jan 22 2014 17:04:27
|
gem5 compiled Feb 15 2014 16:11:41
|
||||||
gem5 started Jan 22 2014 17:29:24
|
gem5 started Feb 15 2014 16:11:56
|
||||||
gem5 executing on u200540-lin
|
gem5 executing on ribera.cs.wisc.edu
|
||||||
command line: build/SPARC/gem5.opt -d build/SPARC/tests/opt/quick/se/00.hello/sparc/linux/simple-timing -re tests/run.py build/SPARC/tests/opt/quick/se/00.hello/sparc/linux/simple-timing
|
command line: build/SPARC/gem5.opt -d build/SPARC/tests/opt/quick/se/00.hello/sparc/linux/simple-timing -re tests/run.py build/SPARC/tests/opt/quick/se/00.hello/sparc/linux/simple-timing
|
||||||
Global frequency set at 1000000000000 ticks per second
|
Global frequency set at 1000000000000 ticks per second
|
||||||
info: Entering event queue @ 0. Starting simulation...
|
info: Entering event queue @ 0. Starting simulation...
|
||||||
|
|
|
@ -4,11 +4,11 @@ sim_seconds 0.000028 # Nu
|
||||||
sim_ticks 27800000 # Number of ticks simulated
|
sim_ticks 27800000 # Number of ticks simulated
|
||||||
final_tick 27800000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
|
final_tick 27800000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
|
||||||
sim_freq 1000000000000 # Frequency of simulated ticks
|
sim_freq 1000000000000 # Frequency of simulated ticks
|
||||||
host_inst_rate 44522 # Simulator instruction rate (inst/s)
|
host_inst_rate 49661 # Simulator instruction rate (inst/s)
|
||||||
host_op_rate 44517 # Simulator op (including micro ops) rate (op/s)
|
host_op_rate 49653 # Simulator op (including micro ops) rate (op/s)
|
||||||
host_tick_rate 232295322 # Simulator tick rate (ticks/s)
|
host_tick_rate 259077754 # Simulator tick rate (ticks/s)
|
||||||
host_mem_usage 236896 # Number of bytes of host memory used
|
host_mem_usage 284248 # Number of bytes of host memory used
|
||||||
host_seconds 0.12 # Real time elapsed on the host
|
host_seconds 0.11 # Real time elapsed on the host
|
||||||
sim_insts 5327 # Number of instructions simulated
|
sim_insts 5327 # Number of instructions simulated
|
||||||
sim_ops 5327 # Number of ops (including micro ops) simulated
|
sim_ops 5327 # Number of ops (including micro ops) simulated
|
||||||
system.voltage_domain.voltage 1 # Voltage in Volts
|
system.voltage_domain.voltage 1 # Voltage in Volts
|
||||||
|
@ -68,6 +68,7 @@ system.cpu.num_idle_cycles 0 # Nu
|
||||||
system.cpu.num_busy_cycles 55600 # Number of busy cycles
|
system.cpu.num_busy_cycles 55600 # Number of busy cycles
|
||||||
system.cpu.not_idle_fraction 1 # Percentage of non-idle cycles
|
system.cpu.not_idle_fraction 1 # Percentage of non-idle cycles
|
||||||
system.cpu.idle_fraction 0 # Percentage of idle cycles
|
system.cpu.idle_fraction 0 # Percentage of idle cycles
|
||||||
|
system.cpu.Branches 1121 # Number of branches fetched
|
||||||
system.cpu.icache.tags.replacements 0 # number of replacements
|
system.cpu.icache.tags.replacements 0 # number of replacements
|
||||||
system.cpu.icache.tags.tagsinuse 117.043638 # Cycle average of tags in use
|
system.cpu.icache.tags.tagsinuse 117.043638 # Cycle average of tags in use
|
||||||
system.cpu.icache.tags.total_refs 5114 # Total number of references to valid blocks.
|
system.cpu.icache.tags.total_refs 5114 # Total number of references to valid blocks.
|
||||||
|
|
|
@ -4,10 +4,10 @@ sim_seconds 0.000006 # Nu
|
||||||
sim_ticks 5615000 # Number of ticks simulated
|
sim_ticks 5615000 # Number of ticks simulated
|
||||||
final_tick 5615000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
|
final_tick 5615000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
|
||||||
sim_freq 1000000000000 # Frequency of simulated ticks
|
sim_freq 1000000000000 # Frequency of simulated ticks
|
||||||
host_inst_rate 57117 # Simulator instruction rate (inst/s)
|
host_inst_rate 57597 # Simulator instruction rate (inst/s)
|
||||||
host_op_rate 103440 # Simulator op (including micro ops) rate (op/s)
|
host_op_rate 104318 # Simulator op (including micro ops) rate (op/s)
|
||||||
host_tick_rate 59566456 # Simulator tick rate (ticks/s)
|
host_tick_rate 60076981 # Simulator tick rate (ticks/s)
|
||||||
host_mem_usage 237684 # Number of bytes of host memory used
|
host_mem_usage 286548 # Number of bytes of host memory used
|
||||||
host_seconds 0.09 # Real time elapsed on the host
|
host_seconds 0.09 # Real time elapsed on the host
|
||||||
sim_insts 5381 # Number of instructions simulated
|
sim_insts 5381 # Number of instructions simulated
|
||||||
sim_ops 9748 # Number of ops (including micro ops) simulated
|
sim_ops 9748 # Number of ops (including micro ops) simulated
|
||||||
|
@ -65,5 +65,6 @@ system.cpu.num_idle_cycles 0 # Nu
|
||||||
system.cpu.num_busy_cycles 11231 # Number of busy cycles
|
system.cpu.num_busy_cycles 11231 # Number of busy cycles
|
||||||
system.cpu.not_idle_fraction 1 # Percentage of non-idle cycles
|
system.cpu.not_idle_fraction 1 # Percentage of non-idle cycles
|
||||||
system.cpu.idle_fraction 0 # Percentage of idle cycles
|
system.cpu.idle_fraction 0 # Percentage of idle cycles
|
||||||
|
system.cpu.Branches 1208 # Number of branches fetched
|
||||||
|
|
||||||
---------- End Simulation Statistics ----------
|
---------- End Simulation Statistics ----------
|
||||||
|
|
|
@ -18,6 +18,7 @@ eventq_index=0
|
||||||
init_param=0
|
init_param=0
|
||||||
kernel=
|
kernel=
|
||||||
load_addr_mask=1099511627775
|
load_addr_mask=1099511627775
|
||||||
|
load_offset=0
|
||||||
mem_mode=timing
|
mem_mode=timing
|
||||||
mem_ranges=0:268435455
|
mem_ranges=0:268435455
|
||||||
memories=system.physmem
|
memories=system.physmem
|
||||||
|
@ -42,6 +43,7 @@ voltage_domain=system.voltage_domain
|
||||||
[system.cpu]
|
[system.cpu]
|
||||||
type=TimingSimpleCPU
|
type=TimingSimpleCPU
|
||||||
children=apic_clk_domain clk_domain dtb interrupts isa itb tracer workload
|
children=apic_clk_domain clk_domain dtb interrupts isa itb tracer workload
|
||||||
|
branchPred=Null
|
||||||
checker=Null
|
checker=Null
|
||||||
clk_domain=system.cpu.clk_domain
|
clk_domain=system.cpu.clk_domain
|
||||||
cpu_id=0
|
cpu_id=0
|
||||||
|
@ -141,7 +143,7 @@ env=
|
||||||
errout=cerr
|
errout=cerr
|
||||||
euid=100
|
euid=100
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
executable=/dist/test-progs/hello/bin/x86/linux/hello
|
executable=tests/test-progs/hello/bin/x86/linux/hello
|
||||||
gid=100
|
gid=100
|
||||||
input=cin
|
input=cin
|
||||||
max_stack_size=67108864
|
max_stack_size=67108864
|
||||||
|
|
|
@ -1,9 +1,11 @@
|
||||||
|
Redirecting stdout to build/X86/tests/opt/quick/se/00.hello/x86/linux/simple-timing-ruby/simout
|
||||||
|
Redirecting stderr to build/X86/tests/opt/quick/se/00.hello/x86/linux/simple-timing-ruby/simerr
|
||||||
gem5 Simulator System. http://gem5.org
|
gem5 Simulator System. http://gem5.org
|
||||||
gem5 is copyrighted software; use the --copyright option for details.
|
gem5 is copyrighted software; use the --copyright option for details.
|
||||||
|
|
||||||
gem5 compiled Jan 22 2014 17:10:34
|
gem5 compiled Feb 15 2014 16:30:59
|
||||||
gem5 started Jan 22 2014 17:30:11
|
gem5 started Feb 15 2014 16:34:58
|
||||||
gem5 executing on u200540-lin
|
gem5 executing on ribera.cs.wisc.edu
|
||||||
command line: build/X86/gem5.opt -d build/X86/tests/opt/quick/se/00.hello/x86/linux/simple-timing-ruby -re tests/run.py build/X86/tests/opt/quick/se/00.hello/x86/linux/simple-timing-ruby
|
command line: build/X86/gem5.opt -d build/X86/tests/opt/quick/se/00.hello/x86/linux/simple-timing-ruby -re tests/run.py build/X86/tests/opt/quick/se/00.hello/x86/linux/simple-timing-ruby
|
||||||
Global frequency set at 1000000000 ticks per second
|
Global frequency set at 1000000000 ticks per second
|
||||||
info: Entering event queue @ 0. Starting simulation...
|
info: Entering event queue @ 0. Starting simulation...
|
||||||
|
|
|
@ -4,11 +4,11 @@ sim_seconds 0.000122 # Nu
|
||||||
sim_ticks 121759 # Number of ticks simulated
|
sim_ticks 121759 # Number of ticks simulated
|
||||||
final_tick 121759 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
|
final_tick 121759 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
|
||||||
sim_freq 1000000000 # Frequency of simulated ticks
|
sim_freq 1000000000 # Frequency of simulated ticks
|
||||||
host_inst_rate 33614 # Simulator instruction rate (inst/s)
|
host_inst_rate 29778 # Simulator instruction rate (inst/s)
|
||||||
host_op_rate 60888 # Simulator op (including micro ops) rate (op/s)
|
host_op_rate 53940 # Simulator op (including micro ops) rate (op/s)
|
||||||
host_tick_rate 760469 # Simulator tick rate (ticks/s)
|
host_tick_rate 673676 # Simulator tick rate (ticks/s)
|
||||||
host_mem_usage 144688 # Number of bytes of host memory used
|
host_mem_usage 193492 # Number of bytes of host memory used
|
||||||
host_seconds 0.16 # Real time elapsed on the host
|
host_seconds 0.18 # Real time elapsed on the host
|
||||||
sim_insts 5381 # Number of instructions simulated
|
sim_insts 5381 # Number of instructions simulated
|
||||||
sim_ops 9748 # Number of ops (including micro ops) simulated
|
sim_ops 9748 # Number of ops (including micro ops) simulated
|
||||||
system.voltage_domain.voltage 1 # Voltage in Volts
|
system.voltage_domain.voltage 1 # Voltage in Volts
|
||||||
|
@ -130,6 +130,7 @@ system.cpu.num_idle_cycles 0 # Nu
|
||||||
system.cpu.num_busy_cycles 121759 # Number of busy cycles
|
system.cpu.num_busy_cycles 121759 # Number of busy cycles
|
||||||
system.cpu.not_idle_fraction 1 # Percentage of non-idle cycles
|
system.cpu.not_idle_fraction 1 # Percentage of non-idle cycles
|
||||||
system.cpu.idle_fraction 0 # Percentage of idle cycles
|
system.cpu.idle_fraction 0 # Percentage of idle cycles
|
||||||
|
system.cpu.Branches 1208 # Number of branches fetched
|
||||||
system.ruby.network.routers0.throttle0.link_utilization 5.652970
|
system.ruby.network.routers0.throttle0.link_utilization 5.652970
|
||||||
system.ruby.network.routers0.throttle0.msg_count.Response_Data::4 1377
|
system.ruby.network.routers0.throttle0.msg_count.Response_Data::4 1377
|
||||||
system.ruby.network.routers0.throttle0.msg_count.Writeback_Control::3 1373
|
system.ruby.network.routers0.throttle0.msg_count.Writeback_Control::3 1373
|
||||||
|
|
|
@ -18,6 +18,7 @@ eventq_index=0
|
||||||
init_param=0
|
init_param=0
|
||||||
kernel=
|
kernel=
|
||||||
load_addr_mask=1099511627775
|
load_addr_mask=1099511627775
|
||||||
|
load_offset=0
|
||||||
mem_mode=timing
|
mem_mode=timing
|
||||||
mem_ranges=
|
mem_ranges=
|
||||||
memories=system.physmem
|
memories=system.physmem
|
||||||
|
@ -42,6 +43,7 @@ voltage_domain=system.voltage_domain
|
||||||
[system.cpu]
|
[system.cpu]
|
||||||
type=TimingSimpleCPU
|
type=TimingSimpleCPU
|
||||||
children=apic_clk_domain dcache dtb icache interrupts isa itb l2cache toL2Bus tracer workload
|
children=apic_clk_domain dcache dtb icache interrupts isa itb l2cache toL2Bus tracer workload
|
||||||
|
branchPred=Null
|
||||||
checker=Null
|
checker=Null
|
||||||
clk_domain=system.cpu_clk_domain
|
clk_domain=system.cpu_clk_domain
|
||||||
cpu_id=0
|
cpu_id=0
|
||||||
|
@ -251,7 +253,7 @@ env=
|
||||||
errout=cerr
|
errout=cerr
|
||||||
euid=100
|
euid=100
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
executable=/dist/test-progs/hello/bin/x86/linux/hello
|
executable=tests/test-progs/hello/bin/x86/linux/hello
|
||||||
gid=100
|
gid=100
|
||||||
input=cin
|
input=cin
|
||||||
max_stack_size=67108864
|
max_stack_size=67108864
|
||||||
|
|
|
@ -1,9 +1,11 @@
|
||||||
|
Redirecting stdout to build/X86/tests/opt/quick/se/00.hello/x86/linux/simple-timing/simout
|
||||||
|
Redirecting stderr to build/X86/tests/opt/quick/se/00.hello/x86/linux/simple-timing/simerr
|
||||||
gem5 Simulator System. http://gem5.org
|
gem5 Simulator System. http://gem5.org
|
||||||
gem5 is copyrighted software; use the --copyright option for details.
|
gem5 is copyrighted software; use the --copyright option for details.
|
||||||
|
|
||||||
gem5 compiled Jan 22 2014 17:10:34
|
gem5 compiled Feb 15 2014 16:30:59
|
||||||
gem5 started Jan 22 2014 17:30:10
|
gem5 started Feb 15 2014 16:31:13
|
||||||
gem5 executing on u200540-lin
|
gem5 executing on ribera.cs.wisc.edu
|
||||||
command line: build/X86/gem5.opt -d build/X86/tests/opt/quick/se/00.hello/x86/linux/simple-timing -re tests/run.py build/X86/tests/opt/quick/se/00.hello/x86/linux/simple-timing
|
command line: build/X86/gem5.opt -d build/X86/tests/opt/quick/se/00.hello/x86/linux/simple-timing -re tests/run.py build/X86/tests/opt/quick/se/00.hello/x86/linux/simple-timing
|
||||||
Global frequency set at 1000000000000 ticks per second
|
Global frequency set at 1000000000000 ticks per second
|
||||||
info: Entering event queue @ 0. Starting simulation...
|
info: Entering event queue @ 0. Starting simulation...
|
||||||
|
|
|
@ -4,11 +4,11 @@ sim_seconds 0.000028 # Nu
|
||||||
sim_ticks 28358000 # Number of ticks simulated
|
sim_ticks 28358000 # Number of ticks simulated
|
||||||
final_tick 28358000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
|
final_tick 28358000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
|
||||||
sim_freq 1000000000000 # Frequency of simulated ticks
|
sim_freq 1000000000000 # Frequency of simulated ticks
|
||||||
host_inst_rate 44998 # Simulator instruction rate (inst/s)
|
host_inst_rate 50744 # Simulator instruction rate (inst/s)
|
||||||
host_op_rate 81497 # Simulator op (including micro ops) rate (op/s)
|
host_op_rate 91910 # Simulator op (including micro ops) rate (op/s)
|
||||||
host_tick_rate 237030591 # Simulator tick rate (ticks/s)
|
host_tick_rate 267330545 # Simulator tick rate (ticks/s)
|
||||||
host_mem_usage 247544 # Number of bytes of host memory used
|
host_mem_usage 295388 # Number of bytes of host memory used
|
||||||
host_seconds 0.12 # Real time elapsed on the host
|
host_seconds 0.11 # Real time elapsed on the host
|
||||||
sim_insts 5381 # Number of instructions simulated
|
sim_insts 5381 # Number of instructions simulated
|
||||||
sim_ops 9748 # Number of ops (including micro ops) simulated
|
sim_ops 9748 # Number of ops (including micro ops) simulated
|
||||||
system.voltage_domain.voltage 1 # Voltage in Volts
|
system.voltage_domain.voltage 1 # Voltage in Volts
|
||||||
|
@ -73,6 +73,7 @@ system.cpu.num_idle_cycles 0 # Nu
|
||||||
system.cpu.num_busy_cycles 56716 # Number of busy cycles
|
system.cpu.num_busy_cycles 56716 # Number of busy cycles
|
||||||
system.cpu.not_idle_fraction 1 # Percentage of non-idle cycles
|
system.cpu.not_idle_fraction 1 # Percentage of non-idle cycles
|
||||||
system.cpu.idle_fraction 0 # Percentage of idle cycles
|
system.cpu.idle_fraction 0 # Percentage of idle cycles
|
||||||
|
system.cpu.Branches 1208 # Number of branches fetched
|
||||||
system.cpu.icache.tags.replacements 0 # number of replacements
|
system.cpu.icache.tags.replacements 0 # number of replacements
|
||||||
system.cpu.icache.tags.tagsinuse 105.550219 # Cycle average of tags in use
|
system.cpu.icache.tags.tagsinuse 105.550219 # Cycle average of tags in use
|
||||||
system.cpu.icache.tags.total_refs 6637 # Total number of references to valid blocks.
|
system.cpu.icache.tags.total_refs 6637 # Total number of references to valid blocks.
|
||||||
|
|
|
@ -4,11 +4,11 @@ sim_seconds 0.000008 # Nu
|
||||||
sim_ticks 7612000 # Number of ticks simulated
|
sim_ticks 7612000 # Number of ticks simulated
|
||||||
final_tick 7612000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
|
final_tick 7612000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
|
||||||
sim_freq 1000000000000 # Frequency of simulated ticks
|
sim_freq 1000000000000 # Frequency of simulated ticks
|
||||||
host_inst_rate 25833 # Simulator instruction rate (inst/s)
|
host_inst_rate 30038 # Simulator instruction rate (inst/s)
|
||||||
host_op_rate 25832 # Simulator op (including micro ops) rate (op/s)
|
host_op_rate 30037 # Simulator op (including micro ops) rate (op/s)
|
||||||
host_tick_rate 12968653 # Simulator tick rate (ticks/s)
|
host_tick_rate 15079139 # Simulator tick rate (ticks/s)
|
||||||
host_mem_usage 227056 # Number of bytes of host memory used
|
host_mem_usage 275464 # Number of bytes of host memory used
|
||||||
host_seconds 0.59 # Real time elapsed on the host
|
host_seconds 0.51 # Real time elapsed on the host
|
||||||
sim_insts 15162 # Number of instructions simulated
|
sim_insts 15162 # Number of instructions simulated
|
||||||
sim_ops 15162 # Number of ops (including micro ops) simulated
|
sim_ops 15162 # Number of ops (including micro ops) simulated
|
||||||
system.voltage_domain.voltage 1 # Voltage in Volts
|
system.voltage_domain.voltage 1 # Voltage in Volts
|
||||||
|
@ -64,5 +64,6 @@ system.cpu.num_idle_cycles 0 # Nu
|
||||||
system.cpu.num_busy_cycles 15225 # Number of busy cycles
|
system.cpu.num_busy_cycles 15225 # Number of busy cycles
|
||||||
system.cpu.not_idle_fraction 1 # Percentage of non-idle cycles
|
system.cpu.not_idle_fraction 1 # Percentage of non-idle cycles
|
||||||
system.cpu.idle_fraction 0 # Percentage of idle cycles
|
system.cpu.idle_fraction 0 # Percentage of idle cycles
|
||||||
|
system.cpu.Branches 3363 # Number of branches fetched
|
||||||
|
|
||||||
---------- End Simulation Statistics ----------
|
---------- End Simulation Statistics ----------
|
||||||
|
|
|
@ -18,6 +18,7 @@ eventq_index=0
|
||||||
init_param=0
|
init_param=0
|
||||||
kernel=
|
kernel=
|
||||||
load_addr_mask=1099511627775
|
load_addr_mask=1099511627775
|
||||||
|
load_offset=0
|
||||||
mem_mode=timing
|
mem_mode=timing
|
||||||
mem_ranges=
|
mem_ranges=
|
||||||
memories=system.physmem
|
memories=system.physmem
|
||||||
|
@ -42,6 +43,7 @@ voltage_domain=system.voltage_domain
|
||||||
[system.cpu]
|
[system.cpu]
|
||||||
type=TimingSimpleCPU
|
type=TimingSimpleCPU
|
||||||
children=dcache dtb icache interrupts isa itb l2cache toL2Bus tracer workload
|
children=dcache dtb icache interrupts isa itb l2cache toL2Bus tracer workload
|
||||||
|
branchPred=Null
|
||||||
checker=Null
|
checker=Null
|
||||||
clk_domain=system.cpu_clk_domain
|
clk_domain=system.cpu_clk_domain
|
||||||
cpu_id=0
|
cpu_id=0
|
||||||
|
@ -217,7 +219,7 @@ env=
|
||||||
errout=cerr
|
errout=cerr
|
||||||
euid=100
|
euid=100
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
executable=/dist/test-progs/insttest/bin/sparc/linux/insttest
|
executable=tests/test-progs/insttest/bin/sparc/linux/insttest
|
||||||
gid=100
|
gid=100
|
||||||
input=cin
|
input=cin
|
||||||
max_stack_size=67108864
|
max_stack_size=67108864
|
||||||
|
|
|
@ -4,11 +4,11 @@ sim_seconds 0.000041 # Nu
|
||||||
sim_ticks 41368000 # Number of ticks simulated
|
sim_ticks 41368000 # Number of ticks simulated
|
||||||
final_tick 41368000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
|
final_tick 41368000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
|
||||||
sim_freq 1000000000000 # Frequency of simulated ticks
|
sim_freq 1000000000000 # Frequency of simulated ticks
|
||||||
host_inst_rate 30355 # Simulator instruction rate (inst/s)
|
host_inst_rate 29571 # Simulator instruction rate (inst/s)
|
||||||
host_op_rate 30353 # Simulator op (including micro ops) rate (op/s)
|
host_op_rate 29570 # Simulator op (including micro ops) rate (op/s)
|
||||||
host_tick_rate 82811452 # Simulator tick rate (ticks/s)
|
host_tick_rate 80676332 # Simulator tick rate (ticks/s)
|
||||||
host_mem_usage 236788 # Number of bytes of host memory used
|
host_mem_usage 284172 # Number of bytes of host memory used
|
||||||
host_seconds 0.50 # Real time elapsed on the host
|
host_seconds 0.51 # Real time elapsed on the host
|
||||||
sim_insts 15162 # Number of instructions simulated
|
sim_insts 15162 # Number of instructions simulated
|
||||||
sim_ops 15162 # Number of ops (including micro ops) simulated
|
sim_ops 15162 # Number of ops (including micro ops) simulated
|
||||||
system.voltage_domain.voltage 1 # Voltage in Volts
|
system.voltage_domain.voltage 1 # Voltage in Volts
|
||||||
|
@ -68,6 +68,7 @@ system.cpu.num_idle_cycles 0 # Nu
|
||||||
system.cpu.num_busy_cycles 82736 # Number of busy cycles
|
system.cpu.num_busy_cycles 82736 # Number of busy cycles
|
||||||
system.cpu.not_idle_fraction 1 # Percentage of non-idle cycles
|
system.cpu.not_idle_fraction 1 # Percentage of non-idle cycles
|
||||||
system.cpu.idle_fraction 0 # Percentage of idle cycles
|
system.cpu.idle_fraction 0 # Percentage of idle cycles
|
||||||
|
system.cpu.Branches 3363 # Number of branches fetched
|
||||||
system.cpu.icache.tags.replacements 0 # number of replacements
|
system.cpu.icache.tags.replacements 0 # number of replacements
|
||||||
system.cpu.icache.tags.tagsinuse 153.782734 # Cycle average of tags in use
|
system.cpu.icache.tags.tagsinuse 153.782734 # Cycle average of tags in use
|
||||||
system.cpu.icache.tags.total_refs 14928 # Total number of references to valid blocks.
|
system.cpu.icache.tags.total_refs 14928 # Total number of references to valid blocks.
|
||||||
|
|
|
@ -4,11 +4,11 @@ sim_seconds 0.000250 # Nu
|
||||||
sim_ticks 250015500 # Number of ticks simulated
|
sim_ticks 250015500 # Number of ticks simulated
|
||||||
final_tick 250015500 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
|
final_tick 250015500 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
|
||||||
sim_freq 1000000000000 # Frequency of simulated ticks
|
sim_freq 1000000000000 # Frequency of simulated ticks
|
||||||
host_inst_rate 1389197 # Simulator instruction rate (inst/s)
|
host_inst_rate 1916007 # Simulator instruction rate (inst/s)
|
||||||
host_op_rate 1389135 # Simulator op (including micro ops) rate (op/s)
|
host_op_rate 1915868 # Simulator op (including micro ops) rate (op/s)
|
||||||
host_tick_rate 694579134 # Simulator tick rate (ticks/s)
|
host_tick_rate 957925931 # Simulator tick rate (ticks/s)
|
||||||
host_mem_usage 219580 # Number of bytes of host memory used
|
host_mem_usage 266944 # Number of bytes of host memory used
|
||||||
host_seconds 0.36 # Real time elapsed on the host
|
host_seconds 0.26 # Real time elapsed on the host
|
||||||
sim_insts 500001 # Number of instructions simulated
|
sim_insts 500001 # Number of instructions simulated
|
||||||
sim_ops 500001 # Number of ops (including micro ops) simulated
|
sim_ops 500001 # Number of ops (including micro ops) simulated
|
||||||
system.voltage_domain.voltage 1 # Voltage in Volts
|
system.voltage_domain.voltage 1 # Voltage in Volts
|
||||||
|
@ -94,5 +94,6 @@ system.cpu.num_idle_cycles 0 # Nu
|
||||||
system.cpu.num_busy_cycles 500032 # Number of busy cycles
|
system.cpu.num_busy_cycles 500032 # Number of busy cycles
|
||||||
system.cpu.not_idle_fraction 1 # Percentage of non-idle cycles
|
system.cpu.not_idle_fraction 1 # Percentage of non-idle cycles
|
||||||
system.cpu.idle_fraction 0 # Percentage of idle cycles
|
system.cpu.idle_fraction 0 # Percentage of idle cycles
|
||||||
|
system.cpu.Branches 59023 # Number of branches fetched
|
||||||
|
|
||||||
---------- End Simulation Statistics ----------
|
---------- End Simulation Statistics ----------
|
||||||
|
|
|
@ -4,11 +4,11 @@ sim_seconds 0.000727 # Nu
|
||||||
sim_ticks 727072000 # Number of ticks simulated
|
sim_ticks 727072000 # Number of ticks simulated
|
||||||
final_tick 727072000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
|
final_tick 727072000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
|
||||||
sim_freq 1000000000000 # Frequency of simulated ticks
|
sim_freq 1000000000000 # Frequency of simulated ticks
|
||||||
host_inst_rate 600007 # Simulator instruction rate (inst/s)
|
host_inst_rate 1056088 # Simulator instruction rate (inst/s)
|
||||||
host_op_rate 599995 # Simulator op (including micro ops) rate (op/s)
|
host_op_rate 1056045 # Simulator op (including micro ops) rate (op/s)
|
||||||
host_tick_rate 872461045 # Simulator tick rate (ticks/s)
|
host_tick_rate 1535580911 # Simulator tick rate (ticks/s)
|
||||||
host_mem_usage 228312 # Number of bytes of host memory used
|
host_mem_usage 276676 # Number of bytes of host memory used
|
||||||
host_seconds 0.83 # Real time elapsed on the host
|
host_seconds 0.47 # Real time elapsed on the host
|
||||||
sim_insts 500001 # Number of instructions simulated
|
sim_insts 500001 # Number of instructions simulated
|
||||||
sim_ops 500001 # Number of ops (including micro ops) simulated
|
sim_ops 500001 # Number of ops (including micro ops) simulated
|
||||||
system.voltage_domain.voltage 1 # Voltage in Volts
|
system.voltage_domain.voltage 1 # Voltage in Volts
|
||||||
|
@ -100,6 +100,7 @@ system.cpu.num_idle_cycles 0 # Nu
|
||||||
system.cpu.num_busy_cycles 1454144 # Number of busy cycles
|
system.cpu.num_busy_cycles 1454144 # Number of busy cycles
|
||||||
system.cpu.not_idle_fraction 1 # Percentage of non-idle cycles
|
system.cpu.not_idle_fraction 1 # Percentage of non-idle cycles
|
||||||
system.cpu.idle_fraction 0 # Percentage of idle cycles
|
system.cpu.idle_fraction 0 # Percentage of idle cycles
|
||||||
|
system.cpu.Branches 59023 # Number of branches fetched
|
||||||
system.cpu.icache.tags.replacements 0 # number of replacements
|
system.cpu.icache.tags.replacements 0 # number of replacements
|
||||||
system.cpu.icache.tags.tagsinuse 265.013024 # Cycle average of tags in use
|
system.cpu.icache.tags.tagsinuse 265.013024 # Cycle average of tags in use
|
||||||
system.cpu.icache.tags.total_refs 499617 # Total number of references to valid blocks.
|
system.cpu.icache.tags.total_refs 499617 # Total number of references to valid blocks.
|
||||||
|
|
Some files were not shown because too many files have changed in this diff Show more
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Reference in a new issue