CPU: Remove references to memory copy operations
This commit is contained in:
parent
1114be4b78
commit
5962fecc1d
|
@ -252,12 +252,6 @@ class BaseDynInst : public FastAlloc, public RefCounted
|
||||||
/** The effective physical address. */
|
/** The effective physical address. */
|
||||||
Addr physEffAddr;
|
Addr physEffAddr;
|
||||||
|
|
||||||
/** Effective virtual address for a copy source. */
|
|
||||||
Addr copySrcEffAddr;
|
|
||||||
|
|
||||||
/** Effective physical address for a copy source. */
|
|
||||||
Addr copySrcPhysEffAddr;
|
|
||||||
|
|
||||||
/** The memory request flags (from translation). */
|
/** The memory request flags (from translation). */
|
||||||
unsigned memReqFlags;
|
unsigned memReqFlags;
|
||||||
|
|
||||||
|
@ -499,7 +493,6 @@ class BaseDynInst : public FastAlloc, public RefCounted
|
||||||
{ return staticInst->isStoreConditional(); }
|
{ return staticInst->isStoreConditional(); }
|
||||||
bool isInstPrefetch() const { return staticInst->isInstPrefetch(); }
|
bool isInstPrefetch() const { return staticInst->isInstPrefetch(); }
|
||||||
bool isDataPrefetch() const { return staticInst->isDataPrefetch(); }
|
bool isDataPrefetch() const { return staticInst->isDataPrefetch(); }
|
||||||
bool isCopy() const { return staticInst->isCopy(); }
|
|
||||||
bool isInteger() const { return staticInst->isInteger(); }
|
bool isInteger() const { return staticInst->isInteger(); }
|
||||||
bool isFloating() const { return staticInst->isFloating(); }
|
bool isFloating() const { return staticInst->isFloating(); }
|
||||||
bool isControl() const { return staticInst->isControl(); }
|
bool isControl() const { return staticInst->isControl(); }
|
||||||
|
|
|
@ -350,7 +350,6 @@ class InOrderDynInst : public FastAlloc, public RefCounted
|
||||||
{ return staticInst->isStoreConditional(); }
|
{ return staticInst->isStoreConditional(); }
|
||||||
bool isInstPrefetch() const { return staticInst->isInstPrefetch(); }
|
bool isInstPrefetch() const { return staticInst->isInstPrefetch(); }
|
||||||
bool isDataPrefetch() const { return staticInst->isDataPrefetch(); }
|
bool isDataPrefetch() const { return staticInst->isDataPrefetch(); }
|
||||||
bool isCopy() const { return staticInst->isCopy(); }
|
|
||||||
bool isInteger() const { return staticInst->isInteger(); }
|
bool isInteger() const { return staticInst->isInteger(); }
|
||||||
bool isFloating() const { return staticInst->isFloating(); }
|
bool isFloating() const { return staticInst->isFloating(); }
|
||||||
bool isControl() const { return staticInst->isControl(); }
|
bool isControl() const { return staticInst->isControl(); }
|
||||||
|
|
|
@ -1199,9 +1199,6 @@ DefaultCommit<Impl>::commitHead(DynInstPtr &head_inst, unsigned inst_num)
|
||||||
head_inst->renamedDestRegIdx(i));
|
head_inst->renamedDestRegIdx(i));
|
||||||
}
|
}
|
||||||
|
|
||||||
if (head_inst->isCopy())
|
|
||||||
panic("Should not commit any copy instructions!");
|
|
||||||
|
|
||||||
// Finally clear the head ROB entry.
|
// Finally clear the head ROB entry.
|
||||||
rob->retireHead(tid);
|
rob->retireHead(tid);
|
||||||
|
|
||||||
|
|
|
@ -1205,9 +1205,6 @@ LWBackEnd<Impl>::commitInst(int inst_num)
|
||||||
inst->traceData = NULL;
|
inst->traceData = NULL;
|
||||||
}
|
}
|
||||||
|
|
||||||
if (inst->isCopy())
|
|
||||||
panic("Should not commit any copy instructions!");
|
|
||||||
|
|
||||||
inst->clearDependents();
|
inst->clearDependents();
|
||||||
|
|
||||||
frontEnd->addFreeRegs(freed_regs);
|
frontEnd->addFreeRegs(freed_regs);
|
||||||
|
|
|
@ -117,7 +117,6 @@ class StaticInstBase : public RefCounted
|
||||||
IsIndexed, ///< Accesses memory with an indexed address computation
|
IsIndexed, ///< Accesses memory with an indexed address computation
|
||||||
IsInstPrefetch, ///< Instruction-cache prefetch.
|
IsInstPrefetch, ///< Instruction-cache prefetch.
|
||||||
IsDataPrefetch, ///< Data-cache prefetch.
|
IsDataPrefetch, ///< Data-cache prefetch.
|
||||||
IsCopy, ///< Fast Cache block copy
|
|
||||||
|
|
||||||
IsControl, ///< Control transfer instruction.
|
IsControl, ///< Control transfer instruction.
|
||||||
IsDirectControl, ///< PC relative control transfer.
|
IsDirectControl, ///< PC relative control transfer.
|
||||||
|
@ -228,7 +227,6 @@ class StaticInstBase : public RefCounted
|
||||||
bool isDataPrefetch() const { return flags[IsDataPrefetch]; }
|
bool isDataPrefetch() const { return flags[IsDataPrefetch]; }
|
||||||
bool isPrefetch() const { return isInstPrefetch() ||
|
bool isPrefetch() const { return isInstPrefetch() ||
|
||||||
isDataPrefetch(); }
|
isDataPrefetch(); }
|
||||||
bool isCopy() const { return flags[IsCopy];}
|
|
||||||
|
|
||||||
bool isInteger() const { return flags[IsInteger]; }
|
bool isInteger() const { return flags[IsInteger]; }
|
||||||
bool isFloating() const { return flags[IsFloating]; }
|
bool isFloating() const { return flags[IsFloating]; }
|
||||||
|
|
|
@ -200,18 +200,6 @@ struct ThreadState {
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
public:
|
public:
|
||||||
/**
|
|
||||||
* Temporary storage to pass the source address from copy_load to
|
|
||||||
* copy_store.
|
|
||||||
* @todo Remove this temporary when we have a better way to do it.
|
|
||||||
*/
|
|
||||||
Addr copySrcAddr;
|
|
||||||
/**
|
|
||||||
* Temp storage for the physical source address of a copy.
|
|
||||||
* @todo Remove this temporary when we have a better way to do it.
|
|
||||||
*/
|
|
||||||
Addr copySrcPhysAddr;
|
|
||||||
|
|
||||||
/*
|
/*
|
||||||
* number of executed instructions, for matching with syscall trace
|
* number of executed instructions, for matching with syscall trace
|
||||||
* points in EIO files.
|
* points in EIO files.
|
||||||
|
|
Loading…
Reference in a new issue