ARM: Ignore reads and writes to DCIMVAC.

This commit is contained in:
Gabe Black 2010-06-02 12:58:15 -05:00
parent fd37095fa6
commit 57c4d37c10

View file

@ -107,6 +107,9 @@ let {{
case MISCREG_DCCIMVAC:
return new WarnUnimplemented(
isRead ? "mrc dccimvac" : "mcr dccimvac", machInst);
case MISCREG_DCIMVAC:
return new WarnUnimplemented(
isRead ? "mrc dcimvac" : "mcr dcimvac", machInst);
case MISCREG_DCCMVAC:
return new WarnUnimplemented(
isRead ? "mrc dccmvac" : "mcr dccmvac", machInst);