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Use the renamed register index, rather than the flattened one.

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--HG--
extra : convert_revision : 599650c408667bb1b8db20a6847b9e697f7b49e4
This commit is contained in:
Gabe Black 2006-12-06 11:40:41 -05:00
parent f04fcf58f1
commit 50b8cce355
1 changed files with 8 additions and 8 deletions
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16
src/cpu/o3/sparc/dyn_inst.hh
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@ -139,23 +139,23 @@ class SparcDynInst : public BaseDynInst<Impl>
TheISA::FloatReg readFloatReg(const StaticInst *si, int idx, int width) TheISA::FloatReg readFloatReg(const StaticInst *si, int idx, int width)
{ {
return this->cpu->readFloatReg(this->_flatSrcRegIdx[idx], width); return this->cpu->readFloatReg(this->_srcRegIdx[idx], width);
} }
TheISA::FloatReg readFloatReg(const StaticInst *si, int idx) TheISA::FloatReg readFloatReg(const StaticInst *si, int idx)
{ {
return this->cpu->readFloatReg(this->_flatSrcRegIdx[idx]); return this->cpu->readFloatReg(this->_srcRegIdx[idx]);
} }
TheISA::FloatRegBits readFloatRegBits(const StaticInst *si, TheISA::FloatRegBits readFloatRegBits(const StaticInst *si,
int idx, int width) int idx, int width)
{ {
return this->cpu->readFloatRegBits(this->_flatSrcRegIdx[idx], width); return this->cpu->readFloatRegBits(this->_srcRegIdx[idx], width);
} }
TheISA::FloatRegBits readFloatRegBits(const StaticInst *si, int idx) TheISA::FloatRegBits readFloatRegBits(const StaticInst *si, int idx)
{ {
return this->cpu->readFloatRegBits(this->_flatSrcRegIdx[idx]); return this->cpu->readFloatRegBits(this->_srcRegIdx[idx]);
} }
/** @todo: Make results into arrays so they can handle multiple dest /** @todo: Make results into arrays so they can handle multiple dest
@ -171,27 +171,27 @@ class SparcDynInst : public BaseDynInst<Impl>
void setFloatReg(const StaticInst *si, int idx, void setFloatReg(const StaticInst *si, int idx,
TheISA::FloatReg val, int width) TheISA::FloatReg val, int width)
{ {
this->cpu->setFloatReg(this->_flatDestRegIdx[idx], val, width); this->cpu->setFloatReg(this->_destRegIdx[idx], val, width);
BaseDynInst<Impl>::setFloatReg(si, idx, val, width); BaseDynInst<Impl>::setFloatReg(si, idx, val, width);
} }
void setFloatReg(const StaticInst *si, int idx, TheISA::FloatReg val) void setFloatReg(const StaticInst *si, int idx, TheISA::FloatReg val)
{ {
this->cpu->setFloatReg(this->_flatDestRegIdx[idx], val); this->cpu->setFloatReg(this->_destRegIdx[idx], val);
BaseDynInst<Impl>::setFloatReg(si, idx, val); BaseDynInst<Impl>::setFloatReg(si, idx, val);
} }
void setFloatRegBits(const StaticInst *si, int idx, void setFloatRegBits(const StaticInst *si, int idx,
TheISA::FloatRegBits val, int width) TheISA::FloatRegBits val, int width)
{ {
this->cpu->setFloatRegBits(this->_flatDestRegIdx[idx], val, width); this->cpu->setFloatRegBits(this->_destRegIdx[idx], val, width);
BaseDynInst<Impl>::setFloatRegBits(si, idx, val); BaseDynInst<Impl>::setFloatRegBits(si, idx, val);
} }
void setFloatRegBits(const StaticInst *si, void setFloatRegBits(const StaticInst *si,
int idx, TheISA::FloatRegBits val) int idx, TheISA::FloatRegBits val)
{ {
this->cpu->setFloatRegBits(this->_flatDestRegIdx[idx], val); this->cpu->setFloatRegBits(this->_destRegIdx[idx], val);
BaseDynInst<Impl>::setFloatRegBits(si, idx, val); BaseDynInst<Impl>::setFloatRegBits(si, idx, val);
} }