inorder: fix address list bug
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66632539b6
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4ac245737d
3 changed files with 14 additions and 13 deletions
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@ -61,7 +61,7 @@ if 'InOrderCPU' in env['CPU_MODELS']:
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'InOrderMDU', 'InOrderAGEN', 'InOrderFetchSeq', 'InOrderTLB', 'InOrderBPred',
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'InOrderDecode', 'InOrderExecute', 'InOrderInstBuffer', 'InOrderUseDef',
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'InOrderGraduation', 'InOrderCachePort', 'RegDepMap', 'Resource',
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'ThreadModel'])
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'ThreadModel', 'AddrDep'])
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Source('pipeline_traits.cc')
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Source('inorder_dyn_inst.cc')
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@ -1335,7 +1335,7 @@ InOrderCPU::cleanUpRemovedReqs()
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while (!reqRemoveList.empty()) {
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ResourceRequest *res_req = reqRemoveList.front();
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DPRINTF(InOrderCPU, "[tid:%i] [sn:%lli]: Removing Request "
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DPRINTF(Resource, "[tid:%i] [sn:%lli]: Removing Request "
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"[stage_num:%i] [res:%s] [slot:%i] [completed:%i].\n",
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res_req->inst->threadNumber,
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res_req->inst->seqNum,
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@ -188,12 +188,18 @@ CacheUnit::setAddrDependency(DynInstPtr inst)
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addrList[tid].push_back(req_addr);
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addrMap[tid][req_addr] = inst->seqNum;
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DPRINTF(InOrderCachePort,
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"[tid:%i]: [sn:%i]: Address %08p added to dependency list\n",
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inst->readTid(), inst->seqNum, req_addr);
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DPRINTF(AddrDep,
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"[tid:%i]: [sn:%i]: Address %08p added to dependency list\n",
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inst->readTid(), inst->seqNum, req_addr);
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//@NOTE: 10 is an arbitrarily "high" number here, but to be exact
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// we would need to know the # of outstanding accesses
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// a priori. Information like fetch width, stage width,
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// and the branch resolution stage would be useful for the
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// icache_port (among other things). For the dcache, the #
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// of outstanding cache accesses might be sufficient.
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assert(addrList[tid].size() < 10);
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}
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void
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@ -203,6 +209,8 @@ CacheUnit::removeAddrDependency(DynInstPtr inst)
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Addr mem_addr = inst->getMemAddr();
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inst->unsetMemAddr();
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// Erase from Address List
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vector<Addr>::iterator vect_it = find(addrList[tid].begin(), addrList[tid].end(),
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mem_addr);
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@ -1106,8 +1114,6 @@ CacheUnit::processCacheCompletion(PacketPtr pkt)
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tid, cache_req->inst->readPC());
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cache_req->setMemAccCompleted();
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}
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inst->unsetMemAddr();
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}
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void
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@ -1225,10 +1231,6 @@ CacheUnit::squash(DynInstPtr inst, int stage_num,
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// Mark slot for removal from resource
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slot_remove_list.push_back(req_ptr->getSlot());
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DPRINTF(InOrderCachePort,
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"[tid:%i] Squashing request from [sn:%i]\n",
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req_ptr->getInst()->readTid(), req_ptr->getInst()->seqNum);
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} else {
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DPRINTF(InOrderCachePort,
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"[tid:%i] Request from [sn:%i] squashed, but still pending completion.\n",
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@ -1247,7 +1249,6 @@ CacheUnit::squash(DynInstPtr inst, int stage_num,
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removeAddrDependency(req_ptr->getInst());
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}
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}
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map_it++;
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