Ports: Only try to do EthPort stuff in full system.
--HG-- extra : convert_revision : 9ea093ea7c9ab22f8467c5cd5d55b66c71eb3427
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1 changed files with 16 additions and 8 deletions
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@ -34,13 +34,17 @@
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#include "base/inifile.hh"
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#include "base/output.hh"
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#include "dev/etherdevice.hh"
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#include "dev/etherobject.hh"
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#include "dev/etherint.hh"
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#include "config/full_system.hh"
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#include "mem/mem_object.hh"
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#include "mem/port.hh"
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#include "sim/sim_object.hh"
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#if FULL_SYSTEM
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#include "dev/etherdevice.hh"
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#include "dev/etherobject.hh"
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#include "dev/etherint.hh"
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#endif
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using namespace std;
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/**
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@ -61,6 +65,8 @@ lookupPort(SimObject *so, const std::string &name, int i)
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return p;
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}
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#if FULL_SYSTEM
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EtherInt *
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lookupEthPort(SimObject *so, const std::string &name, int i)
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{
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@ -78,6 +84,7 @@ lookupEthPort(SimObject *so, const std::string &name, int i)
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p = ed->getEthPort(name, i);
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return p;
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}
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#endif
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/**
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* Connect the described MemObject ports. Called from Python via SWIG.
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@ -87,17 +94,18 @@ int
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connectPorts(SimObject *o1, const std::string &name1, int i1,
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SimObject *o2, const std::string &name2, int i2)
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{
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MemObject *mo1, *mo2;
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mo1 = dynamic_cast<MemObject*>(o1);
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mo2 = dynamic_cast<MemObject*>(o2);
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#if FULL_SYSTEM
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EtherObject *eo1, *eo2;
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EtherDevice *ed1, *ed2;
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MemObject *mo1, *mo2;
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eo1 = dynamic_cast<EtherObject*>(o1);
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ed1 = dynamic_cast<EtherDevice*>(o1);
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mo1 = dynamic_cast<MemObject*>(o1);
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eo2 = dynamic_cast<EtherObject*>(o2);
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ed2 = dynamic_cast<EtherDevice*>(o2);
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mo2 = dynamic_cast<MemObject*>(o2);
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if ((eo1 || ed1) && (eo2 || ed2)) {
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EtherInt *p1 = lookupEthPort(o1, name1, i1);
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@ -111,7 +119,7 @@ connectPorts(SimObject *o1, const std::string &name1, int i1,
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return 1;
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}
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}
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#endif
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Port *p1 = lookupPort(o1, name1, i1);
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Port *p2 = lookupPort(o2, name2, i2);
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