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Merge zizzer:/z/m5/Bitkeeper/m5

Browse source 
into zizzer.eecs.umich.edu:/.automount/zazzer/z/rdreslin/m5bk/timing_L1

--HG--
extra : convert_revision : 0b0583e9404ed922141049f1043e7a149984e567
This commit is contained in:
Ron Dreslinski 2005-02-21 18:07:30 -05:00
parent 9dd1ab1dba 884a8de509
commit 3e18c75f00
3 changed files with 51 additions and 56 deletions
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35
dev/tsunami.hh
View file

@ -32,8 +32,8 @@
* retains pointers to all its children so the children can communicate. * retains pointers to all its children so the children can communicate.
*/ */
#ifndef __TSUNAMI_HH__ #ifndef __DEV_TSUNAMI_HH__
#define __TSUNAMI_HH__ #define __DEV_TSUNAMI_HH__
#include "dev/platform.hh" #include "dev/platform.hh"
@ -56,7 +56,6 @@ class System;
class Tsunami : public Platform class Tsunami : public Platform
{ {
public: public:
/** Max number of CPUs in a Tsunami */ /** Max number of CPUs in a Tsunami */
static const int Max_CPUs = 64; static const int Max_CPUs = 64;
@ -67,15 +66,15 @@ class Tsunami : public Platform
TsunamiIO *io; TsunamiIO *io;
/** Pointer to the Tsunami CChip. /** Pointer to the Tsunami CChip.
* The chip contains some configuration information and * The chip contains some configuration information and
* all the interrupt mask and status registers * all the interrupt mask and status registers
*/ */
TsunamiCChip *cchip; TsunamiCChip *cchip;
/** Pointer to the Tsunami PChip. /** Pointer to the Tsunami PChip.
* The pchip is the interface to the PCI bus, in our case * The pchip is the interface to the PCI bus, in our case
* it does not have to do much. * it does not have to do much.
*/ */
TsunamiPChip *pchip; TsunamiPChip *pchip;
int intr_sum_type[Tsunami::Max_CPUs]; int intr_sum_type[Tsunami::Max_CPUs];
@ -83,12 +82,12 @@ class Tsunami : public Platform
public: public:
/** /**
* Constructor for the Tsunami Class. * Constructor for the Tsunami Class.
* @param name name of the object * @param name name of the object
* @param con pointer to the console * @param con pointer to the console
* @param intrcontrol pointer to the interrupt controller * @param intrcontrol pointer to the interrupt controller
* @param intrFreq frequency that interrupts happen * @param intrFreq frequency that interrupts happen
*/ */
Tsunami(const std::string &name, System *s, IntrControl *intctrl, Tsunami(const std::string &name, System *s, IntrControl *intctrl,
PciConfigAll *pci, int intrFreq); PciConfigAll *pci, int intrFreq);
@ -96,7 +95,7 @@ class Tsunami : public Platform
* Return the interrupting frequency to AlphaAccess * Return the interrupting frequency to AlphaAccess
* @return frequency of RTC interrupts * @return frequency of RTC interrupts
*/ */
virtual Tick intrFrequency(); virtual Tick intrFrequency();
/** /**
* Cause the cpu to post a serial interrupt to the CPU. * Cause the cpu to post a serial interrupt to the CPU.
@ -120,7 +119,7 @@ class Tsunami : public Platform
virtual Addr pciToDma(Addr pciAddr) const; virtual Addr pciToDma(Addr pciAddr) const;
/** /**
* Serialize this object to the given output stream. * Serialize this object to the given output stream.
* @param os The stream to serialize to. * @param os The stream to serialize to.
*/ */
@ -134,4 +133,4 @@ class Tsunami : public Platform
virtual void unserialize(Checkpoint *cp, const std::string &section); virtual void unserialize(Checkpoint *cp, const std::string &section);
}; };
#endif // __TSUNAMI_HH__ #endif // __DEV_TSUNAMI_HH__

1
dev/tsunami_io.cc
View file

@ -67,7 +67,6 @@ TsunamiIO::RTCEvent::process()
schedule(curTick + ticksPerSecond/RTC_RATE); schedule(curTick + ticksPerSecond/RTC_RATE);
//Actually interrupt the processor here //Actually interrupt the processor here
tsunami->cchip->postRTC(); tsunami->cchip->postRTC();
} }
const char * const char *

71
dev/tsunami_io.hh
View file

@ -30,8 +30,8 @@
* Tsunami Fake I/O Space mapping including RTC/timer interrupts * Tsunami Fake I/O Space mapping including RTC/timer interrupts
*/ */
#ifndef __TSUNAMI_DMA_HH__ #ifndef __DEV_TSUNAMI_IO_HH__
#define __TSUNAMI_DMA_HH__ #define __DEV_TSUNAMI_IO_HH__
#include "dev/io_device.hh" #include "dev/io_device.hh"
#include "base/range.hh" #include "base/range.hh"
@ -56,9 +56,11 @@ class TsunamiIO : public PioDevice
struct tm tm; struct tm tm;
/** In Tsunami RTC only has two i/o ports one for data and one for address, /**
* so you write the address and then read/write the data. This store the * In Tsunami RTC only has two i/o ports one for data and one for
* address you are going to be reading from on a read. * address, so you write the address and then read/write the
* data. This store the address you are going to be reading from
* on a read.
*/ */
uint8_t RTCAddress; uint8_t RTCAddress;
@ -132,38 +134,37 @@ class TsunamiIO : public PioDevice
class RTCEvent : public Event class RTCEvent : public Event
{ {
protected: protected:
/** A pointer back to tsunami to create interrupt the processor. */ /** A pointer back to tsunami to create interrupt the processor. */
Tsunami* tsunami; Tsunami* tsunami;
public: public:
/** RTC Event initializes the RTC event by scheduling an event /** RTC Event initializes the RTC event by scheduling an event
* RTC_RATE times pre second. */ * RTC_RATE times pre second. */
RTCEvent(Tsunami* t); RTCEvent(Tsunami* t);
/** /**
* Interrupth the processor and reschedule the event. * Interrupth the processor and reschedule the event.
* */ */
virtual void process(); virtual void process();
/** /**
* Return a description of this event. * Return a description of this event.
* @return a description * @return a description
*/ */
virtual const char *description(); virtual const char *description();
/** /**
* Serialize this object to the given output stream. * Serialize this object to the given output stream.
* @param os The stream to serialize to. * @param os The stream to serialize to.
*/ */
virtual void serialize(std::ostream &os); virtual void serialize(std::ostream &os);
/**
/** * Reconstruct the state of this object from a checkpoint.
* Reconstruct the state of this object from a checkpoint. * @param cp The checkpoint use.
* @param cp The checkpoint use. * @param section The section name of this object
* @param section The section name of this object */
*/ virtual void unserialize(Checkpoint *cp, const std::string &section);
virtual void unserialize(Checkpoint *cp, const std::string &section); };
};
/** uip UpdateInProgess says that the rtc is updating, but we just fake it /** uip UpdateInProgess says that the rtc is updating, but we just fake it
* by alternating it on every read of the bit since we are going to * by alternating it on every read of the bit since we are going to
@ -219,7 +220,6 @@ class TsunamiIO : public PioDevice
*/ */
uint32_t timerData; uint32_t timerData;
public: public:
/** /**
* Return the freqency of the RTC * Return the freqency of the RTC
@ -227,7 +227,6 @@ class TsunamiIO : public PioDevice
*/ */
Tick frequency() const { return RTC_RATE; } Tick frequency() const { return RTC_RATE; }
/** /**
* Initialize all the data for devices supported by Tsunami I/O. * Initialize all the data for devices supported by Tsunami I/O.
* @param name name of this device. * @param name name of this device.
@ -279,7 +278,6 @@ class TsunamiIO : public PioDevice
*/ */
virtual void serialize(std::ostream &os); virtual void serialize(std::ostream &os);
/** /**
* Reconstruct the state of this object from a checkpoint. * Reconstruct the state of this object from a checkpoint.
* @param cp The checkpoint use. * @param cp The checkpoint use.
@ -287,8 +285,7 @@ class TsunamiIO : public PioDevice
*/ */
virtual void unserialize(Checkpoint *cp, const std::string &section); virtual void unserialize(Checkpoint *cp, const std::string &section);
Tick cacheAccess(MemReqPtr &req); Tick cacheAccess(MemReqPtr &req);
}; };
#endif // __TSUNAMI_IO_HH__ #endif // __DEV_TSUNAMI_IO_HH__