python: Move native wrappers to the _m5 namespace
Swig wrappers for native objects currently share the _m5.internal name space with Python code. This is undesirable if we ever want to switch from Swig to some other framework for native binding (e.g., PyBind11 or Boost::Python). This changeset moves all of such wrappers to the _m5 namespace, which is now reserved for native code. Change-Id: I2d2bc12dbc05b57b7c5a75f072e08124413d77f3 Signed-off-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-by: Curtis Dunham <curtis.dunham@arm.com> Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
This commit is contained in:
parent
e387521527
commit
2974dc7a37
27 changed files with 129 additions and 102 deletions
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@ -483,7 +483,7 @@ class DictImporter(object):
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if fullname == 'm5.objects':
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return self
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if fullname.startswith('m5.internal'):
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if fullname.startswith('_m5'):
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return None
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source = self.modules.get(fullname, None)
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@ -588,14 +588,14 @@ def makeDefinesPyFile(target, source, env):
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code = code_formatter()
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code("""
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import m5.internal
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import _m5.core
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import m5.util
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buildEnv = m5.util.SmartDict($build_env)
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compileDate = m5.internal.core.compileDate
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compileDate = _m5.core.compileDate
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_globals = globals()
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for key,val in m5.internal.core.__dict__.iteritems():
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for key,val in _m5.core.__dict__.iteritems():
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if key.startswith('flag_'):
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flag = key[5:]
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_globals[flag] = val
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@ -773,13 +773,13 @@ if GetOption('with_cxx_config'):
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# Generate any needed param SWIG wrapper files
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params_i_files = []
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for name,param in sorted(params_to_swig.iteritems()):
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i_file = File('python/m5/internal/%s.i' % (param.swig_module_name()))
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i_file = File('python/_m5/%s.i' % (param.swig_module_name()))
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params_i_files.append(i_file)
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env.Command(i_file, Value(name),
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MakeAction(createParamSwigWrapper, Transform("SW PARAM")))
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env.Depends(i_file, depends)
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env.Depends(SWIG, i_file)
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SwigSource('m5.internal', i_file)
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SwigSource('_m5', i_file)
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# Generate all enum header files
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for name,enum in sorted(all_enums.iteritems()):
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@ -799,22 +799,22 @@ for name,enum in sorted(all_enums.iteritems()):
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env.Depends(hh_file, depends + extra_deps)
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env.Depends(SWIG, hh_file)
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i_file = File('python/m5/internal/enum_%s.i' % name)
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i_file = File('python/_m5/enum_%s.i' % name)
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env.Command(i_file, Value(name),
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MakeAction(createEnumSwigWrapper, Transform("ENUMSWIG")))
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env.Depends(i_file, depends + extra_deps)
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env.Depends(SWIG, i_file)
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SwigSource('m5.internal', i_file)
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SwigSource('_m5', i_file)
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# Generate SimObject SWIG wrapper files
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for name,simobj in sorted(sim_objects.iteritems()):
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py_source = PySource.modules[simobj.__module__]
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extra_deps = [ py_source.tnode ]
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i_file = File('python/m5/internal/param_%s.i' % name)
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i_file = File('python/_m5/param_%s.i' % name)
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env.Command(i_file, Value(name),
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MakeAction(createSimObjectSwigWrapper, Transform("SO SWIG")))
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env.Depends(i_file, depends + extra_deps)
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SwigSource('m5.internal', i_file)
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SwigSource('_m5', i_file)
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# Generate the main swig init file
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def makeEmbeddedSwigInit(package):
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@ -63,14 +63,15 @@ PySource('m5.util', 'm5/util/smartdict.py')
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PySource('m5.util', 'm5/util/sorteddict.py')
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PySource('m5.util', 'm5/util/terminal.py')
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SwigSource('m5.internal', 'swig/core.i')
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SwigSource('m5.internal', 'swig/debug.i')
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SwigSource('m5.internal', 'swig/drain.i')
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SwigSource('m5.internal', 'swig/event.i')
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SwigSource('m5.internal', 'swig/pyobject.i')
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SwigSource('m5.internal', 'swig/range.i')
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SwigSource('m5.internal', 'swig/serialize.i')
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SwigSource('m5.internal', 'swig/stats.i')
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SwigSource('m5.internal', 'swig/trace.i')
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PySource('_m5', '_m5/__init__.py')
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SwigSource('_m5', 'swig/core.i')
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SwigSource('_m5', 'swig/debug.i')
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SwigSource('_m5', 'swig/drain.i')
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SwigSource('_m5', 'swig/event.i')
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SwigSource('_m5', 'swig/pyobject.i')
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SwigSource('_m5', 'swig/range.i')
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SwigSource('_m5', 'swig/serialize.i')
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SwigSource('_m5', 'swig/stats.i')
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SwigSource('_m5', 'swig/trace.i')
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PySource('m5.internal', 'm5/internal/__init__.py')
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PySource('m5.internal', 'm5/internal/params.py')
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39
src/python/_m5/__init__.py
Normal file
39
src/python/_m5/__init__.py
Normal file
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@ -0,0 +1,39 @@
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# Copyright (c) 2016 ARM Limited
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# All rights reserved.
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#
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# The license below extends only to copyright in the software and shall
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# not be construed as granting a license to any other intellectual
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# property including but not limited to intellectual property relating
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# to a hardware implementation of the functionality of the software
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# licensed hereunder. You may use the software subject to the license
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# terms below provided that you ensure that this notice is replicated
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# unmodified and in its entirety in all distributions of the software,
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# modified or unmodified, in source code or in binary form.
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#
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# Redistribution and use in source and binary forms, with or without
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# modification, are permitted provided that the following conditions are
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# met: redistributions of source code must retain the above copyright
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# notice, this list of conditions and the following disclaimer;
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# redistributions in binary form must reproduce the above copyright
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# notice, this list of conditions and the following disclaimer in the
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# documentation and/or other materials provided with the distribution;
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# neither the name of the copyright holders nor the names of its
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# contributors may be used to endorse or promote products derived from
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# this software without specific prior written permission.
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#
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# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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#
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# Authors: Andreas Sandberg
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# This is a place holder to create a package for generated code. Don't
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# add any Python code in this name space.
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@ -656,7 +656,7 @@ class MetaSimObject(type):
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# See ParamValue.swig_predecls for description.
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def swig_predecls(cls, code):
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code('%import "python/m5/internal/param_$cls.i"')
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code('%import "python/_m5/param_$cls.i"')
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# Hook for exporting additional C++ methods to Python via SWIG.
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# Default is none, override using @classmethod in class definition.
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@ -686,7 +686,7 @@ class MetaSimObject(type):
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params = map(lambda (k, v): v, sorted(cls._params.local.items()))
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ports = cls._ports.local
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code('%module(package="m5.internal") param_$cls')
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code('%module(package="_m5") param_$cls')
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code()
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code('%{')
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code('#include "sim/sim_object.hh"')
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@ -716,7 +716,7 @@ using std::ptrdiff_t;
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code()
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if cls._base:
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code('%import "python/m5/internal/param_${{cls._base}}.i"')
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code('%import "python/_m5/param_${{cls._base}}.i"')
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code()
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for ns in namespaces:
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@ -32,15 +32,16 @@
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try:
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# Try to import something that's generated by swig
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import internal.core
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import _m5.core
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# Try to grab something from it in case demandimport is being used
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internal.core.curTick
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_m5.core.curTick
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in_gem5 = True
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except ImportError:
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# The import failed
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internal = None
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# The import failed, we're being called from the build system
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in_gem5 = False
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if internal:
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if in_gem5:
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import SimObject
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import core
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import objects
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@ -26,7 +26,4 @@
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#
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# Authors: Nathan Binkert
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import internal
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def setOutputDir(dir):
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internal.core.setOutputDir(dir)
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from _m5.core import setOutputDir
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@ -28,10 +28,9 @@
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from UserDict import DictMixin
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import internal
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from internal.debug import SimpleFlag, CompoundFlag
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from internal.debug import schedBreak, setRemoteGDBPort
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import _m5.debug
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from _m5.debug import SimpleFlag, CompoundFlag
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from _m5.debug import schedBreak, setRemoteGDBPort
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from m5.util import printList
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def help():
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@ -61,12 +60,12 @@ class AllFlags(DictMixin):
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self._dict = {}
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def _update(self):
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current_version = internal.debug.getAllFlagsVersion()
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current_version = _m5.debug.getAllFlagsVersion()
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if self._version == current_version:
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return
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self._dict.clear()
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for flag in internal.debug.getAllFlags():
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for flag in _m5.debug.getAllFlags():
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self._dict[flag.name()] = flag
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self._version = current_version
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@ -29,9 +29,9 @@
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# Authors: Nathan Binkert
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import m5
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import internal.event
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import _m5.event
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from internal.event import PythonEvent, GlobalSimLoopExitEvent as SimExit
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from _m5.event import PythonEvent, GlobalSimLoopExitEvent as SimExit
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mainq = None
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@ -61,9 +61,9 @@ class ProgressEvent(Event):
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self.eventq.schedule(self, m5.curTick() + self.period)
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def getEventQueue(index):
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return internal.event.getEventQueue(index)
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return _m5.event.getEventQueue(index)
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def setEventQueue(eventq):
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internal.event.curEventQueue(eventq)
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_m5.event.curEventQueue(eventq)
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__all__ = [ 'create', 'Event', 'ProgressEvent', 'SimExit', 'mainq' ]
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@ -32,6 +32,6 @@ except NameError:
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modules = { }
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for module in modules.iterkeys():
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if module.startswith('m5.internal.param_') or \
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module.startswith('m5.internal.enum_'):
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if module.startswith('_m5.param_') or \
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module.startswith('_m5.enum_'):
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exec "from %s import *" % module
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@ -386,7 +386,7 @@ class VectorParamDesc(ParamDesc):
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code('%import "${{self.swig_module_name()}}.i"')
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def swig_decl(self, code):
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code('%module(package="m5.internal") ${{self.swig_module_name()}}')
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code('%module(package="_m5") ${{self.swig_module_name()}}')
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code('%{')
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self.ptype.cxx_predecls(code)
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code('%}')
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@ -619,7 +619,7 @@ class Cycles(CheckedInt):
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unsigned = True
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def getValue(self):
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from m5.internal.core import Cycles
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from _m5.core import Cycles
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return Cycles(self.value)
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@classmethod
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@ -828,7 +828,7 @@ class AddrRange(ParamValue):
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def getValue(self):
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# Go from the Python class to the wrapped C++ class generated
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# by swig
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from m5.internal.range import AddrRange
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from _m5.range import AddrRange
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return AddrRange(long(self.start), long(self.end),
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int(self.intlvHighBit), int(self.xorHighBit),
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@ -1378,7 +1378,7 @@ $wrapper $wrapper_name {
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def swig_decl(cls, code):
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name = cls.__name__
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code('''\
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%module(package="m5.internal") enum_$name
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%module(package="_m5") enum_$name
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%{
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#include "enums/$name.hh"
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@ -1419,7 +1419,7 @@ class Enum(ParamValue):
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@classmethod
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def swig_predecls(cls, code):
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code('%import "python/m5/internal/enum_$0.i"', cls.__name__)
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code('%import "python/_m5/enum_$0.i"', cls.__name__)
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@classmethod
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def cxx_ini_parse(cls, code, src, dest, ret):
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@ -1909,7 +1909,7 @@ class PortRef(object):
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# Call C++ to create corresponding port connection between C++ objects
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def ccConnect(self):
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from m5.internal.pyobject import connectPorts
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from _m5.pyobject import connectPorts
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if self.role == 'SLAVE':
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# do nothing and let the master take care of it
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@ -45,14 +45,15 @@ import os
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import sys
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# import the SWIG-wrapped main C++ functions
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import internal
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import core
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import _m5.drain
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import _m5.core
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from _m5.stats import updateEvents as updateStatEvents
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import stats
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import SimObject
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import ticks
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import objects
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from m5.util.dot_writer import do_dot, do_dvfs_dot
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from m5.internal.stats import updateEvents as updateStatEvents
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from util import fatal
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from util import attrdict
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@ -66,7 +67,7 @@ _memory_modes = {
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"atomic_noncaching" : objects.params.atomic_noncaching,
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}
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_drain_manager = internal.drain.DrainManager.instance()
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_drain_manager = _m5.drain.DrainManager.instance()
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# The final hook to generate .ini files. Called from the user script
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# once the config is built.
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@ -138,8 +139,8 @@ def instantiate(ckpt_dir=None):
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# Restore checkpoint (if any)
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if ckpt_dir:
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_drain_manager.preCheckpointRestore()
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ckpt = internal.core.getCheckpoint(ckpt_dir)
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internal.core.unserializeGlobals(ckpt);
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ckpt = _m5.core.getCheckpoint(ckpt_dir)
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_m5.core.unserializeGlobals(ckpt);
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for obj in root.descendants(): obj.loadState(ckpt)
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else:
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for obj in root.descendants(): obj.initState()
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@ -162,7 +163,7 @@ def simulate(*args, **kwargs):
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atexit.register(stats.dump)
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# register our C++ exit callback function with Python
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atexit.register(internal.core.doExitCleanup)
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atexit.register(_m5.core.doExitCleanup)
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# Reset to put the stats in a consistent state.
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stats.reset()
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@ -170,11 +171,7 @@ def simulate(*args, **kwargs):
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if _drain_manager.isDrained():
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_drain_manager.resume()
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return internal.event.simulate(*args, **kwargs)
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# Export curTick to user script.
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def curTick():
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return internal.core.curTick()
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return _m5.event.simulate(*args, **kwargs)
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def drain():
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"""Drain the simulator in preparation of a checkpoint or memory mode
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@ -198,7 +195,7 @@ def drain():
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# WARNING: if a valid exit event occurs while draining, it
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# will not get returned to the user script
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exit_event = internal.event.simulate()
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exit_event = _m5.event.simulate()
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while exit_event.getCause() != 'Finished drain':
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exit_event = simulate()
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@ -227,7 +224,7 @@ def checkpoint(dir):
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drain()
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memWriteback(root)
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print "Writing checkpoint"
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internal.core.serializeAll(dir)
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_m5.core.serializeAll(dir)
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def _changeMemoryMode(system, mode):
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if not isinstance(system, (objects.Root, objects.System)):
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@ -343,7 +340,7 @@ def fork(simout="%(parent)s.f%(fork_seq)i"):
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from m5 import options
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global fork_count
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if not internal.core.listenersDisabled():
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if not _m5.core.listenersDisabled():
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raise RuntimeError, "Can not fork a simulator with listeners enabled"
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drain()
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@ -364,11 +361,11 @@ def fork(simout="%(parent)s.f%(fork_seq)i"):
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"fork_seq" : fork_count,
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"pid" : os.getpid(),
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}
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core.setOutputDir(options.outdir)
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_m5.core.setOutputDir(options.outdir)
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else:
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fork_count += 1
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return pid
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from internal.core import disableAllListeners
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from internal.core import listenersDisabled
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from _m5.core import disableAllListeners, listenersDisabled
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from _m5.core import curTick
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@ -29,22 +29,22 @@
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import m5
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from m5 import internal
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import _m5.stats
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from m5.objects import Root
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from m5.util import attrdict, fatal
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# Stat exports
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from m5.internal.stats import schedStatEvent as schedEvent
|
||||
from m5.internal.stats import periodicStatDump
|
||||
from _m5.stats import schedStatEvent as schedEvent
|
||||
from _m5.stats import periodicStatDump
|
||||
|
||||
outputList = []
|
||||
def initText(filename, desc=True):
|
||||
output = internal.stats.initText(filename, desc)
|
||||
output = _m5.stats.initText(filename, desc)
|
||||
outputList.append(output)
|
||||
|
||||
def initSimStats():
|
||||
internal.stats.initSimStats()
|
||||
internal.stats.registerPythonStatsHandlers()
|
||||
_m5.stats.initSimStats()
|
||||
_m5.stats.registerPythonStatsHandlers()
|
||||
|
||||
names = []
|
||||
stats_dict = {}
|
||||
|
@ -55,7 +55,7 @@ def enable():
|
|||
the package is enabled, no more statistics can be created.'''
|
||||
|
||||
global stats_list
|
||||
stats_list = list(internal.stats.statsList())
|
||||
stats_list = list(_m5.stats.statsList())
|
||||
|
||||
for stat in stats_list:
|
||||
if not stat.check() or not stat.baseCheck():
|
||||
|
@ -75,7 +75,7 @@ def enable():
|
|||
stats_dict[stat.name] = stat
|
||||
stat.enable()
|
||||
|
||||
internal.stats.enable();
|
||||
_m5.stats.enable();
|
||||
|
||||
def prepare():
|
||||
'''Prepare all stats for data access. This must be done before
|
||||
|
@ -96,7 +96,7 @@ def dump():
|
|||
return
|
||||
lastDump = curTick
|
||||
|
||||
internal.stats.processDumpQueue()
|
||||
_m5.stats.processDumpQueue()
|
||||
|
||||
prepare()
|
||||
|
||||
|
@ -119,7 +119,7 @@ def reset():
|
|||
for stat in stats_list:
|
||||
stat.reset()
|
||||
|
||||
internal.stats.processResetQueue()
|
||||
_m5.stats.processResetQueue()
|
||||
|
||||
flags = attrdict({
|
||||
'none' : 0x0000,
|
||||
|
|
|
@ -34,11 +34,11 @@ tps_fixed = False # once set to true, can't be changed
|
|||
|
||||
# fix the global frequency and tell C++ about it
|
||||
def fixGlobalFrequency():
|
||||
import internal
|
||||
import _m5.core
|
||||
global tps, tps_fixed
|
||||
if not tps_fixed:
|
||||
tps_fixed = True
|
||||
internal.core.setClockFrequency(int(tps))
|
||||
_m5.core.setClockFrequency(int(tps))
|
||||
print "Global frequency set at %d ticks per second" % int(tps)
|
||||
|
||||
def setGlobalFrequency(ticksPerSecond):
|
||||
|
|
|
@ -26,13 +26,5 @@
|
|||
#
|
||||
# Authors: Nathan Binkert
|
||||
|
||||
import internal
|
||||
import util
|
||||
|
||||
from internal.trace import output, ignore
|
||||
|
||||
def disable():
|
||||
internal.trace.disable()
|
||||
|
||||
def enable():
|
||||
internal.trace.enable()
|
||||
# Export native methods to Python
|
||||
from _m5.trace import output, ignore, disable, enable
|
||||
|
|
|
@ -29,7 +29,7 @@
|
|||
* Steve Reinhardt
|
||||
*/
|
||||
|
||||
%module(package="m5.internal") core
|
||||
%module(package="_m5") core
|
||||
|
||||
%{
|
||||
#include "base/misc.hh"
|
||||
|
|
|
@ -29,7 +29,7 @@
|
|||
* Authors: Nathan Binkert
|
||||
*/
|
||||
|
||||
%module(package="m5.internal") debug
|
||||
%module(package="_m5") debug
|
||||
|
||||
%{
|
||||
#include <cassert>
|
||||
|
|
|
@ -37,7 +37,7 @@
|
|||
* Authors: Andreas Sandberg
|
||||
*/
|
||||
|
||||
%module(package="m5.internal") drain
|
||||
%module(package="_m5") drain
|
||||
|
||||
%{
|
||||
#include "sim/drain.hh"
|
||||
|
|
|
@ -30,7 +30,7 @@
|
|||
* Authors: Nathan Binkert
|
||||
*/
|
||||
|
||||
%module(package="m5.internal") event
|
||||
%module(package="_m5") event
|
||||
|
||||
%{
|
||||
#include "base/types.hh"
|
||||
|
|
|
@ -28,7 +28,7 @@
|
|||
* Authors: Nathan Binkert
|
||||
*/
|
||||
|
||||
%module(package="m5.internal") pyobject
|
||||
%module(package="_m5") pyobject
|
||||
|
||||
%{
|
||||
#include "python/swig/pyobject.hh"
|
||||
|
|
|
@ -28,7 +28,7 @@
|
|||
* Authors: Nathan Binkert
|
||||
*/
|
||||
|
||||
%module(package="m5.internal") range
|
||||
%module(package="_m5") range
|
||||
|
||||
%{
|
||||
#include "base/types.hh"
|
||||
|
|
|
@ -37,7 +37,7 @@
|
|||
* Authors: Andreas Sandberg
|
||||
*/
|
||||
|
||||
%module(package="m5.internal") serialize
|
||||
%module(package="_m5") serialize
|
||||
|
||||
%{
|
||||
#include "sim/serialize.hh"
|
||||
|
|
|
@ -28,7 +28,7 @@
|
|||
* Authors: Nathan Binkert
|
||||
*/
|
||||
|
||||
%module(package="m5.internal") stats
|
||||
%module(package="_m5") stats
|
||||
|
||||
%include <std_list.i>
|
||||
%include <std_string.i>
|
||||
|
|
|
@ -28,7 +28,7 @@
|
|||
* Authors: Nathan Binkert
|
||||
*/
|
||||
|
||||
%module(package="m5.internal") trace
|
||||
%module(package="_m5") trace
|
||||
|
||||
%{
|
||||
#include "base/trace.hh"
|
||||
|
|
|
@ -46,7 +46,7 @@ UnitTest('strnumtest', 'strnumtest.cc')
|
|||
UnitTest('trietest', 'trietest.cc')
|
||||
|
||||
stattest_py = PySource('m5', 'stattestmain.py', skip_lib=True)
|
||||
stattest_swig = SwigSource('m5.internal', 'stattest.i', skip_lib=True)
|
||||
stattest_swig = SwigSource('_m5', 'stattest.i', skip_lib=True)
|
||||
UnitTest('stattest', 'stattest.cc', stattest_py, stattest_swig, main=True)
|
||||
|
||||
UnitTest('symtest', 'symtest.cc')
|
||||
|
|
|
@ -28,7 +28,7 @@
|
|||
* Authors: Nathan Binkert
|
||||
*/
|
||||
|
||||
%module(package="m5.internal") stattest
|
||||
%module(package="_m5") stattest
|
||||
|
||||
%inline %{
|
||||
extern void stattest_init();
|
||||
|
|
|
@ -1,5 +1,5 @@
|
|||
def main():
|
||||
from m5.internal.stattest import stattest_init, stattest_run
|
||||
from _m5.stattest import stattest_init, stattest_run
|
||||
import m5.stats
|
||||
|
||||
stattest_init()
|
||||
|
|
|
@ -36,6 +36,7 @@
|
|||
# Authors: Andreas Sandberg
|
||||
|
||||
import m5
|
||||
import _m5
|
||||
from m5.objects import *
|
||||
m5.util.addToPath('../configs/')
|
||||
from common.Caches import *
|
||||
|
@ -104,7 +105,7 @@ def run_test(root, switcher=None, freq=1000, verbose=False):
|
|||
# Suppress "Entering event queue" messages since we get tons of them.
|
||||
# Worse yet, they include the timestamp, which makes them highly
|
||||
# variable and unsuitable for comparing as test outputs.
|
||||
m5.internal.core.cvar.want_info = verbose
|
||||
_m5.core.cvar.want_info = verbose
|
||||
|
||||
# instantiate configuration
|
||||
m5.instantiate()
|
||||
|
|
Loading…
Reference in a new issue