ARM: Get rid of the val2 variable.
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@ -97,7 +97,8 @@ format DataOp {
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}}, {{ 1 }}, {{ 1 }});
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0x5: WarnUnimpl::smlal();
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0x6: smull({{
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resTemp = ((int64_t)Rm.sw)*((int64_t)Rs.sw);
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resTemp = ((int64_t)(int32_t)Rm)*
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((int64_t)(int32_t)Rs);
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Rd = (int32_t)(resTemp & 0xffffffff);
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Rn = (int32_t)(resTemp >> 32);
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}}, {{ 1 }}, {{ 1 }});
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@ -232,46 +233,37 @@ format DataOp {
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0x1: eor({{ Rd = resTemp = Rn ^ op2; }},
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{{ shift_carry_imm(Rm, shift_size, shift, Cpsr<29:>) }},
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{{ Cpsr<28:> }});
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0x2: sub({{ uint32_t val2 = op2;
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Rd = resTemp = Rn - val2; }},
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{{ arm_sub_carry(resTemp, Rn, val2) }},
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{{ arm_sub_overflow(resTemp, Rn, val2) }});
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0x3: rsb({{ uint32_t val2 = op2;
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Rd = resTemp = val2 - Rn; }},
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{{ arm_sub_carry(resTemp, val2, Rn) }},
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{{ arm_sub_overflow(resTemp, val2, Rn) }});
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0x4: add({{ uint32_t val2 = op2;
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Rd = resTemp = Rn + val2; }},
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{{ arm_add_carry(resTemp, Rn, val2) }},
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{{ arm_add_overflow(resTemp, Rn, val2) }});
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0x5: adc({{ uint32_t val2 = op2;
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Rd = resTemp = Rn + val2 + Cpsr<29:>; }},
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{{ arm_add_carry(resTemp, Rn, val2) }},
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{{ arm_add_overflow(resTemp, Rn, val2) }});
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0x6: sbc({{ uint32_t val2 = op2;
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Rd = resTemp = Rn - val2 - !Cpsr<29:>; }},
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{{ arm_sub_carry(resTemp, Rn, val2) }},
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{{ arm_sub_overflow(resTemp, Rn, val2) }});
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0x7: rsc({{ uint32_t val2 = op2;
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Rd = resTemp = val2 - Rn - !Cpsr<29:>; }},
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{{ arm_sub_carry(resTemp, val2, Rn) }},
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{{ arm_sub_overflow(resTemp, val2, Rn) }});
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0x2: sub({{ Rd = resTemp = Rn - op2; }},
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{{ arm_sub_carry(resTemp, Rn, op2) }},
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{{ arm_sub_overflow(resTemp, Rn, op2) }});
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0x3: rsb({{ Rd = resTemp = op2 - Rn; }},
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{{ arm_sub_carry(resTemp, op2, Rn) }},
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{{ arm_sub_overflow(resTemp, op2, Rn) }});
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0x4: add({{ Rd = resTemp = Rn + op2; }},
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{{ arm_add_carry(resTemp, Rn, op2) }},
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{{ arm_add_overflow(resTemp, Rn, op2) }});
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0x5: adc({{ Rd = resTemp = Rn + op2 + Cpsr<29:>; }},
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{{ arm_add_carry(resTemp, Rn, op2) }},
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{{ arm_add_overflow(resTemp, Rn, op2) }});
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0x6: sbc({{ Rd = resTemp = Rn - op2 - !Cpsr<29:>; }},
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{{ arm_sub_carry(resTemp, Rn, op2) }},
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{{ arm_sub_overflow(resTemp, Rn, op2) }});
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0x7: rsc({{ Rd = resTemp = op2 - Rn - !Cpsr<29:>; }},
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{{ arm_sub_carry(resTemp, op2, Rn) }},
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{{ arm_sub_overflow(resTemp, op2, Rn) }});
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0x8: tst({{ resTemp = Rn & op2; }},
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{{ shift_carry_imm(Rm, shift_size, shift, Cpsr<29:>) }},
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{{ Cpsr<28:> }});
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0x9: teq({{ resTemp = Rn ^ op2; }},
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{{ shift_carry_imm(Rm, shift_size, shift, Cpsr<29:>) }},
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{{ Cpsr<28:> }});
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0xa: cmp({{ uint32_t val2 = op2;
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resTemp = Rn - val2; }},
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{{ arm_sub_carry(resTemp, Rn, val2) }},
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{{ arm_sub_overflow(resTemp, Rn, val2) }});
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0xb: cmn({{ uint32_t val2 = op2;
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resTemp = Rn + val2; }},
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{{ arm_add_carry(resTemp, Rn, val2) }},
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{{ arm_add_overflow(resTemp, Rn, val2) }});
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0xc: orr({{ uint32_t val2 = op2;
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Rd = resTemp = Rn | val2; }},
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0xa: cmp({{ resTemp = Rn - op2; }},
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{{ arm_sub_carry(resTemp, Rn, op2) }},
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{{ arm_sub_overflow(resTemp, Rn, op2) }});
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0xb: cmn({{ resTemp = Rn + op2; }},
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{{ arm_add_carry(resTemp, Rn, op2) }},
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{{ arm_add_overflow(resTemp, Rn, op2) }});
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0xc: orr({{ Rd = resTemp = Rn | op2; }},
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{{ shift_carry_imm(Rm, shift_size, shift, Cpsr<29:>) }},
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{{ Cpsr<28:> }});
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0xd: mov({{ Rd = resTemp = op2; }},
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@ -102,10 +102,12 @@ let {{
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}};
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def format DataOp(code, icValue, ivValue) {{
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regCode = re.sub(r'op2', 'shift_rm_rs(Rm, Rs, \
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shift, Cpsr<29:0>)', code)
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immCode = re.sub(r'op2', 'shift_rm_imm(Rm, shift_size, \
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shift, Cpsr<29:0>)', code)
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regCode = '''uint32_t op2 = shift_rm_rs(Rm, Rs,
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shift, Cpsr<29:0>);
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op2 = op2;''' + code
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immCode = '''uint32_t op2 = shift_rm_imm(Rm, shift_size,
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shift, Cpsr<29:0>);
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op2 = op2;''' + code
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regIop = InstObjParams(name, Name, 'PredIntOp',
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{"code": regCode,
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"predicate_test": predicateTest})
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