2007-06-20 21:04:39 +02:00
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/*
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* Copyright (c) 2007 The Hewlett-Packard Development Company
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* All rights reserved.
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*
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2010-05-24 07:44:15 +02:00
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* The license below extends only to copyright in the software and shall
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* not be construed as granting a license to any other intellectual
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* property including but not limited to intellectual property relating
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* to a hardware implementation of the functionality of the software
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* licensed hereunder. You may use the software subject to the license
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* terms below provided that you ensure that this notice is replicated
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* unmodified and in its entirety in all distributions of the software,
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* modified or unmodified, in source code or in binary form.
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2007-06-20 21:04:39 +02:00
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*
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2010-05-24 07:44:15 +02:00
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are
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* met: redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer;
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* redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution;
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* neither the name of the copyright holders nor the names of its
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2007-06-20 21:04:39 +02:00
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* contributors may be used to endorse or promote products derived from
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2010-05-24 07:44:15 +02:00
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* this software without specific prior written permission.
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2007-06-20 21:04:39 +02:00
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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* Authors: Gabe Black
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*/
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2008-10-10 19:15:00 +02:00
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#include <cassert>
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2007-06-20 21:04:39 +02:00
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#include "arch/x86/emulenv.hh"
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#include "base/misc.hh"
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using namespace X86ISA;
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void EmulEnv::doModRM(const ExtMachInst & machInst)
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{
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assert(machInst.modRM.mod != 3);
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//Use the SIB byte for addressing if the modrm byte calls for it.
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if (machInst.modRM.rm == 4 && machInst.addrSize != 2) {
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scale = 1 << machInst.sib.scale;
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2007-07-20 00:15:47 +02:00
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index = machInst.sib.index | (machInst.rex.x << 3);
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base = machInst.sib.base | (machInst.rex.b << 3);
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2007-06-20 21:04:39 +02:00
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//In this special case, we don't use a base. The displacement also
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//changes, but that's managed by the predecoder.
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if (machInst.sib.base == INTREG_RBP && machInst.modRM.mod == 0)
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base = NUM_INTREGS;
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//In -this- special case, we don't use an index.
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2007-08-03 00:09:12 +02:00
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if (index == INTREG_RSP)
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2007-06-20 21:04:39 +02:00
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index = NUM_INTREGS;
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} else {
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if (machInst.addrSize == 2) {
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2009-04-19 13:14:31 +02:00
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unsigned rm = machInst.modRM.rm;
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if (rm <= 3) {
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scale = 1;
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if (rm < 2) {
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base = INTREG_RBX;
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} else {
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base = INTREG_RBP;
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}
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index = (rm % 2) ? INTREG_RDI : INTREG_RSI;
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} else {
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scale = 0;
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switch (rm) {
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case 4:
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base = INTREG_RSI;
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break;
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case 5:
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base = INTREG_RDI;
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break;
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case 6:
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base = INTREG_RBP;
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break;
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case 7:
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base = INTREG_RBX;
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break;
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}
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}
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2007-06-20 21:04:39 +02:00
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} else {
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scale = 0;
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2007-07-20 00:15:47 +02:00
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base = machInst.modRM.rm | (machInst.rex.b << 3);
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2007-06-20 21:04:39 +02:00
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if (machInst.modRM.mod == 0 && machInst.modRM.rm == 5) {
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2007-07-20 00:15:47 +02:00
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//Since we need to use a different encoding of this
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//instruction anyway, just ignore the base in those cases
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2007-08-03 00:09:12 +02:00
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base = NUM_INTREGS;
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2007-06-20 21:04:39 +02:00
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}
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}
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}
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2007-08-05 05:12:54 +02:00
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//Figure out what segment to use. This won't be entirely accurate since
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//the presence of a displacement is supposed to make the instruction
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//default to the data segment.
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2009-08-03 20:01:40 +02:00
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if ((base != INTREG_RBP && base != INTREG_RSP) || machInst.dispSize) {
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2007-08-05 05:12:54 +02:00
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seg = SEGMENT_REG_DS;
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//Handle any segment override that might have been in the instruction
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int segFromInst = machInst.legacy.seg;
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if (segFromInst)
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seg = (SegmentRegIndex)(segFromInst - 1);
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} else {
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seg = SEGMENT_REG_SS;
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}
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2007-06-20 21:04:39 +02:00
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}
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2009-02-27 18:23:58 +01:00
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void EmulEnv::setSeg(const ExtMachInst & machInst)
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{
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seg = SEGMENT_REG_DS;
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//Handle any segment override that might have been in the instruction
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int segFromInst = machInst.legacy.seg;
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if (segFromInst)
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seg = (SegmentRegIndex)(segFromInst - 1);
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}
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