power: Add basic DVFS support for gem5
Adds DVFS capabilities to gem5, by allowing users to specify lists for
frequencies and voltages in SrcClockDomains and VoltageDomains respectively.
A separate component, DVFSHandler, provides a small interface to change
operating points of the associated domains.
Clock domains will be linked to voltage domains and thus allow separate clock,
but shared voltage lines.
Currently all the valid performance-level updates are performed with a fixed
transition latency as specified for the domain.
Config file example:
...
vd = VoltageDomain(voltage = ['1V','0.95V','0.90V','0.85V'])
tsys.cluster1.clk_domain.clock = ['1GHz','700MHz','400MHz','230MHz']
tsys.cluster2.clk_domain.clock = ['1GHz','700MHz','400MHz','230MHz']
tsys.cluster1.clk_domain.domain_id = 0
tsys.cluster2.clk_domain.domain_id = 1
tsys.cluster1.clk_domain.voltage_domain = vd
tsys.cluster2.clk_domain.voltage_domain = vd
tsys.dvfs_handler.domains = [tsys.cluster1.clk_domain,
tsys.cluster2.clk_domain]
tsys.dvfs_handler.enable = True
2014-06-30 19:56:06 +02:00
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/*
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* Copyright (c) 2013-2014 ARM Limited
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* All rights reserved
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*
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* The license below extends only to copyright in the software and shall
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* not be construed as granting a license to any other intellectual
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* property including but not limited to intellectual property relating
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* to a hardware implementation of the functionality of the software
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* licensed hereunder. You may use the software subject to the license
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* terms below provided that you ensure that this notice is replicated
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* unmodified and in its entirety in all distributions of the software,
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* modified or unmodified, in source code or in binary form.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are
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* met: redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer;
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* redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution;
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* neither the name of the copyright holders nor the names of its
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* contributors may be used to endorse or promote products derived from
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* this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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* Authors: Vasileios Spiliopoulos
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* Akash Bagdia
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* Stephan Diestelhorst
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*/
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/**
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* @file
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* DVFSHandler and DomainConfig class declaration used for managing voltage
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* and frequency scaling of the various DVFS domains in the system (with each
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* domain having their independent domain configuration information)
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*/
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#ifndef __SIM_DVFS_HANDLER_HH__
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#define __SIM_DVFS_HANDLER_HH__
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#include <vector>
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2014-06-16 15:59:44 +02:00
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#include "debug/DVFS.hh"
|
power: Add basic DVFS support for gem5
Adds DVFS capabilities to gem5, by allowing users to specify lists for
frequencies and voltages in SrcClockDomains and VoltageDomains respectively.
A separate component, DVFSHandler, provides a small interface to change
operating points of the associated domains.
Clock domains will be linked to voltage domains and thus allow separate clock,
but shared voltage lines.
Currently all the valid performance-level updates are performed with a fixed
transition latency as specified for the domain.
Config file example:
...
vd = VoltageDomain(voltage = ['1V','0.95V','0.90V','0.85V'])
tsys.cluster1.clk_domain.clock = ['1GHz','700MHz','400MHz','230MHz']
tsys.cluster2.clk_domain.clock = ['1GHz','700MHz','400MHz','230MHz']
tsys.cluster1.clk_domain.domain_id = 0
tsys.cluster2.clk_domain.domain_id = 1
tsys.cluster1.clk_domain.voltage_domain = vd
tsys.cluster2.clk_domain.voltage_domain = vd
tsys.dvfs_handler.domains = [tsys.cluster1.clk_domain,
tsys.cluster2.clk_domain]
tsys.dvfs_handler.enable = True
2014-06-30 19:56:06 +02:00
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#include "params/ClockDomain.hh"
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#include "params/DVFSHandler.hh"
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#include "params/VoltageDomain.hh"
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#include "sim/clock_domain.hh"
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#include "sim/eventq.hh"
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#include "sim/sim_object.hh"
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2014-06-16 15:59:44 +02:00
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#include "sim/voltage_domain.hh"
|
power: Add basic DVFS support for gem5
Adds DVFS capabilities to gem5, by allowing users to specify lists for
frequencies and voltages in SrcClockDomains and VoltageDomains respectively.
A separate component, DVFSHandler, provides a small interface to change
operating points of the associated domains.
Clock domains will be linked to voltage domains and thus allow separate clock,
but shared voltage lines.
Currently all the valid performance-level updates are performed with a fixed
transition latency as specified for the domain.
Config file example:
...
vd = VoltageDomain(voltage = ['1V','0.95V','0.90V','0.85V'])
tsys.cluster1.clk_domain.clock = ['1GHz','700MHz','400MHz','230MHz']
tsys.cluster2.clk_domain.clock = ['1GHz','700MHz','400MHz','230MHz']
tsys.cluster1.clk_domain.domain_id = 0
tsys.cluster2.clk_domain.domain_id = 1
tsys.cluster1.clk_domain.voltage_domain = vd
tsys.cluster2.clk_domain.voltage_domain = vd
tsys.dvfs_handler.domains = [tsys.cluster1.clk_domain,
tsys.cluster2.clk_domain]
tsys.dvfs_handler.enable = True
2014-06-30 19:56:06 +02:00
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/**
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* DVFS Handler class, maintains a list of all the domains it can handle.
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* Each entry of that list is an object of the DomainConfig class, and the
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* handler uses the methods provided by that class to get access to the
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* configuration of each domain. The handler is responsible for setting/getting
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* clock periods and voltages from clock/voltage domains.
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* The handler acts the bridge between software configurable information
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* for each domain as provided to the controller and the hardware
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* implementation details for those domains.
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*/
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class DVFSHandler : public SimObject
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{
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public:
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typedef DVFSHandlerParams Params;
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DVFSHandler(const Params *p);
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typedef SrcClockDomain::DomainID DomainID;
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typedef SrcClockDomain::PerfLevel PerfLevel;
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2014-06-16 15:59:44 +02:00
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/**
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* Get the number of domains assigned to this DVFS handler.
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* @return Number of domains
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*/
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uint32_t numDomains() const { return domainIDList.size(); }
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/**
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* Get the n-th domain ID, from the domains managed by this handler.
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* @return Domain ID
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*/
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DomainID domainID(uint32_t index) const;
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power: Add basic DVFS support for gem5
Adds DVFS capabilities to gem5, by allowing users to specify lists for
frequencies and voltages in SrcClockDomains and VoltageDomains respectively.
A separate component, DVFSHandler, provides a small interface to change
operating points of the associated domains.
Clock domains will be linked to voltage domains and thus allow separate clock,
but shared voltage lines.
Currently all the valid performance-level updates are performed with a fixed
transition latency as specified for the domain.
Config file example:
...
vd = VoltageDomain(voltage = ['1V','0.95V','0.90V','0.85V'])
tsys.cluster1.clk_domain.clock = ['1GHz','700MHz','400MHz','230MHz']
tsys.cluster2.clk_domain.clock = ['1GHz','700MHz','400MHz','230MHz']
tsys.cluster1.clk_domain.domain_id = 0
tsys.cluster2.clk_domain.domain_id = 1
tsys.cluster1.clk_domain.voltage_domain = vd
tsys.cluster2.clk_domain.voltage_domain = vd
tsys.dvfs_handler.domains = [tsys.cluster1.clk_domain,
tsys.cluster2.clk_domain]
tsys.dvfs_handler.enable = True
2014-06-30 19:56:06 +02:00
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/**
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* Check whether a domain ID is known to the handler or not.
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* @param domain_id Domain ID to check
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* @return Domain ID known to handler?
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*/
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bool validDomainID(DomainID domain_id) const;
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/**
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* Get transition latency to switch between performance levels.
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* @return Transition latency
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*/
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Tick transLatency() const { return _transLatency; }
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/**
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* Set a new performance level for the specified domain. The actual update
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* will be delayed by transLatency().
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*
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* @param domain_id Software visible ID of the domain to be configured
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* @param perf_level Requested performance level (0 - fast, >0 slower)
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* @return status whether the setting was successful
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*/
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bool perfLevel(DomainID domain_id, PerfLevel perf_level);
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/**
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* Get the current performance level of a domain. While a change request is
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* in-flight, will return the current (i.e. old, unmodified) value.
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*
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* @param domain_id Domain ID to query
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* @return Current performance level of the specified domain
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*/
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PerfLevel perfLevel(DomainID domain_id) const {
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assert(isEnabled());
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return findDomain(domain_id)->perfLevel();
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}
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/**
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* Read the clock period of the specified domain at the specified
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* performance level.
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* @param domain_id Domain ID to query
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* @param perf_level Performance level of interest
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* @return Clock period in ticks for the requested performance level of
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* the respective domain
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*/
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Tick clkPeriodAtPerfLevel(DomainID domain_id, PerfLevel perf_level) const
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{
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2014-08-12 20:00:44 +02:00
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SrcClockDomain *d = findDomain(domain_id);
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assert(d);
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PerfLevel n = d->numPerfLevels();
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if (perf_level < n)
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return d->clkPeriodAtPerfLevel(perf_level);
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warn("DVFSHandler %s reads illegal frequency level %u from "\
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"SrcClockDomain %s. Returning 0\n", name(), perf_level, d->name());
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return Tick(0);
|
power: Add basic DVFS support for gem5
Adds DVFS capabilities to gem5, by allowing users to specify lists for
frequencies and voltages in SrcClockDomains and VoltageDomains respectively.
A separate component, DVFSHandler, provides a small interface to change
operating points of the associated domains.
Clock domains will be linked to voltage domains and thus allow separate clock,
but shared voltage lines.
Currently all the valid performance-level updates are performed with a fixed
transition latency as specified for the domain.
Config file example:
...
vd = VoltageDomain(voltage = ['1V','0.95V','0.90V','0.85V'])
tsys.cluster1.clk_domain.clock = ['1GHz','700MHz','400MHz','230MHz']
tsys.cluster2.clk_domain.clock = ['1GHz','700MHz','400MHz','230MHz']
tsys.cluster1.clk_domain.domain_id = 0
tsys.cluster2.clk_domain.domain_id = 1
tsys.cluster1.clk_domain.voltage_domain = vd
tsys.cluster2.clk_domain.voltage_domain = vd
tsys.dvfs_handler.domains = [tsys.cluster1.clk_domain,
tsys.cluster2.clk_domain]
tsys.dvfs_handler.enable = True
2014-06-30 19:56:06 +02:00
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}
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2014-06-16 15:59:44 +02:00
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/**
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* Read the voltage of the specified domain at the specified
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* performance level.
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* @param domain_id Domain ID to query
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* @param perf_level Performance level of interest
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* @return Voltage for the requested performance level of the respective
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* domain
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*/
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double voltageAtPerfLevel(DomainID domain_id, PerfLevel perf_level) const
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{
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2014-08-12 20:00:44 +02:00
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VoltageDomain *d = findDomain(domain_id)->voltageDomain();
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assert(d);
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PerfLevel n = d->numVoltages();
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if (perf_level < n)
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return d->voltage(perf_level);
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// Request outside of the range of the voltage domain
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if (n == 1) {
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DPRINTF(DVFS, "DVFS: Request for perf-level %i for single-point "\
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"voltage domain %s. Returning voltage at level 0: %.2f "\
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"V\n", perf_level, d->name(), d->voltage(0));
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// Special case for single point voltage domain -> same voltage for
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// all points
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return d->voltage(0);
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}
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warn("DVFSHandler %s reads illegal voltage level %u from "\
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"VoltageDomain %s. Returning 0 V\n", name(), perf_level, d->name());
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return 0.;
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2014-06-16 15:59:44 +02:00
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}
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|
power: Add basic DVFS support for gem5
Adds DVFS capabilities to gem5, by allowing users to specify lists for
frequencies and voltages in SrcClockDomains and VoltageDomains respectively.
A separate component, DVFSHandler, provides a small interface to change
operating points of the associated domains.
Clock domains will be linked to voltage domains and thus allow separate clock,
but shared voltage lines.
Currently all the valid performance-level updates are performed with a fixed
transition latency as specified for the domain.
Config file example:
...
vd = VoltageDomain(voltage = ['1V','0.95V','0.90V','0.85V'])
tsys.cluster1.clk_domain.clock = ['1GHz','700MHz','400MHz','230MHz']
tsys.cluster2.clk_domain.clock = ['1GHz','700MHz','400MHz','230MHz']
tsys.cluster1.clk_domain.domain_id = 0
tsys.cluster2.clk_domain.domain_id = 1
tsys.cluster1.clk_domain.voltage_domain = vd
tsys.cluster2.clk_domain.voltage_domain = vd
tsys.dvfs_handler.domains = [tsys.cluster1.clk_domain,
tsys.cluster2.clk_domain]
tsys.dvfs_handler.enable = True
2014-06-30 19:56:06 +02:00
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/**
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* Get the total number of available performance levels.
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*
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* @param domain_id Domain ID to query
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* @return Number of performance levels that where configured for the
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* respective domain
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*/
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PerfLevel numPerfLevels(PerfLevel domain_id) const
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{
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return findDomain(domain_id)->numPerfLevels();
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}
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/**
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* Check enable status of the DVFS handler, when the handler is disabled, no
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* request should be sent to the handler.
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* @return True, if the handler is enabled
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*/
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bool isEnabled() const { return enableHandler; }
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void serialize(std::ostream &os);
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void unserialize(Checkpoint *cp, const std::string §ion);
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private:
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typedef std::map<DomainID, SrcClockDomain*> Domains;
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Domains domains;
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2014-06-16 15:59:44 +02:00
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/**
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* List of IDs avaiable in the domain list
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*/
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std::vector<DomainID> domainIDList;
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|
|
power: Add basic DVFS support for gem5
Adds DVFS capabilities to gem5, by allowing users to specify lists for
frequencies and voltages in SrcClockDomains and VoltageDomains respectively.
A separate component, DVFSHandler, provides a small interface to change
operating points of the associated domains.
Clock domains will be linked to voltage domains and thus allow separate clock,
but shared voltage lines.
Currently all the valid performance-level updates are performed with a fixed
transition latency as specified for the domain.
Config file example:
...
vd = VoltageDomain(voltage = ['1V','0.95V','0.90V','0.85V'])
tsys.cluster1.clk_domain.clock = ['1GHz','700MHz','400MHz','230MHz']
tsys.cluster2.clk_domain.clock = ['1GHz','700MHz','400MHz','230MHz']
tsys.cluster1.clk_domain.domain_id = 0
tsys.cluster2.clk_domain.domain_id = 1
tsys.cluster1.clk_domain.voltage_domain = vd
tsys.cluster2.clk_domain.voltage_domain = vd
tsys.dvfs_handler.domains = [tsys.cluster1.clk_domain,
tsys.cluster2.clk_domain]
tsys.dvfs_handler.enable = True
2014-06-30 19:56:06 +02:00
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/**
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* Clock domain of the system the handler is instantiated.
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*/
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SrcClockDomain* sysClkDomain;
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/**
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* Search for a domain based on the domain ID.
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*
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* @param domain_id Domain ID to search for
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* @return Pointer to the source clock domain with matching ID.
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*/
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SrcClockDomain *findDomain(DomainID domain_id) const {
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auto it = domains.find(domain_id);
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panic_if(it == domains.end(),
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|
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"DVFS: Could not find a domain for ID %d.\n",domain_id );
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return domains.find(domain_id)->second;
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}
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/**
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* Disabling the DVFS handler ensures that all the DVFS migration requests
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* are ignored. Domains remain at their default frequency and voltage.
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*/
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bool enableHandler;
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/**
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|
* This corresponds to the maximum transition latency associated with the
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* hardware transitioning from a particular performance level to the other
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*/
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const Tick _transLatency;
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/**
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* Update performance level event, encapsulates all the required information
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* for a future call to change a domain's performance level.
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*/
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|
|
struct UpdateEvent : public Event {
|
2014-09-09 10:36:31 +02:00
|
|
|
UpdateEvent() : Event(DVFS_Update_Pri), domainIDToSet(0),
|
|
|
|
perfLevelToSet(0) {}
|
power: Add basic DVFS support for gem5
Adds DVFS capabilities to gem5, by allowing users to specify lists for
frequencies and voltages in SrcClockDomains and VoltageDomains respectively.
A separate component, DVFSHandler, provides a small interface to change
operating points of the associated domains.
Clock domains will be linked to voltage domains and thus allow separate clock,
but shared voltage lines.
Currently all the valid performance-level updates are performed with a fixed
transition latency as specified for the domain.
Config file example:
...
vd = VoltageDomain(voltage = ['1V','0.95V','0.90V','0.85V'])
tsys.cluster1.clk_domain.clock = ['1GHz','700MHz','400MHz','230MHz']
tsys.cluster2.clk_domain.clock = ['1GHz','700MHz','400MHz','230MHz']
tsys.cluster1.clk_domain.domain_id = 0
tsys.cluster2.clk_domain.domain_id = 1
tsys.cluster1.clk_domain.voltage_domain = vd
tsys.cluster2.clk_domain.voltage_domain = vd
tsys.dvfs_handler.domains = [tsys.cluster1.clk_domain,
tsys.cluster2.clk_domain]
tsys.dvfs_handler.enable = True
2014-06-30 19:56:06 +02:00
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/**
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* Static pointer to the single DVFS hander for all the update events
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*/
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static DVFSHandler *dvfsHandler;
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/**
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* ID of the domain that will be changed by the in-flight event
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*/
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DomainID domainIDToSet;
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/**
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* Target performance level of the in-flight event
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*/
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PerfLevel perfLevelToSet;
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/**
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* Updates the performance level by modifying the clock and the voltage
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* of the associated clocked objects. Gets information from
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* domainIDToSet and perfLevelToSet for easier calling through an
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* event.
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*/
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void updatePerfLevel();
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void process() { updatePerfLevel(); }
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};
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typedef std::map<DomainID, UpdateEvent> UpdatePerfLevelEvents;
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/**
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* Map from domain IDs -> perf level update events, records in-flight change
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* requests per domain ID.
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*/
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UpdatePerfLevelEvents updatePerfLevelEvents;
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};
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#endif // __SIM_DVFS_HANDLER_HH__
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