2012-03-22 11:36:27 +01:00
|
|
|
/*
|
2015-03-02 10:00:35 +01:00
|
|
|
* Copyright (c) 2012,2015 ARM Limited
|
2012-03-22 11:36:27 +01:00
|
|
|
* All rights reserved.
|
|
|
|
*
|
|
|
|
* The license below extends only to copyright in the software and shall
|
|
|
|
* not be construed as granting a license to any other intellectual
|
|
|
|
* property including but not limited to intellectual property relating
|
|
|
|
* to a hardware implementation of the functionality of the software
|
|
|
|
* licensed hereunder. You may use the software subject to the license
|
|
|
|
* terms below provided that you ensure that this notice is replicated
|
|
|
|
* unmodified and in its entirety in all distributions of the software,
|
|
|
|
* modified or unmodified, in source code or in binary form.
|
|
|
|
*
|
|
|
|
* Copyright (c) 2006 The Regents of The University of Michigan
|
|
|
|
* All rights reserved.
|
|
|
|
*
|
|
|
|
* Redistribution and use in source and binary forms, with or without
|
|
|
|
* modification, are permitted provided that the following conditions are
|
|
|
|
* met: redistributions of source code must retain the above copyright
|
|
|
|
* notice, this list of conditions and the following disclaimer;
|
|
|
|
* redistributions in binary form must reproduce the above copyright
|
|
|
|
* notice, this list of conditions and the following disclaimer in the
|
|
|
|
* documentation and/or other materials provided with the distribution;
|
|
|
|
* neither the name of the copyright holders nor the names of its
|
|
|
|
* contributors may be used to endorse or promote products derived from
|
|
|
|
* this software without specific prior written permission.
|
|
|
|
*
|
|
|
|
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
|
|
|
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
|
|
|
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
|
|
|
|
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
|
|
|
|
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
|
|
|
|
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
|
|
|
|
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
|
|
|
|
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
|
|
|
|
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
|
|
|
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
|
|
|
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
|
|
|
*
|
|
|
|
* Authors: Ali Saidi
|
|
|
|
* Andreas Hansson
|
|
|
|
*/
|
|
|
|
|
2016-11-09 21:27:37 +01:00
|
|
|
#include "mem/packet_queue.hh"
|
|
|
|
|
2012-11-16 17:27:47 +01:00
|
|
|
#include "base/trace.hh"
|
2012-08-15 16:38:08 +02:00
|
|
|
#include "debug/Drain.hh"
|
2012-03-22 11:36:27 +01:00
|
|
|
#include "debug/PacketQueue.hh"
|
|
|
|
|
|
|
|
using namespace std;
|
|
|
|
|
2015-07-20 16:15:18 +02:00
|
|
|
PacketQueue::PacketQueue(EventManager& _em, const std::string& _label,
|
|
|
|
bool disable_sanity_check)
|
|
|
|
: em(_em), sendEvent(this), _disableSanityCheck(disable_sanity_check),
|
|
|
|
label(_label), waitingOnRetry(false)
|
2012-03-22 11:36:27 +01:00
|
|
|
{
|
|
|
|
}
|
|
|
|
|
|
|
|
PacketQueue::~PacketQueue()
|
|
|
|
{
|
|
|
|
}
|
|
|
|
|
|
|
|
void
|
|
|
|
PacketQueue::retry()
|
|
|
|
{
|
|
|
|
DPRINTF(PacketQueue, "Queue %s received retry\n", name());
|
|
|
|
assert(waitingOnRetry);
|
2015-03-02 10:00:35 +01:00
|
|
|
waitingOnRetry = false;
|
2012-03-22 11:36:27 +01:00
|
|
|
sendDeferredPacket();
|
|
|
|
}
|
|
|
|
|
2015-03-02 10:00:35 +01:00
|
|
|
bool
|
|
|
|
PacketQueue::hasAddr(Addr addr) const
|
|
|
|
{
|
|
|
|
// caller is responsible for ensuring that all packets have the
|
|
|
|
// same alignment
|
|
|
|
for (const auto& p : transmitList) {
|
|
|
|
if (p.pkt->getAddr() == addr)
|
|
|
|
return true;
|
|
|
|
}
|
|
|
|
return false;
|
|
|
|
}
|
|
|
|
|
2012-03-22 11:36:27 +01:00
|
|
|
bool
|
|
|
|
PacketQueue::checkFunctional(PacketPtr pkt)
|
|
|
|
{
|
|
|
|
pkt->pushLabel(label);
|
|
|
|
|
2014-09-03 13:42:28 +02:00
|
|
|
auto i = transmitList.begin();
|
2012-03-22 11:36:27 +01:00
|
|
|
bool found = false;
|
|
|
|
|
2014-09-03 13:42:28 +02:00
|
|
|
while (!found && i != transmitList.end()) {
|
2012-03-22 11:36:27 +01:00
|
|
|
// If the buffered packet contains data, and it overlaps the
|
|
|
|
// current packet, then update data
|
|
|
|
found = pkt->checkFunctional(i->pkt);
|
|
|
|
++i;
|
|
|
|
}
|
|
|
|
|
|
|
|
pkt->popLabel();
|
|
|
|
|
|
|
|
return found;
|
|
|
|
}
|
|
|
|
|
|
|
|
void
|
mem: Add option to force in-order insertion in PacketQueue
By default, the packet queue is ordered by the ticks of the to-be-sent
packages. With the recent modifications of packages sinking their header time
when their resposne leaves the caches, there could be cases of MSHR targets
being allocated and ordered A, B, but their responses being sent out in the
order B,A. This led to inconsistencies in bus traffic, in particular the snoop
filter observing first a ReadExResp and later a ReadRespWithInv. Logically,
these were ordered the other way around behind the MSHR, but due to the timing
adjustments when inserting into the PacketQueue, they were sent out in the
wrong order on the bus, confusing the snoop filter.
This patch adds a flag (off by default) such that these special cases can
request in-order insertion into the packet queue, which might offset timing
slighty. This is expected to occur rarely and not affect timing results.
2015-03-02 10:00:49 +01:00
|
|
|
PacketQueue::schedSendTiming(PacketPtr pkt, Tick when, bool force_order)
|
2012-03-22 11:36:27 +01:00
|
|
|
{
|
mem: Add option to force in-order insertion in PacketQueue
By default, the packet queue is ordered by the ticks of the to-be-sent
packages. With the recent modifications of packages sinking their header time
when their resposne leaves the caches, there could be cases of MSHR targets
being allocated and ordered A, B, but their responses being sent out in the
order B,A. This led to inconsistencies in bus traffic, in particular the snoop
filter observing first a ReadExResp and later a ReadRespWithInv. Logically,
these were ordered the other way around behind the MSHR, but due to the timing
adjustments when inserting into the PacketQueue, they were sent out in the
wrong order on the bus, confusing the snoop filter.
This patch adds a flag (off by default) such that these special cases can
request in-order insertion into the packet queue, which might offset timing
slighty. This is expected to occur rarely and not affect timing results.
2015-03-02 10:00:49 +01:00
|
|
|
DPRINTF(PacketQueue, "%s for %s address %x size %d when %lu ord: %i\n",
|
|
|
|
__func__, pkt->cmdString(), pkt->getAddr(), pkt->getSize(), when,
|
|
|
|
force_order);
|
2015-03-02 10:00:35 +01:00
|
|
|
|
2012-08-21 11:49:24 +02:00
|
|
|
// we can still send a packet before the end of this tick
|
|
|
|
assert(when >= curTick());
|
2012-03-22 11:36:27 +01:00
|
|
|
|
2012-08-22 17:39:56 +02:00
|
|
|
// express snoops should never be queued
|
|
|
|
assert(!pkt->isExpressSnoop());
|
|
|
|
|
2013-01-07 19:05:35 +01:00
|
|
|
// add a very basic sanity check on the port to ensure the
|
|
|
|
// invisible buffer is not growing beyond reasonable limits
|
2015-07-20 16:15:18 +02:00
|
|
|
if (!_disableSanityCheck && transmitList.size() > 100) {
|
2013-01-07 19:05:35 +01:00
|
|
|
panic("Packet queue %s has grown beyond 100 packets\n",
|
|
|
|
name());
|
|
|
|
}
|
|
|
|
|
2015-11-06 09:26:38 +01:00
|
|
|
// nothing on the list
|
|
|
|
if (transmitList.empty()) {
|
2015-07-13 14:46:28 +02:00
|
|
|
transmitList.emplace_front(when, pkt);
|
2012-03-22 11:36:27 +01:00
|
|
|
schedSendEvent(when);
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
2015-03-02 10:00:35 +01:00
|
|
|
// we should either have an outstanding retry, or a send event
|
|
|
|
// scheduled, but there is an unfortunate corner case where the
|
|
|
|
// x86 page-table walker and timing CPU send out a new request as
|
|
|
|
// part of the receiving of a response (called by
|
|
|
|
// PacketQueue::sendDeferredPacket), in which we end up calling
|
|
|
|
// ourselves again before we had a chance to update waitingOnRetry
|
|
|
|
// assert(waitingOnRetry || sendEvent.scheduled());
|
|
|
|
|
2015-11-06 09:26:38 +01:00
|
|
|
// this belongs in the middle somewhere, so search from the end to
|
|
|
|
// order by tick; however, if force_order is set, also make sure
|
|
|
|
// not to re-order in front of some existing packet with the same
|
|
|
|
// address
|
|
|
|
auto i = transmitList.end();
|
|
|
|
--i;
|
|
|
|
while (i != transmitList.begin() && when < i->tick &&
|
|
|
|
!(force_order && i->pkt->getAddr() == pkt->getAddr()))
|
|
|
|
--i;
|
|
|
|
|
|
|
|
// emplace inserts the element before the position pointed to by
|
|
|
|
// the iterator, so advance it one step
|
|
|
|
transmitList.emplace(++i, when, pkt);
|
2012-03-22 11:36:27 +01:00
|
|
|
}
|
|
|
|
|
2015-03-02 10:00:35 +01:00
|
|
|
void
|
|
|
|
PacketQueue::schedSendEvent(Tick when)
|
2012-03-22 11:36:27 +01:00
|
|
|
{
|
2015-03-02 10:00:35 +01:00
|
|
|
// if we are waiting on a retry just hold off
|
|
|
|
if (waitingOnRetry) {
|
|
|
|
DPRINTF(PacketQueue, "Not scheduling send as waiting for retry\n");
|
|
|
|
assert(!sendEvent.scheduled());
|
|
|
|
return;
|
2012-03-22 11:36:27 +01:00
|
|
|
}
|
|
|
|
|
2015-03-02 10:00:35 +01:00
|
|
|
if (when != MaxTick) {
|
|
|
|
// we cannot go back in time, and to be consistent we stick to
|
|
|
|
// one tick in the future
|
|
|
|
when = std::max(when, curTick() + 1);
|
|
|
|
// @todo Revisit the +1
|
2012-03-22 11:36:27 +01:00
|
|
|
|
2014-10-09 23:51:52 +02:00
|
|
|
if (!sendEvent.scheduled()) {
|
2015-03-02 10:00:35 +01:00
|
|
|
em.schedule(&sendEvent, when);
|
|
|
|
} else if (when < sendEvent.when()) {
|
2014-10-09 23:51:52 +02:00
|
|
|
// if the new time is earlier than when the event
|
|
|
|
// currently is scheduled, move it forward
|
2015-03-02 10:00:35 +01:00
|
|
|
em.reschedule(&sendEvent, when);
|
2014-10-09 23:51:52 +02:00
|
|
|
}
|
2012-03-22 11:36:27 +01:00
|
|
|
} else {
|
2015-03-02 10:00:35 +01:00
|
|
|
// we get a MaxTick when there is no more to send, so if we're
|
|
|
|
// draining, we may be done at this point
|
2015-07-07 10:51:05 +02:00
|
|
|
if (drainState() == DrainState::Draining &&
|
|
|
|
transmitList.empty() && !sendEvent.scheduled()) {
|
|
|
|
|
2012-08-15 16:38:08 +02:00
|
|
|
DPRINTF(Drain, "PacketQueue done draining,"
|
|
|
|
"processing drain event\n");
|
2015-07-07 10:51:05 +02:00
|
|
|
signalDrainDone();
|
2012-03-22 11:36:27 +01:00
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
void
|
|
|
|
PacketQueue::sendDeferredPacket()
|
|
|
|
{
|
2015-03-02 10:00:35 +01:00
|
|
|
// sanity checks
|
|
|
|
assert(!waitingOnRetry);
|
|
|
|
assert(deferredPacketReady());
|
|
|
|
|
|
|
|
DeferredPacket dp = transmitList.front();
|
|
|
|
|
|
|
|
// take the packet of the list before sending it, as sending of
|
|
|
|
// the packet in some cases causes a new packet to be enqueued
|
|
|
|
// (most notaly when responding to the timing CPU, leading to a
|
|
|
|
// new request hitting in the L1 icache, leading to a new
|
|
|
|
// response)
|
|
|
|
transmitList.pop_front();
|
|
|
|
|
|
|
|
// use the appropriate implementation of sendTiming based on the
|
|
|
|
// type of queue
|
|
|
|
waitingOnRetry = !sendTiming(dp.pkt);
|
2012-03-22 11:36:27 +01:00
|
|
|
|
|
|
|
// if we succeeded and are not waiting for a retry, schedule the
|
|
|
|
// next send
|
|
|
|
if (!waitingOnRetry) {
|
2015-03-02 10:00:35 +01:00
|
|
|
schedSendEvent(deferredPacketReadyTime());
|
|
|
|
} else {
|
|
|
|
// put the packet back at the front of the list
|
2015-03-19 09:06:11 +01:00
|
|
|
transmitList.emplace_front(dp);
|
2012-03-22 11:36:27 +01:00
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
void
|
|
|
|
PacketQueue::processSendEvent()
|
|
|
|
{
|
|
|
|
assert(!waitingOnRetry);
|
|
|
|
sendDeferredPacket();
|
|
|
|
}
|
|
|
|
|
2015-07-07 10:51:05 +02:00
|
|
|
DrainState
|
|
|
|
PacketQueue::drain()
|
2012-03-22 11:36:27 +01:00
|
|
|
{
|
2015-07-07 10:51:05 +02:00
|
|
|
if (transmitList.empty()) {
|
|
|
|
return DrainState::Drained;
|
|
|
|
} else {
|
|
|
|
DPRINTF(Drain, "PacketQueue not drained\n");
|
|
|
|
return DrainState::Draining;
|
|
|
|
}
|
2012-03-22 11:36:27 +01:00
|
|
|
}
|
MEM: Separate requests and responses for timing accesses
This patch moves send/recvTiming and send/recvTimingSnoop from the
Port base class to the MasterPort and SlavePort, and also splits them
into separate member functions for requests and responses:
send/recvTimingReq, send/recvTimingResp, and send/recvTimingSnoopReq,
send/recvTimingSnoopResp. A master port sends requests and receives
responses, and also receives snoop requests and sends snoop
responses. A slave port has the reciprocal behaviour as it receives
requests and sends responses, and sends snoop requests and receives
snoop responses.
For all MemObjects that have only master ports or slave ports (but not
both), e.g. a CPU, or a PIO device, this patch merely adds more
clarity to what kind of access is taking place. For example, a CPU
port used to call sendTiming, and will now call
sendTimingReq. Similarly, a response previously came back through
recvTiming, which is now recvTimingResp. For the modules that have
both master and slave ports, e.g. the bus, the behaviour was
previously relying on branches based on pkt->isRequest(), and this is
now replaced with a direct call to the apprioriate member function
depending on the type of access. Please note that send/recvRetry is
still shared by all the timing accessors and remains in the Port base
class for now (to maintain the current bus functionality and avoid
changing the statistics of all regressions).
The packet queue is split into a MasterPort and SlavePort version to
facilitate the use of the new timing accessors. All uses of the
PacketQueue are updated accordingly.
With this patch, the type of packet (request or response) is now well
defined for each type of access, and asserts on pkt->isRequest() and
pkt->isResponse() are now moved to the appropriate send member
functions. It is also worth noting that sendTimingSnoopReq no longer
returns a boolean, as the semantics do not alow snoop requests to be
rejected or stalled. All these assumptions are now excplicitly part of
the port interface itself.
2012-05-01 19:40:42 +02:00
|
|
|
|
2015-03-02 10:00:35 +01:00
|
|
|
ReqPacketQueue::ReqPacketQueue(EventManager& _em, MasterPort& _masterPort,
|
|
|
|
const std::string _label)
|
|
|
|
: PacketQueue(_em, _label), masterPort(_masterPort)
|
|
|
|
{
|
|
|
|
}
|
|
|
|
|
|
|
|
bool
|
|
|
|
ReqPacketQueue::sendTiming(PacketPtr pkt)
|
|
|
|
{
|
|
|
|
return masterPort.sendTimingReq(pkt);
|
|
|
|
}
|
|
|
|
|
|
|
|
SnoopRespPacketQueue::SnoopRespPacketQueue(EventManager& _em,
|
|
|
|
MasterPort& _masterPort,
|
|
|
|
const std::string _label)
|
MEM: Separate requests and responses for timing accesses
This patch moves send/recvTiming and send/recvTimingSnoop from the
Port base class to the MasterPort and SlavePort, and also splits them
into separate member functions for requests and responses:
send/recvTimingReq, send/recvTimingResp, and send/recvTimingSnoopReq,
send/recvTimingSnoopResp. A master port sends requests and receives
responses, and also receives snoop requests and sends snoop
responses. A slave port has the reciprocal behaviour as it receives
requests and sends responses, and sends snoop requests and receives
snoop responses.
For all MemObjects that have only master ports or slave ports (but not
both), e.g. a CPU, or a PIO device, this patch merely adds more
clarity to what kind of access is taking place. For example, a CPU
port used to call sendTiming, and will now call
sendTimingReq. Similarly, a response previously came back through
recvTiming, which is now recvTimingResp. For the modules that have
both master and slave ports, e.g. the bus, the behaviour was
previously relying on branches based on pkt->isRequest(), and this is
now replaced with a direct call to the apprioriate member function
depending on the type of access. Please note that send/recvRetry is
still shared by all the timing accessors and remains in the Port base
class for now (to maintain the current bus functionality and avoid
changing the statistics of all regressions).
The packet queue is split into a MasterPort and SlavePort version to
facilitate the use of the new timing accessors. All uses of the
PacketQueue are updated accordingly.
With this patch, the type of packet (request or response) is now well
defined for each type of access, and asserts on pkt->isRequest() and
pkt->isResponse() are now moved to the appropriate send member
functions. It is also worth noting that sendTimingSnoopReq no longer
returns a boolean, as the semantics do not alow snoop requests to be
rejected or stalled. All these assumptions are now excplicitly part of
the port interface itself.
2012-05-01 19:40:42 +02:00
|
|
|
: PacketQueue(_em, _label), masterPort(_masterPort)
|
|
|
|
{
|
|
|
|
}
|
|
|
|
|
|
|
|
bool
|
2015-03-02 10:00:35 +01:00
|
|
|
SnoopRespPacketQueue::sendTiming(PacketPtr pkt)
|
MEM: Separate requests and responses for timing accesses
This patch moves send/recvTiming and send/recvTimingSnoop from the
Port base class to the MasterPort and SlavePort, and also splits them
into separate member functions for requests and responses:
send/recvTimingReq, send/recvTimingResp, and send/recvTimingSnoopReq,
send/recvTimingSnoopResp. A master port sends requests and receives
responses, and also receives snoop requests and sends snoop
responses. A slave port has the reciprocal behaviour as it receives
requests and sends responses, and sends snoop requests and receives
snoop responses.
For all MemObjects that have only master ports or slave ports (but not
both), e.g. a CPU, or a PIO device, this patch merely adds more
clarity to what kind of access is taking place. For example, a CPU
port used to call sendTiming, and will now call
sendTimingReq. Similarly, a response previously came back through
recvTiming, which is now recvTimingResp. For the modules that have
both master and slave ports, e.g. the bus, the behaviour was
previously relying on branches based on pkt->isRequest(), and this is
now replaced with a direct call to the apprioriate member function
depending on the type of access. Please note that send/recvRetry is
still shared by all the timing accessors and remains in the Port base
class for now (to maintain the current bus functionality and avoid
changing the statistics of all regressions).
The packet queue is split into a MasterPort and SlavePort version to
facilitate the use of the new timing accessors. All uses of the
PacketQueue are updated accordingly.
With this patch, the type of packet (request or response) is now well
defined for each type of access, and asserts on pkt->isRequest() and
pkt->isResponse() are now moved to the appropriate send member
functions. It is also worth noting that sendTimingSnoopReq no longer
returns a boolean, as the semantics do not alow snoop requests to be
rejected or stalled. All these assumptions are now excplicitly part of
the port interface itself.
2012-05-01 19:40:42 +02:00
|
|
|
{
|
2015-03-02 10:00:35 +01:00
|
|
|
return masterPort.sendTimingSnoopResp(pkt);
|
MEM: Separate requests and responses for timing accesses
This patch moves send/recvTiming and send/recvTimingSnoop from the
Port base class to the MasterPort and SlavePort, and also splits them
into separate member functions for requests and responses:
send/recvTimingReq, send/recvTimingResp, and send/recvTimingSnoopReq,
send/recvTimingSnoopResp. A master port sends requests and receives
responses, and also receives snoop requests and sends snoop
responses. A slave port has the reciprocal behaviour as it receives
requests and sends responses, and sends snoop requests and receives
snoop responses.
For all MemObjects that have only master ports or slave ports (but not
both), e.g. a CPU, or a PIO device, this patch merely adds more
clarity to what kind of access is taking place. For example, a CPU
port used to call sendTiming, and will now call
sendTimingReq. Similarly, a response previously came back through
recvTiming, which is now recvTimingResp. For the modules that have
both master and slave ports, e.g. the bus, the behaviour was
previously relying on branches based on pkt->isRequest(), and this is
now replaced with a direct call to the apprioriate member function
depending on the type of access. Please note that send/recvRetry is
still shared by all the timing accessors and remains in the Port base
class for now (to maintain the current bus functionality and avoid
changing the statistics of all regressions).
The packet queue is split into a MasterPort and SlavePort version to
facilitate the use of the new timing accessors. All uses of the
PacketQueue are updated accordingly.
With this patch, the type of packet (request or response) is now well
defined for each type of access, and asserts on pkt->isRequest() and
pkt->isResponse() are now moved to the appropriate send member
functions. It is also worth noting that sendTimingSnoopReq no longer
returns a boolean, as the semantics do not alow snoop requests to be
rejected or stalled. All these assumptions are now excplicitly part of
the port interface itself.
2012-05-01 19:40:42 +02:00
|
|
|
}
|
|
|
|
|
2015-03-02 10:00:35 +01:00
|
|
|
RespPacketQueue::RespPacketQueue(EventManager& _em, SlavePort& _slavePort,
|
|
|
|
const std::string _label)
|
MEM: Separate requests and responses for timing accesses
This patch moves send/recvTiming and send/recvTimingSnoop from the
Port base class to the MasterPort and SlavePort, and also splits them
into separate member functions for requests and responses:
send/recvTimingReq, send/recvTimingResp, and send/recvTimingSnoopReq,
send/recvTimingSnoopResp. A master port sends requests and receives
responses, and also receives snoop requests and sends snoop
responses. A slave port has the reciprocal behaviour as it receives
requests and sends responses, and sends snoop requests and receives
snoop responses.
For all MemObjects that have only master ports or slave ports (but not
both), e.g. a CPU, or a PIO device, this patch merely adds more
clarity to what kind of access is taking place. For example, a CPU
port used to call sendTiming, and will now call
sendTimingReq. Similarly, a response previously came back through
recvTiming, which is now recvTimingResp. For the modules that have
both master and slave ports, e.g. the bus, the behaviour was
previously relying on branches based on pkt->isRequest(), and this is
now replaced with a direct call to the apprioriate member function
depending on the type of access. Please note that send/recvRetry is
still shared by all the timing accessors and remains in the Port base
class for now (to maintain the current bus functionality and avoid
changing the statistics of all regressions).
The packet queue is split into a MasterPort and SlavePort version to
facilitate the use of the new timing accessors. All uses of the
PacketQueue are updated accordingly.
With this patch, the type of packet (request or response) is now well
defined for each type of access, and asserts on pkt->isRequest() and
pkt->isResponse() are now moved to the appropriate send member
functions. It is also worth noting that sendTimingSnoopReq no longer
returns a boolean, as the semantics do not alow snoop requests to be
rejected or stalled. All these assumptions are now excplicitly part of
the port interface itself.
2012-05-01 19:40:42 +02:00
|
|
|
: PacketQueue(_em, _label), slavePort(_slavePort)
|
|
|
|
{
|
|
|
|
}
|
|
|
|
|
|
|
|
bool
|
2015-03-02 10:00:35 +01:00
|
|
|
RespPacketQueue::sendTiming(PacketPtr pkt)
|
MEM: Separate requests and responses for timing accesses
This patch moves send/recvTiming and send/recvTimingSnoop from the
Port base class to the MasterPort and SlavePort, and also splits them
into separate member functions for requests and responses:
send/recvTimingReq, send/recvTimingResp, and send/recvTimingSnoopReq,
send/recvTimingSnoopResp. A master port sends requests and receives
responses, and also receives snoop requests and sends snoop
responses. A slave port has the reciprocal behaviour as it receives
requests and sends responses, and sends snoop requests and receives
snoop responses.
For all MemObjects that have only master ports or slave ports (but not
both), e.g. a CPU, or a PIO device, this patch merely adds more
clarity to what kind of access is taking place. For example, a CPU
port used to call sendTiming, and will now call
sendTimingReq. Similarly, a response previously came back through
recvTiming, which is now recvTimingResp. For the modules that have
both master and slave ports, e.g. the bus, the behaviour was
previously relying on branches based on pkt->isRequest(), and this is
now replaced with a direct call to the apprioriate member function
depending on the type of access. Please note that send/recvRetry is
still shared by all the timing accessors and remains in the Port base
class for now (to maintain the current bus functionality and avoid
changing the statistics of all regressions).
The packet queue is split into a MasterPort and SlavePort version to
facilitate the use of the new timing accessors. All uses of the
PacketQueue are updated accordingly.
With this patch, the type of packet (request or response) is now well
defined for each type of access, and asserts on pkt->isRequest() and
pkt->isResponse() are now moved to the appropriate send member
functions. It is also worth noting that sendTimingSnoopReq no longer
returns a boolean, as the semantics do not alow snoop requests to be
rejected or stalled. All these assumptions are now excplicitly part of
the port interface itself.
2012-05-01 19:40:42 +02:00
|
|
|
{
|
|
|
|
return slavePort.sendTimingResp(pkt);
|
|
|
|
}
|