2013-04-22 19:20:33 +02:00
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/*
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* Copyright (c) 2012-2013 ARM Limited
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* All rights reserved
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*
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* The license below extends only to copyright in the software and shall
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* not be construed as granting a license to any other intellectual
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* property including but not limited to intellectual property relating
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* to a hardware implementation of the functionality of the software
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* licensed hereunder. You may use the software subject to the license
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* terms below provided that you ensure that this notice is replicated
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* unmodified and in its entirety in all distributions of the software,
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* modified or unmodified, in source code or in binary form.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are
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* met: redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer;
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* redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution;
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* neither the name of the copyright holders nor the names of its
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* contributors may be used to endorse or promote products derived from
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* this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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* Authors: Thomas Grass
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* Andreas Hansson
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* Sascha Bischoff
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*/
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#include "base/random.hh"
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#include "cpu/testers/traffic_gen/generators.hh"
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#include "debug/TrafficGen.hh"
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#include "proto/packet.pb.h"
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BaseGen::BaseGen(QueuedMasterPort& _port, MasterID master_id, Tick _duration)
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: port(_port), masterID(master_id), duration(_duration)
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{
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}
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void
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2013-04-22 19:20:33 +02:00
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BaseGen::send(Addr addr, unsigned size, const MemCmd& cmd,
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Request::FlagsType flags)
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2013-04-22 19:20:33 +02:00
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{
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// Create new request
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Request *req = new Request(addr, size, flags, masterID);
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// Embed it in a packet
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PacketPtr pkt = new Packet(req, cmd);
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uint8_t* pkt_data = new uint8_t[req->getSize()];
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pkt->dataDynamicArray(pkt_data);
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if (cmd.isWrite()) {
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memset(pkt_data, 0xA, req->getSize());
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}
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port.schedTimingReq(pkt, curTick());
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}
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void
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LinearGen::enter()
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{
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// reset the address and the data counter
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nextAddr = startAddr;
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dataManipulated = 0;
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// this test only needs to happen once, but cannot be performed
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// before init() is called and the ports are connected
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if (port.deviceBlockSize() && blocksize > port.deviceBlockSize())
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fatal("TrafficGen %s block size (%d) is larger than port"
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" block size (%d)\n", blocksize, port.deviceBlockSize());
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}
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void
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LinearGen::execute()
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{
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// choose if we generate a read or a write here
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bool isRead = readPercent != 0 &&
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(readPercent == 100 || random_mt.random<uint8_t>(0, 100) < readPercent);
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assert((readPercent == 0 && !isRead) || (readPercent == 100 && isRead) ||
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readPercent != 100);
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DPRINTF(TrafficGen, "LinearGen::execute: %c to addr %x, size %d\n",
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isRead ? 'r' : 'w', nextAddr, blocksize);
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send(nextAddr, blocksize, isRead ? MemCmd::ReadReq : MemCmd::WriteReq);
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// increment the address
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nextAddr += blocksize;
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// Add the amount of data manipulated to the total
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dataManipulated += blocksize;
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}
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Tick
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LinearGen::nextExecuteTick()
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{
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// If we have reached the end of the address space, reset the
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// address to the start of the range
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if (nextAddr + blocksize > endAddr) {
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DPRINTF(TrafficGen, "Wrapping address to the start of "
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"the range\n");
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nextAddr = startAddr;
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}
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// Check to see if we have reached the data limit. If dataLimit is
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// zero we do not have a data limit and therefore we will keep
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// generating requests for the entire residency in this state.
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if (dataLimit && dataManipulated >= dataLimit) {
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DPRINTF(TrafficGen, "Data limit for LinearGen reached.\n");
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// there are no more requests, therefore return MaxTick
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return MaxTick;
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} else {
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// return the time when the next request should take place
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return curTick() + random_mt.random<Tick>(minPeriod, maxPeriod);
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}
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}
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void
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RandomGen::enter()
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{
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// reset the counter to zero
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dataManipulated = 0;
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// this test only needs to happen once, but cannot be performed
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// before init() is called and the ports are connected
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if (port.deviceBlockSize() && blocksize > port.deviceBlockSize())
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fatal("TrafficGen %s block size (%d) is larger than port"
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" block size (%d)\n", blocksize, port.deviceBlockSize());
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}
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void
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RandomGen::execute()
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{
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// choose if we generate a read or a write here
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bool isRead = readPercent != 0 &&
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(readPercent == 100 || random_mt.random<uint8_t>(0, 100) < readPercent);
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assert((readPercent == 0 && !isRead) || (readPercent == 100 && isRead) ||
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readPercent != 100);
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// address of the request
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Addr addr = random_mt.random<Addr>(startAddr, endAddr - 1);
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// round down to start address of block
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addr -= addr % blocksize;
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DPRINTF(TrafficGen, "RandomGen::execute: %c to addr %x, size %d\n",
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isRead ? 'r' : 'w', addr, blocksize);
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// send a new request packet
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send(addr, blocksize, isRead ? MemCmd::ReadReq : MemCmd::WriteReq);
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// Add the amount of data manipulated to the total
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dataManipulated += blocksize;
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}
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Tick
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RandomGen::nextExecuteTick()
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{
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// Check to see if we have reached the data limit. If dataLimit is
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// zero we do not have a data limit and therefore we will keep
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// generating requests for the entire residency in this state.
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if (dataLimit && dataManipulated >= dataLimit)
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{
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DPRINTF(TrafficGen, "Data limit for RandomGen reached.\n");
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// No more requests. Return MaxTick.
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return MaxTick;
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} else {
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// Return the time when the next request should take place.
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return curTick() + random_mt.random<Tick>(minPeriod, maxPeriod);
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}
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}
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TraceGen::InputStream::InputStream(const std::string& filename)
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: trace(filename)
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{
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// Create a protobuf message for the header and read it from the stream
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Message::PacketHeader header_msg;
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if (!trace.read(header_msg)) {
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panic("Failed to read packet header from %s\n", filename);
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if (header_msg.tick_freq() != SimClock::Frequency) {
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panic("Trace %s was recorded with a different tick frequency %d\n",
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header_msg.tick_freq());
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}
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}
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}
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void
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TraceGen::InputStream::reset()
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{
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trace.reset();
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}
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bool
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TraceGen::InputStream::read(TraceElement& element)
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{
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Message::Packet pkt_msg;
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if (trace.read(pkt_msg)) {
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element.cmd = pkt_msg.cmd();
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element.addr = pkt_msg.addr();
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element.blocksize = pkt_msg.size();
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element.tick = pkt_msg.tick();
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2013-04-22 19:20:33 +02:00
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if (pkt_msg.has_flags())
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element.flags = pkt_msg.flags();
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2013-04-22 19:20:33 +02:00
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return true;
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}
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// We have reached the end of the file
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return false;
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}
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Tick
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TraceGen::nextExecuteTick() {
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if (traceComplete)
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// We are at the end of the file, thus we have no more data in
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// the trace Return MaxTick to signal that there will be no
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// more transactions in this active period for the state.
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return MaxTick;
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//Reset the nextElement to the default values
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currElement = nextElement;
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nextElement.clear();
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// We need to look at the next line to calculate the next time an
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// event occurs, or potentially return MaxTick to signal that
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// nothing has to be done.
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if (!trace.read(nextElement)) {
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traceComplete = true;
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return MaxTick;
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}
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DPRINTF(TrafficGen, "currElement: %c addr %d size %d tick %d (%d)\n",
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currElement.cmd.isRead() ? 'r' : 'w',
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currElement.addr,
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currElement.blocksize,
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currElement.tick + tickOffset,
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currElement.tick);
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DPRINTF(TrafficGen, "nextElement: %c addr %d size %d tick %d (%d)\n",
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nextElement.cmd.isRead() ? 'r' : 'w',
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nextElement.addr,
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nextElement.blocksize,
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nextElement.tick + tickOffset,
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nextElement.tick);
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return tickOffset + nextElement.tick;
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}
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void
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TraceGen::enter()
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{
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// update the trace offset to the time where the state was entered.
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tickOffset = curTick();
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// clear everything
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nextElement.clear();
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currElement.clear();
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traceComplete = false;
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}
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void
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TraceGen::execute()
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{
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// it is the responsibility of nextExecuteTick to prevent the
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// state graph from executing the state if it should not
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assert(currElement.isValid());
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2013-04-22 19:20:33 +02:00
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DPRINTF(TrafficGen, "TraceGen::execute: %c %d %d %d 0x%x\n",
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2013-04-22 19:20:33 +02:00
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currElement.cmd.isRead() ? 'r' : 'w',
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currElement.addr,
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currElement.blocksize,
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2013-04-22 19:20:33 +02:00
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currElement.tick,
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currElement.flags);
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2013-04-22 19:20:33 +02:00
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send(currElement.addr + addrOffset, currElement.blocksize,
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2013-04-22 19:20:33 +02:00
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currElement.cmd, currElement.flags);
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2013-04-22 19:20:33 +02:00
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}
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void
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TraceGen::exit()
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{
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// Check if we reached the end of the trace file. If we did not
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// then we want to generate a warning stating that not the entire
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// trace was played.
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if (!traceComplete) {
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warn("Trace player %s was unable to replay the entire trace!\n",
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name());
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}
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// Clear any flags and start over again from the beginning of the
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// file
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trace.reset();
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}
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