gem5/src/arch/x86/isa/specialize.isa

// -*- mode:c++ -*-

// Copyright (c) 2007 The Hewlett-Packard Development Company
// All rights reserved.
//
// Redistribution and use of this software in source and binary forms,
// with or without modification, are permitted provided that the
// following conditions are met:
//
// The software must be used only for Non-Commercial Use which means any
// use which is NOT directed to receiving any direct monetary
// compensation for, or commercial advantage from such use.  Illustrative
// examples of non-commercial use are academic research, personal study,
// teaching, education and corporate research & development.
// Illustrative examples of commercial use are distributing products for
// commercial advantage and providing services using the software for
// commercial advantage.
//
// If you wish to use this software or functionality therein that may be
// covered by patents for commercial use, please contact:
//     Director of Intellectual Property Licensing
//     Office of Strategy and Technology
//     Hewlett-Packard Company
//     1501 Page Mill Road
//     Palo Alto, California  94304
//
// Redistributions of source code must retain the above copyright notice,
// this list of conditions and the following disclaimer.  Redistributions
// in binary form must reproduce the above copyright notice, this list of
// conditions and the following disclaimer in the documentation and/or
// other materials provided with the distribution.  Neither the name of
// the COPYRIGHT HOLDER(s), HEWLETT-PACKARD COMPANY, nor the names of its
// contributors may be used to endorse or promote products derived from
// this software without specific prior written permission.  No right of
// sublicense is granted herewith.  Derivatives of the software and
// output created using the software may be prepared, but only for
// Non-Commercial Uses.  Derivatives of the software may be shared with
// others provided: (i) the others agree to abide by the list of
// conditions herein which includes the Non-Commercial Use restrictions;
// and (ii) such Derivatives of the software include the above copyright
// notice to acknowledge the contribution from this software where
// applicable, this list of conditions and the disclaimer below.
//
// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
//
// Authors: Gabe Black

////////////////////////////////////////////////////////////////////
//
//  Code to "specialize" a microcode sequence to use a particular
//  variety of operands
//

let {{
    # This code builds up a decode block which decodes based on switchval.
    # vals is a dict which matches case values with what should be decoded to.
    # builder is called on the exploded contents of "vals" values to generate
    # whatever code should be used.
    def doSplitDecode(Name, builder, switchVal, vals, default = None):
        blocks = OutputBlocks()
        blocks.decode_block = 'switch(%s) {\n' % switchVal
        for (val, todo) in vals.items():
            new_blocks = builder(Name, *todo)
            new_blocks.decode_block = \
                '\tcase %s: %s\n' % (val, new_blocks.decode_block)
            blocks.append(new_blocks)
        if default:
            new_blocks = builder(Name, *default)
            new_blocks.decode_block = \
                '\tdefault: %s\n' % new_blocks.decode_block
            blocks.append(new_blocks)
        blocks.decode_block += '}\n'
        return blocks
}};

let {{
    class OpType(object):
        parser = re.compile(r"(?P<tag>[A-Z][A-Z]*)(?P<size>[a-z][a-z]*)|(r(?P<reg>[A-Z0-9])(?P<rsize>[a-z]*))")
        def __init__(self, opTypeString):
            match = OpType.parser.search(opTypeString)
            if match == None:
                raise Exception, "Problem parsing operand type %s" % opTypeString
            self.reg = match.group("reg")
            self.tag = match.group("tag")
            self.size = match.group("size")
            self.rsize = match.group("rsize")

    # This function specializes the given piece of code to use a particular
    # set of argument types described by "opTypes".
    def specializeInst(Name, opTypes, env):
        print "Specializing %s with opTypes %s" % (Name, opTypes)
        while len(opTypes):
            # Parse the operand type string we're working with
            opType = OpType(opTypes[0])

            if opType.reg:
                #Figure out what to do with fixed register operands
                #This is the index to use, so we should stick it some place.
                if opType.reg in ("A", "B", "C", "D"):
                    env.addReg("INTREG_R%sX" % opType.reg)
                else:
                    env.addReg("INTREG_R%s" % opType.reg)
                if opType.size:
                    if opType.rsize in ("l", "h", "b"):
                        print "byte"
                    elif opType.rsize == "x":
                        print "word"
                    else:
                        print "Didn't recognize fixed register size %s!" % opType.rsize
            elif opType.tag == None or opType.size == None:
                raise Exception, "Problem parsing operand tag: %s" % opType.tag
            elif opType.tag in ("C", "D", "G", "P", "S", "T", "V"):
                # Use the "reg" field of the ModRM byte to select the register
                env.addReg("(uint8_t)MODRM_REG")
            elif opType.tag in ("E", "Q", "W"):
                # This might refer to memory or to a register. We need to
                # divide it up farther.
                regTypes = copy.copy(opTypes)
                regTypes.pop(0)
                regEnv = copy.copy(env)
                regEnv.addReg("(uint8_t)MODRM_RM")
                # This needs to refer to memory, but we'll fill in the details
                # later. It needs to take into account unaligned memory
                # addresses.
                memTypes = copy.copy(opTypes)
                memTypes.pop(0)
                memEnv = copy.copy(env)
                print "%0"
                return doSplitDecode(Name, specializeInst, "MODRM_MOD",
                    {"3" : (regTypes, regEnv)}, (memTypes, memEnv))
            elif opType.tag in ("I", "J"):
                # Immediates
                print "IMMEDIATE"
            elif opType.tag == "M":
                # This needs to refer to memory, but we'll fill in the details
                # later. It needs to take into account unaligned memory
                # addresses.
                print "%0"
            elif opType.tag in ("PR", "R", "VR"):
                # There should probably be a check here to verify that mod
                # is equal to 11b
                env.addReg("(uint8_t)MODRM_RM")
            else:
                raise Exception, "Unrecognized tag %s." % opType.tag
            opTypes.pop(0)

        # Generate code to return a macroop of the given name which will
        # operate in the given "emulation environment"
        return genMacroop(Name, env)
}};