2006-11-07 00:26:11 +01:00
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# -*- mode:python -*-
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# Copyright (c) 2006 The Regents of The University of Michigan
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# All rights reserved.
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#
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# Redistribution and use in source and binary forms, with or without
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# modification, are permitted provided that the following conditions are
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# met: redistributions of source code must retain the above copyright
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# notice, this list of conditions and the following disclaimer;
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# redistributions in binary form must reproduce the above copyright
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# notice, this list of conditions and the following disclaimer in the
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# documentation and/or other materials provided with the distribution;
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# neither the name of the copyright holders nor the names of its
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# contributors may be used to endorse or promote products derived from
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# this software without specific prior written permission.
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#
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# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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#
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# Authors: Steve Reinhardt
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# Gabe Black
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2007-03-11 08:00:54 +01:00
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Import('*')
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2014-02-18 11:50:59 +01:00
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SimObject('Device.py')
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Source('io_device.cc')
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Source('isa_fake.cc')
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2016-12-19 17:25:38 +01:00
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Source('dma_device.cc')
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2014-02-18 11:50:59 +01:00
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DebugFlag('IsaFake')
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2016-12-19 17:25:38 +01:00
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DebugFlag('DMA')
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2014-02-18 11:50:59 +01:00
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2013-09-04 19:22:57 +02:00
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if env['TARGET_ISA'] == 'null':
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2010-11-20 01:00:39 +01:00
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Return()
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2011-09-30 09:28:33 +02:00
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SimObject('BadDevice.py')
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SimObject('Platform.py')
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SimObject('Terminal.py')
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SimObject('Uart.py')
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2007-05-28 04:21:17 +02:00
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2011-09-30 09:28:33 +02:00
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Source('baddev.cc')
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Source('intel_8254_timer.cc')
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Source('mc146818.cc')
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2015-08-07 10:59:26 +02:00
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Source('pixelpump.cc')
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2011-09-30 09:28:33 +02:00
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Source('platform.cc')
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Source('ps2.cc')
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Source('terminal.cc')
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Source('uart.cc')
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Source('uart8250.cc')
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2007-10-31 06:21:54 +01:00
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2011-09-30 09:28:33 +02:00
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DebugFlag('Intel8254Timer')
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DebugFlag('MC146818')
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DebugFlag('Terminal')
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DebugFlag('TerminalVerbose')
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DebugFlag('Uart')
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