2006-10-12 21:04:14 +02:00
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---------- Begin Simulation Statistics ----------
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2009-04-09 07:21:30 +02:00
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host_inst_rate 5417867 # Simulator instruction rate (inst/s)
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host_mem_usage 197364 # Number of bytes of host memory used
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host_seconds 335.89 # Real time elapsed on the host
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host_tick_rate 2718753958 # Simulator tick rate (ticks/s)
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2006-10-12 21:04:14 +02:00
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sim_freq 1000000000000 # Frequency of simulated ticks
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2007-08-27 05:27:53 +02:00
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sim_insts 1819780127 # Number of instructions simulated
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sim_seconds 0.913189 # Number of seconds simulated
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sim_ticks 913189263000 # Number of ticks simulated
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2009-04-09 07:21:30 +02:00
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system.cpu.dtb.data_accesses 611922547 # DTB accesses
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system.cpu.dtb.data_acv 0 # DTB access violations
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system.cpu.dtb.data_hits 605324165 # DTB hits
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system.cpu.dtb.data_misses 6598382 # DTB misses
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system.cpu.dtb.fetch_accesses 0 # ITB accesses
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system.cpu.dtb.fetch_acv 0 # ITB acv
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system.cpu.dtb.fetch_hits 0 # ITB hits
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system.cpu.dtb.fetch_misses 0 # ITB misses
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2007-08-27 05:27:53 +02:00
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system.cpu.dtb.read_accesses 449492741 # DTB read accesses
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system.cpu.dtb.read_acv 0 # DTB read access violations
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system.cpu.dtb.read_hits 444595663 # DTB read hits
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system.cpu.dtb.read_misses 4897078 # DTB read misses
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system.cpu.dtb.write_accesses 162429806 # DTB write accesses
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system.cpu.dtb.write_acv 0 # DTB write access violations
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system.cpu.dtb.write_hits 160728502 # DTB write hits
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system.cpu.dtb.write_misses 1701304 # DTB write misses
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2006-12-05 01:07:00 +01:00
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system.cpu.idle_fraction 0 # Percentage of idle cycles
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2009-04-09 07:21:30 +02:00
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system.cpu.itb.data_accesses 0 # DTB accesses
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system.cpu.itb.data_acv 0 # DTB access violations
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system.cpu.itb.data_hits 0 # DTB hits
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system.cpu.itb.data_misses 0 # DTB misses
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system.cpu.itb.fetch_accesses 1826378527 # ITB accesses
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system.cpu.itb.fetch_acv 0 # ITB acv
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system.cpu.itb.fetch_hits 1826378509 # ITB hits
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system.cpu.itb.fetch_misses 18 # ITB misses
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system.cpu.itb.read_accesses 0 # DTB read accesses
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system.cpu.itb.read_acv 0 # DTB read access violations
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system.cpu.itb.read_hits 0 # DTB read hits
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system.cpu.itb.read_misses 0 # DTB read misses
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system.cpu.itb.write_accesses 0 # DTB write accesses
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system.cpu.itb.write_acv 0 # DTB write access violations
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system.cpu.itb.write_hits 0 # DTB write hits
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system.cpu.itb.write_misses 0 # DTB write misses
|
2006-12-05 01:07:00 +01:00
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system.cpu.not_idle_fraction 1 # Percentage of non-idle cycles
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2007-08-27 05:27:53 +02:00
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system.cpu.numCycles 1826378527 # number of cpu cycles simulated
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system.cpu.num_insts 1819780127 # Number of instructions executed
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system.cpu.num_refs 613169725 # Number of memory references
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2006-12-05 01:07:00 +01:00
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system.cpu.workload.PROG:num_syscalls 29 # Number of system calls
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2006-10-12 21:04:14 +02:00
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---------- End Simulation Statistics ----------
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