2009-05-11 19:38:46 +02:00
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---------- Begin Simulation Statistics ----------
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2012-09-10 17:57:47 +02:00
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sim_seconds 0.000108 # Number of seconds simulated
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sim_ticks 107952 # Number of ticks simulated
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final_tick 107952 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
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2011-06-10 09:45:24 +02:00
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sim_freq 1000000000 # Frequency of simulated ticks
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2013-03-07 04:57:10 +01:00
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host_inst_rate 19134 # Simulator instruction rate (inst/s)
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host_op_rate 19132 # Simulator op (including micro ops) rate (op/s)
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host_tick_rate 387691 # Simulator tick rate (ticks/s)
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host_mem_usage 158116 # Number of bytes of host memory used
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host_seconds 0.28 # Real time elapsed on the host
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2012-08-15 16:38:05 +02:00
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sim_insts 5327 # Number of instructions simulated
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sim_ops 5327 # Number of ops (including micro ops) simulated
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2013-01-14 17:20:16 +01:00
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system.ruby.l1_cntrl0.cacheMemory.num_data_array_reads 0 # number of data array reads
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system.ruby.l1_cntrl0.cacheMemory.num_data_array_writes 0 # number of data array writes
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system.ruby.l1_cntrl0.cacheMemory.num_tag_array_reads 0 # number of tag array reads
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system.ruby.l1_cntrl0.cacheMemory.num_tag_array_writes 0 # number of tag array writes
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system.ruby.l1_cntrl0.cacheMemory.num_tag_array_stalls 0 # number of stalls caused by tag array
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system.ruby.l1_cntrl0.cacheMemory.num_data_array_stalls 0 # number of stalls caused by data array
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2011-06-10 09:45:24 +02:00
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system.cpu.workload.num_syscalls 11 # Number of system calls
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2012-09-10 17:57:47 +02:00
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system.cpu.numCycles 107952 # number of cpu cycles simulated
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2011-02-08 04:23:13 +01:00
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system.cpu.numWorkItemsStarted 0 # number of work items this cpu started
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2011-06-10 09:45:24 +02:00
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system.cpu.numWorkItemsCompleted 0 # number of work items this cpu completed
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2012-08-15 16:38:05 +02:00
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system.cpu.committedInsts 5327 # Number of instructions committed
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system.cpu.committedOps 5327 # Number of ops (including micro ops) committed
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system.cpu.num_int_alu_accesses 4505 # Number of integer alu accesses
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2011-06-10 09:45:24 +02:00
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system.cpu.num_fp_alu_accesses 0 # Number of float alu accesses
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system.cpu.num_func_calls 146 # number of times a function call or return occured
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2012-08-15 16:38:05 +02:00
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system.cpu.num_conditional_control_insts 773 # number of instructions that are conditional controls
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system.cpu.num_int_insts 4505 # number of integer instructions
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2011-06-10 09:45:24 +02:00
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system.cpu.num_fp_insts 0 # number of float instructions
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2012-08-15 16:38:05 +02:00
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system.cpu.num_int_register_reads 10598 # number of times the integer registers were read
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system.cpu.num_int_register_writes 4845 # number of times the integer registers were written
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2011-06-10 09:45:24 +02:00
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system.cpu.num_fp_register_reads 0 # number of times the floating registers were read
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system.cpu.num_fp_register_writes 0 # number of times the floating registers were written
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2012-08-15 16:38:05 +02:00
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system.cpu.num_mem_refs 1401 # number of memory refs
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system.cpu.num_load_insts 723 # Number of load instructions
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2011-02-08 04:23:13 +01:00
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system.cpu.num_store_insts 678 # Number of store instructions
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2011-06-10 09:45:24 +02:00
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system.cpu.num_idle_cycles 0 # Number of idle cycles
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2012-09-10 17:57:47 +02:00
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system.cpu.num_busy_cycles 107952 # Number of busy cycles
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2011-06-10 09:45:24 +02:00
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system.cpu.not_idle_fraction 1 # Percentage of non-idle cycles
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system.cpu.idle_fraction 0 # Percentage of idle cycles
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2009-05-11 19:38:46 +02:00
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---------- End Simulation Statistics ----------
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