2011-03-22 03:51:58 +01:00
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/*
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* Copyright (c) 2009 Advanced Micro Devices, Inc.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are
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* met: redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer;
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* redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution;
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* neither the name of the copyright holders nor the names of its
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* contributors may be used to endorse or promote products derived from
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* this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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* Authors: Tushar Krishna
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*/
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2011-04-15 19:44:06 +02:00
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#include <cmath>
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2011-03-22 03:51:58 +01:00
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#include <iomanip>
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#include <set>
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#include <string>
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#include <vector>
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#include "base/misc.hh"
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#include "base/statistics.hh"
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#include "cpu/testers/networktest/networktest.hh"
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2011-04-15 19:44:32 +02:00
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#include "debug/NetworkTest.hh"
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2011-03-22 03:51:58 +01:00
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#include "mem/mem_object.hh"
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#include "mem/packet.hh"
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2011-04-15 19:44:06 +02:00
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#include "mem/port.hh"
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2011-03-22 03:51:58 +01:00
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#include "mem/request.hh"
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#include "sim/sim_events.hh"
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#include "sim/stats.hh"
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2012-02-12 23:07:38 +01:00
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#include "sim/system.hh"
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2011-03-22 03:51:58 +01:00
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using namespace std;
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int TESTER_NETWORK=0;
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bool
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NetworkTest::CpuPort::recvTiming(PacketPtr pkt)
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{
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if (pkt->isResponse()) {
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networktest->completeRequest(pkt);
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} else {
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// must be snoop upcall
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assert(pkt->isRequest());
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assert(pkt->getDest() == Packet::Broadcast);
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}
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return true;
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}
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Tick
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NetworkTest::CpuPort::recvAtomic(PacketPtr pkt)
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{
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panic("NetworkTest doesn't expect recvAtomic call!");
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// Will not be used
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assert(pkt->isRequest());
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assert(pkt->getDest() == Packet::Broadcast);
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return curTick();
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}
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void
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NetworkTest::CpuPort::recvFunctional(PacketPtr pkt)
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{
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panic("NetworkTest doesn't expect recvFunctional call!");
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// Will not be used
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return;
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}
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void
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2012-01-17 19:55:09 +01:00
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NetworkTest::CpuPort::recvRangeChange()
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2011-03-22 03:51:58 +01:00
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{
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}
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void
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NetworkTest::CpuPort::recvRetry()
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{
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networktest->doRetry();
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}
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void
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NetworkTest::sendPkt(PacketPtr pkt)
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{
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2011-05-07 23:43:30 +02:00
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if (!cachePort.sendTiming(pkt)) {
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retryPkt = pkt; // RubyPort will retry sending
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2011-03-22 03:51:58 +01:00
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}
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2011-05-07 23:43:30 +02:00
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numPacketsSent++;
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2011-03-22 03:51:58 +01:00
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}
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NetworkTest::NetworkTest(const Params *p)
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: MemObject(p),
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tickEvent(this),
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cachePort("network-test", this),
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retryPkt(NULL),
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size(p->memory_size),
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blockSizeBits(p->block_offset),
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numMemories(p->num_memories),
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2011-05-07 23:43:30 +02:00
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simCycles(p->sim_cycles),
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2011-03-22 03:51:58 +01:00
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fixedPkts(p->fixed_pkts),
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maxPackets(p->max_packets),
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trafficType(p->traffic_type),
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injRate(p->inj_rate),
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2012-02-12 23:07:38 +01:00
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precision(p->precision),
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masterId(p->system->getMasterId(name()))
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2011-03-22 03:51:58 +01:00
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{
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// set up counters
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noResponseCycles = 0;
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schedule(tickEvent, 0);
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id = TESTER_NETWORK++;
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DPRINTF(NetworkTest,"Config Created: Name = %s , and id = %d\n",
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name(), id);
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}
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Port *
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NetworkTest::getPort(const std::string &if_name, int idx)
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{
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if (if_name == "test")
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return &cachePort;
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else
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panic("No Such Port\n");
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}
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void
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NetworkTest::init()
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{
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numPacketsSent = 0;
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}
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void
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NetworkTest::completeRequest(PacketPtr pkt)
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{
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Request *req = pkt->req;
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DPRINTF(NetworkTest, "Completed injection of %s packet for address %x\n",
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pkt->isWrite() ? "write" : "read\n",
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req->getPaddr());
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assert(pkt->isResponse());
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noResponseCycles = 0;
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2011-03-23 04:38:09 +01:00
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delete req;
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2011-03-22 03:51:58 +01:00
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delete pkt;
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}
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void
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NetworkTest::tick()
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{
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if (++noResponseCycles >= 500000) {
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cerr << name() << ": deadlocked at cycle " << curTick() << endl;
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fatal("");
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}
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// make new request based on injection rate
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// (injection rate's range depends on precision)
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// - generate a random number between 0 and 10^precision
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// - send pkt if this number is < injRate*(10^precision)
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bool send_this_cycle;
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2011-03-23 04:38:09 +01:00
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double injRange = pow((double) 10, (double) precision);
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unsigned trySending = random() % (int) injRange;
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2011-03-22 03:51:58 +01:00
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if (trySending < injRate*injRange)
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send_this_cycle = true;
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else
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send_this_cycle = false;
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// always generatePkt unless fixedPkts is enabled
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if (send_this_cycle) {
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if (fixedPkts) {
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if (numPacketsSent < maxPackets) {
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generatePkt();
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}
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} else {
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generatePkt();
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}
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}
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2011-05-07 23:43:30 +02:00
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// Schedule wakeup
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if (curTick() >= simCycles)
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exitSimLoop("Network Tester completed simCycles");
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else {
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if (!tickEvent.scheduled())
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schedule(tickEvent, curTick() + ticks(1));
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}
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2011-03-22 03:51:58 +01:00
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}
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void
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NetworkTest::generatePkt()
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{
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unsigned destination = id;
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if (trafficType == 0) { // Uniform Random
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2011-05-07 23:43:30 +02:00
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destination = random() % numMemories;
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2011-03-22 03:51:58 +01:00
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} else if (trafficType == 1) { // Tornado
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int networkDimension = (int) sqrt(numMemories);
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int my_x = id%networkDimension;
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int my_y = id/networkDimension;
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int dest_x = my_x + (int) ceil(networkDimension/2) - 1;
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dest_x = dest_x%networkDimension;
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int dest_y = my_y;
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destination = dest_y*networkDimension + dest_x;
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} else if (trafficType == 2) { // Bit Complement
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int networkDimension = (int) sqrt(numMemories);
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int my_x = id%networkDimension;
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int my_y = id/networkDimension;
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int dest_x = networkDimension - my_x - 1;
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int dest_y = networkDimension - my_y - 1;
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destination = dest_y*networkDimension + dest_x;
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}
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Request *req = new Request();
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Request::Flags flags;
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// The source of the packets is a cache.
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// The destination of the packets is a directory.
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// The destination bits are embedded in the address after byte-offset.
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Addr paddr = destination;
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paddr <<= blockSizeBits;
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unsigned access_size = 1; // Does not affect Ruby simulation
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// Modeling different coherence msg types over different msg classes.
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//
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// networktest assumes the Network_test coherence protocol
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// which models three message classes/virtual networks.
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// These are: request, forward, response.
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// requests and forwards are "control" packets (typically 8 bytes),
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// while responses are "data" packets (typically 72 bytes).
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//
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// Life of a packet from the tester into the network:
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// (1) This function generatePkt() generates packets of one of the
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// following 3 types (randomly) : ReadReq, INST_FETCH, WriteReq
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// (2) mem/ruby/system/RubyPort.cc converts these to RubyRequestType_LD,
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// RubyRequestType_IFETCH, RubyRequestType_ST respectively
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// (3) mem/ruby/system/Sequencer.cc sends these to the cache controllers
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// in the coherence protocol.
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// (4) Network_test-cache.sm tags RubyRequestType:LD,
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// RubyRequestType:IFETCH and RubyRequestType:ST as
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// Request, Forward, and Response events respectively;
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// and injects them into virtual networks 0, 1 and 2 respectively.
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// It immediately calls back the sequencer.
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// (5) The packet traverses the network (simple/garnet) and reaches its
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// destination (Directory), and network stats are updated.
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// (6) Network_test-dir.sm simply drops the packet.
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//
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MemCmd::Command requestType;
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unsigned randomReqType = random() % 3;
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if (randomReqType == 0) {
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// generate packet for virtual network 0
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requestType = MemCmd::ReadReq;
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2012-02-12 23:07:38 +01:00
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req->setPhys(paddr, access_size, flags, masterId);
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2011-03-22 03:51:58 +01:00
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} else if (randomReqType == 1) {
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// generate packet for virtual network 1
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requestType = MemCmd::ReadReq;
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flags.set(Request::INST_FETCH);
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2012-02-12 23:07:38 +01:00
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req->setVirt(0, 0x0, access_size, flags, 0x0, masterId);
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2011-03-22 03:51:58 +01:00
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req->setPaddr(paddr);
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} else { // if (randomReqType == 2)
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// generate packet for virtual network 2
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requestType = MemCmd::WriteReq;
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2012-02-12 23:07:38 +01:00
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req->setPhys(paddr, access_size, flags, masterId);
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2011-03-22 03:51:58 +01:00
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}
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req->setThreadContext(id,0);
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uint8_t *result = new uint8_t[8];
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//No need to do functional simulation
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//We just do timing simulation of the network
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DPRINTF(NetworkTest,
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"Generated packet with destination %d, embedded in address %x\n",
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destination, req->getPaddr());
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PacketPtr pkt = new Packet(req, requestType, 0);
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pkt->setSrc(0); //Not used
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pkt->dataDynamicArray(new uint8_t[req->getSize()]);
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NetworkTestSenderState *state = new NetworkTestSenderState(result);
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pkt->senderState = state;
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sendPkt(pkt);
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}
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void
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NetworkTest::doRetry()
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{
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if (cachePort.sendTiming(retryPkt)) {
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retryPkt = NULL;
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}
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}
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void
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NetworkTest::printAddr(Addr a)
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{
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cachePort.printAddr(a);
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}
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NetworkTest *
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NetworkTestParams::create()
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{
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return new NetworkTest(this);
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}
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