2005-06-05 00:59:06 +02:00
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/*
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Copyright (c) 2003, 2004
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The Regents of The University of Michigan
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All Rights Reserved
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This code is part of the M5 simulator, developed by Nathan Binkert,
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Erik Hallnor, Steve Raasch, and Steve Reinhardt, with contributions
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from Ron Dreslinski, Dave Greene, Lisa Hsu, Ali Saidi, and Andrew
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Schultz.
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Permission is granted to use, copy, create derivative works and
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redistribute this software and such derivative works for any purpose,
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so long as the copyright notice above, this grant of permission, and
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the disclaimer below appear in all copies made; and so long as the
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name of The University of Michigan is not used in any advertising or
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publicity pertaining to the use or distribution of this software
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without specific, written prior authorization.
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THIS SOFTWARE IS PROVIDED AS IS, WITHOUT REPRESENTATION FROM THE
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UNIVERSITY OF MICHIGAN AS TO ITS FITNESS FOR ANY PURPOSE, AND WITHOUT
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WARRANTY BY THE UNIVERSITY OF MICHIGAN OF ANY KIND, EITHER EXPRESS OR
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IMPLIED, INCLUDING WITHOUT LIMITATION THE IMPLIED WARRANTIES OF
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MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. THE REGENTS OF
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THE UNIVERSITY OF MICHIGAN SHALL NOT BE LIABLE FOR ANY DAMAGES,
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INCLUDING DIRECT, SPECIAL, INDIRECT, INCIDENTAL, OR CONSEQUENTIAL
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DAMAGES, WITH RESPECT TO ANY CLAIM ARISING OUT OF OR IN CONNECTION
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WITH THE USE OF THE SOFTWARE, EVEN IF IT HAS BEEN OR IS HEREAFTER
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ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
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*/
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/*
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Copyright 1993 Hewlett-Packard Development Company, L.P.
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Permission is hereby granted, free of charge, to any person obtaining a copy of
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this software and associated documentation files (the "Software"), to deal in
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the Software without restriction, including without limitation the rights to
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use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies
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of the Software, and to permit persons to whom the Software is furnished to do
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so, subject to the following conditions:
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The above copyright notice and this permission notice shall be included in all
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copies or substantial portions of the Software.
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THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
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SOFTWARE.
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*/
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2004-11-23 09:40:32 +01:00
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/* taken from ebfw/rom/dbmentry.s */
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#define EB164
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/*#ifndef LINT
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.data
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.asciiz "$Id: dbmentry.s,v 1.1.1.1 1997/10/30 23:27:12 verghese Exp $"
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.text
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#endif
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*/
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/*
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* Debug Monitor Entry code
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*/
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#ifndef MAKEDEPEND
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#include "ev5_impure.h"
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#include "cserve.h"
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#include "fromHudsonOsf.h"
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#endif
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//#include "paldefs.h"
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#include "regdefs.h"
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#include "eb164.h"
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//#include "ledcodes.h"
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.text
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/* return address and padding to octaword align */
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#define STARTFRM 16
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.globl __start
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.ent __start, 0
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__start:
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_entry:
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br t0, 2f # get the current PC
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2: ldgp gp, 0(t0) # init gp
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#ifdef original_xxm
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lda a2, CSERVE_K_RD_IMPURE
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call_pal PAL_CSERVE_ENTRY
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lda v0, CNS_Q_BASE(v0)
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# Add KSEG offset to the impure area
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subq zero, 1, t0
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sll t0, 42, t0
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addq t0, v0, v0
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lda t0, CNS_Q_SIGNATURE(v0)
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bic t0, 0x07, t0 # Clear bottom 3 bits to avoid
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# allignment errors if the
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# impure area is total rubbish
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ldq t0, 0x00(t0)
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srl t0, 16, t0 # Shift signature into bottom 16 bits.
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lda t6, 0xDECB(zero) # Load the expected valid signature.
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zap t6, 0xFC, t6 # Clear the upper bits.
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cmpeq t0, t6, t0 # Is this a valid signature?
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beq t0, 1f # Not valid, don't trust input params.
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/*
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* Init the stack at the first 8K boundary
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* below the top of memory.
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*/
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lda t0, CNS_Q_MEM_SIZE(v0)
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ldq t0, 0x00(t0) # Load memory size.
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subq t0, 1, t0 # Last address in memory
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srl t0, 13, t0 # Align to first 8KB boundary
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sll t0, 13, sp # below the top of memory.
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br zero, 2f
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/*
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* If memory size was not passed in via the
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* PALcode impure data use the system specific
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* MINIMUM_SYSTEM_MEMORY definition.
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*/
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1:
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lda sp, (MINIMUM_SYSTEM_MEMORY&0xffff)(zero)
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ldah sp, ((MINIMUM_SYSTEM_MEMORY+0x8000)>>16)(sp)
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lda t0, (8*1024)(zero) # Allow for 8KB guard page.
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subq sp, t0, sp
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2:
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#endif /* original_xxm */
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/*
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* SimOS. Stack pointer is start of a valid phys or KSEG page
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*/
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bis sp,sp,s0 /* save sp */
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slave: lda v0,(8*1024)(sp) /* end of page */
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subq zero, 1, t0
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sll t0, 42, t0
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bis t0, v0, sp
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#ifdef original_xxm
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# Add KSEG offset to the stack pointer
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subq zero, 1, t0
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sll t0, 42, t0
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addq t0, sp, sp
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#endif
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lda sp, -STARTFRM(sp) # Create a stack frame
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stq ra, 0(sp) # Place return address on the stack
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.mask 0x84000000, -8
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.frame sp, STARTFRM, ra
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/*
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* Enable the Floating Point Unit
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*/
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lda a0, 1(zero)
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call_pal PAL_WRFEN_ENTRY
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/*
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* Every good C program has a main()
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*/
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beq s0,master
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call_pal PAL_WHAMI_ENTRY
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bis v0,v0,a0
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jsr ra, SlaveLoop
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master:
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jsr ra, main
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/*
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* The Debug Monitor should never return.
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* However, just incase...
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*/
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ldgp gp, 0(ra)
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bsr zero, _exit
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.end __start
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.globl _exit
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.ent _exit, 0
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_exit:
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ldq ra, 0(sp) # restore return address
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lda sp, STARTFRM(sp) # prune back the stack
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ret zero, (ra) # Back from whence we came
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.end _exit
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.globl cServe
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.ent cServe 2
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cServe:
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.option O1
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.frame sp, 0, ra
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call_pal PAL_CSERVE_ENTRY
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ret zero, (ra)
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.end cServe
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.globl wrfen
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.ent wrfen 2
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wrfen:
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.option O1
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.frame sp, 0, ra
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call_pal PAL_WRFEN_ENTRY
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ret zero, (ra)
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.end wrfen
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.globl consoleCallback
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.ent consoleCallback 2
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consoleCallback:
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br t0, 2f # get the current PC
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2: ldgp gp, 0(t0) # init gp
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lda sp,-64(sp)
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stq ra,0(sp)
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jsr CallBackDispatcher
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ldq ra,0(sp)
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lda sp,64(sp)
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ret zero,(ra)
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.end consoleCallback
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.globl consoleFixup
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.ent consoleFixup 2
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consoleFixup:
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br t0, 2f # get the current PC
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2: ldgp gp, 0(t0) # init gp
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lda sp,-64(sp)
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stq ra,0(sp)
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jsr CallBackFixup
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ldq ra,0(sp)
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lda sp,64(sp)
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ret zero,(ra)
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.end consoleFixup
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.globl SpinLock
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.ent SpinLock 2
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SpinLock:
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1:
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ldq_l a1,0(a0) # interlock complete lock state
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subl ra,3,v0 # get calling addr[31:0] + 1
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blbs a1,2f # branch if lock is busy
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stq_c v0,0(a0) # attempt to acquire lock
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beq v0,2f # branch if lost atomicity
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mb # ensure memory coherence
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ret zero,(ra) # return to caller (v0 is 1)
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2:
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br zero,1b
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.end SpinLock
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.globl loadContext
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.ent loadContext 2
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loadContext:
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.option O1
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.frame sp, 0, ra
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call_pal PAL_SWPCTX_ENTRY
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ret zero, (ra)
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.end loadContext
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.globl SlaveSpin # Very carefully spin wait
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.ent SlaveSpin 2 # and swap context without
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SlaveSpin: # using any stack space
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.option O1
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.frame sp, 0, ra
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mov a0, t0 # cpu number
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mov a1, t1 # cpu rpb pointer (virtual)
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mov a2, t2 # what to spin on
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test: ldl t3, 0(t2)
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beq t3, test
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zapnot t1,0x1f,a0 # make rpb physical
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call_pal PAL_SWPCTX_ENTRY # switch to pcb
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mov t0, a0 # setup args for SlaveCmd
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mov t1, a1
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jsr SlaveCmd # call SlaveCmd
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ret zero, (ra) # Should never be reached
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.end SlaveSpin
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