2007-03-15 20:16:38 +01:00
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/*
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2008-06-12 06:51:14 +02:00
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* Copyright (c) 2007-2008 The Hewlett-Packard Development Company
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2007-03-15 20:16:38 +01:00
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* All rights reserved.
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*
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* Redistribution and use of this software in source and binary forms,
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* with or without modification, are permitted provided that the
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* following conditions are met:
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*
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* The software must be used only for Non-Commercial Use which means any
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* use which is NOT directed to receiving any direct monetary
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* compensation for, or commercial advantage from such use. Illustrative
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* examples of non-commercial use are academic research, personal study,
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* teaching, education and corporate research & development.
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* Illustrative examples of commercial use are distributing products for
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* commercial advantage and providing services using the software for
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* commercial advantage.
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*
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* If you wish to use this software or functionality therein that may be
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* covered by patents for commercial use, please contact:
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* Director of Intellectual Property Licensing
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* Office of Strategy and Technology
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* Hewlett-Packard Company
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* 1501 Page Mill Road
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* Palo Alto, California 94304
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*
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* Redistributions of source code must retain the above copyright notice,
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* this list of conditions and the following disclaimer. Redistributions
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* in binary form must reproduce the above copyright notice, this list of
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* conditions and the following disclaimer in the documentation and/or
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* other materials provided with the distribution. Neither the name of
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* the COPYRIGHT HOLDER(s), HEWLETT-PACKARD COMPANY, nor the names of its
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* contributors may be used to endorse or promote products derived from
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* this software without specific prior written permission. No right of
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* sublicense is granted herewith. Derivatives of the software and
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* output created using the software may be prepared, but only for
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* Non-Commercial Uses. Derivatives of the software may be shared with
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* others provided: (i) the others agree to abide by the list of
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* conditions herein which includes the Non-Commercial Use restrictions;
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* and (ii) such Derivatives of the software include the above copyright
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* notice to acknowledge the contribution from this software where
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* applicable, this list of conditions and the disclaimer below.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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* Authors: Gabe Black
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*/
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2008-06-12 06:51:14 +02:00
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#include "arch/x86/miscregs.hh"
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2007-03-15 20:16:38 +01:00
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#include "arch/x86/predecoder.hh"
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#include "base/misc.hh"
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#include "base/trace.hh"
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2008-06-12 06:51:14 +02:00
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#include "cpu/thread_context.hh"
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2007-03-15 20:16:38 +01:00
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#include "sim/host.hh"
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namespace X86ISA
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{
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2007-10-03 07:21:38 +02:00
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void Predecoder::doReset()
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2007-05-31 15:50:35 +02:00
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{
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origPC = basePC + offset;
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DPRINTF(Predecoder, "Setting origPC to %#x\n", origPC);
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2007-06-12 18:46:04 +02:00
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emi.rex = 0;
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emi.legacy = 0;
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2007-05-31 15:50:35 +02:00
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emi.opcode.num = 0;
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2007-10-08 03:14:48 +02:00
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emi.opcode.op = 0;
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emi.opcode.prefixA = emi.opcode.prefixB = 0;
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2007-05-31 15:50:35 +02:00
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immediateCollected = 0;
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emi.immediate = 0;
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emi.displacement = 0;
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emi.modRM = 0;
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emi.sib = 0;
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2008-06-12 06:51:14 +02:00
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HandyM5Reg m5reg = tc->readMiscRegNoEffect(MISCREG_M5_REG);
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emi.mode.mode = m5reg.mode;
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emi.mode.submode = m5reg.submode;
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2007-05-31 15:50:35 +02:00
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}
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2007-03-15 20:16:38 +01:00
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void Predecoder::process()
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{
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//This function drives the predecoder state machine.
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//Some sanity checks. You shouldn't try to process more bytes if
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//there aren't any, and you shouldn't overwrite an already
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//predecoder ExtMachInst.
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assert(!outOfBytes);
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assert(!emiIsReady);
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//While there's still something to do...
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while(!emiIsReady && !outOfBytes)
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{
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uint8_t nextByte = getNextByte();
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switch(state)
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{
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2007-05-31 15:50:35 +02:00
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case ResetState:
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2007-10-03 07:21:38 +02:00
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doReset();
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2007-05-31 15:50:35 +02:00
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state = PrefixState;
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2007-03-21 20:19:53 +01:00
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case PrefixState:
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2007-03-15 20:16:38 +01:00
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state = doPrefixState(nextByte);
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break;
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2007-03-21 20:19:53 +01:00
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case OpcodeState:
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2007-03-15 20:16:38 +01:00
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state = doOpcodeState(nextByte);
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break;
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2007-03-21 20:19:53 +01:00
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case ModRMState:
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2007-03-15 20:16:38 +01:00
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state = doModRMState(nextByte);
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break;
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2007-03-21 20:19:53 +01:00
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case SIBState:
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2007-03-15 20:16:38 +01:00
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state = doSIBState(nextByte);
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break;
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2007-03-21 20:19:53 +01:00
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case DisplacementState:
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2007-03-15 20:16:38 +01:00
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state = doDisplacementState();
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break;
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2007-03-21 20:19:53 +01:00
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case ImmediateState:
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2007-03-15 20:16:38 +01:00
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state = doImmediateState();
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break;
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case ErrorState:
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panic("Went to the error state in the predecoder.\n");
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default:
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panic("Unrecognized state! %d\n", state);
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}
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}
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}
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//Either get a prefix and record it in the ExtMachInst, or send the
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//state machine on to get the opcode(s).
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Predecoder::State Predecoder::doPrefixState(uint8_t nextByte)
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{
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uint8_t prefix = Prefixes[nextByte];
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2007-03-21 20:19:53 +01:00
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State nextState = PrefixState;
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2007-03-15 20:16:38 +01:00
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if(prefix)
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consumeByte();
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switch(prefix)
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{
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//Operand size override prefixes
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case OperandSizeOverride:
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DPRINTF(Predecoder, "Found operand size override prefix.\n");
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2007-04-06 17:19:23 +02:00
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emi.legacy.op = true;
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2007-03-15 20:16:38 +01:00
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break;
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case AddressSizeOverride:
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DPRINTF(Predecoder, "Found address size override prefix.\n");
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2007-04-06 17:19:23 +02:00
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emi.legacy.addr = true;
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2007-03-15 20:16:38 +01:00
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break;
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//Segment override prefixes
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case CSOverride:
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case DSOverride:
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case ESOverride:
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case FSOverride:
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case GSOverride:
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case SSOverride:
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2007-04-06 17:19:23 +02:00
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DPRINTF(Predecoder, "Found segment override.\n");
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emi.legacy.seg = prefix;
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2007-03-15 20:16:38 +01:00
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break;
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case Lock:
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DPRINTF(Predecoder, "Found lock prefix.\n");
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2007-04-06 17:19:23 +02:00
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emi.legacy.lock = true;
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2007-03-15 20:16:38 +01:00
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break;
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case Rep:
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DPRINTF(Predecoder, "Found rep prefix.\n");
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2007-04-06 17:19:23 +02:00
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emi.legacy.rep = true;
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2007-03-15 20:16:38 +01:00
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break;
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case Repne:
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DPRINTF(Predecoder, "Found repne prefix.\n");
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2007-04-06 17:19:23 +02:00
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emi.legacy.repne = true;
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2007-03-15 20:16:38 +01:00
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break;
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2007-03-21 20:19:53 +01:00
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case RexPrefix:
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2007-03-15 20:16:38 +01:00
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DPRINTF(Predecoder, "Found Rex prefix %#x.\n", nextByte);
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2007-03-21 20:19:53 +01:00
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emi.rex = nextByte;
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2007-03-15 20:16:38 +01:00
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break;
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case 0:
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2007-03-21 20:19:53 +01:00
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nextState = OpcodeState;
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2007-03-15 20:16:38 +01:00
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break;
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default:
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panic("Unrecognized prefix %#x\n", nextByte);
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}
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return nextState;
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}
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//Load all the opcodes (currently up to 2) and then figure out
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//what immediate and/or ModRM is needed.
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Predecoder::State Predecoder::doOpcodeState(uint8_t nextByte)
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{
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State nextState = ErrorState;
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2007-03-21 20:19:53 +01:00
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emi.opcode.num++;
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2007-03-15 20:16:38 +01:00
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//We can't handle 3+ byte opcodes right now
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2007-03-21 20:19:53 +01:00
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assert(emi.opcode.num < 3);
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2007-03-15 20:16:38 +01:00
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consumeByte();
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2007-03-21 20:19:53 +01:00
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if(emi.opcode.num == 1 && nextByte == 0x0f)
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2007-03-15 20:16:38 +01:00
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{
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2007-03-21 20:19:53 +01:00
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nextState = OpcodeState;
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2007-03-15 20:16:38 +01:00
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DPRINTF(Predecoder, "Found two byte opcode.\n");
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2007-03-21 20:19:53 +01:00
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emi.opcode.prefixA = nextByte;
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}
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else if(emi.opcode.num == 2 &&
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(nextByte == 0x0f ||
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(nextByte & 0xf8) == 0x38))
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{
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panic("Three byte opcodes aren't yet supported!\n");
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nextState = OpcodeState;
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DPRINTF(Predecoder, "Found three byte opcode.\n");
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emi.opcode.prefixB = nextByte;
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2007-03-15 20:16:38 +01:00
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}
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else
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{
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DPRINTF(Predecoder, "Found opcode %#x.\n", nextByte);
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2007-03-21 20:19:53 +01:00
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emi.opcode.op = nextByte;
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2007-03-15 20:16:38 +01:00
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2008-06-12 06:51:14 +02:00
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SegAttr csAttr = tc->readMiscRegNoEffect(MISCREG_CS_ATTR);
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2007-04-06 17:19:23 +02:00
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//Figure out the effective operand size. This can be overriden to
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//a fixed value at the decoder level.
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2007-06-13 22:09:03 +02:00
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int logOpSize;
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2008-06-12 06:51:14 +02:00
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if (emi.mode.submode == SixtyFourBitMode)
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2007-04-06 17:19:23 +02:00
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{
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2007-06-13 22:09:03 +02:00
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if(emi.rex.w)
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logOpSize = 3; // 64 bit operand size
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2007-04-06 17:19:23 +02:00
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else if(emi.legacy.op)
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2007-06-13 22:09:03 +02:00
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logOpSize = 1; // 16 bit operand size
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2007-04-06 17:19:23 +02:00
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else
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2007-06-13 22:09:03 +02:00
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logOpSize = 2; // 32 bit operand size
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2007-04-06 17:19:23 +02:00
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}
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2008-06-12 06:51:14 +02:00
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else if(csAttr.defaultSize)
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2007-04-06 17:19:23 +02:00
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{
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if(emi.legacy.op)
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2007-06-13 22:09:03 +02:00
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logOpSize = 1; // 16 bit operand size
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2007-04-06 17:19:23 +02:00
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else
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2007-06-13 22:09:03 +02:00
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logOpSize = 2; // 32 bit operand size
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2007-04-06 17:19:23 +02:00
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}
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else // 16 bit default operand size
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{
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if(emi.legacy.op)
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2007-06-13 22:09:03 +02:00
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logOpSize = 2; // 32 bit operand size
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2007-04-06 17:19:23 +02:00
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else
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2007-06-13 22:09:03 +02:00
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logOpSize = 1; // 16 bit operand size
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2007-04-06 17:19:23 +02:00
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}
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2007-07-18 05:54:55 +02:00
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//Set the actual op size
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emi.opSize = 1 << logOpSize;
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//Figure out the effective address size. This can be overriden to
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//a fixed value at the decoder level.
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int logAddrSize;
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2008-06-12 06:51:14 +02:00
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if(emi.mode.submode == SixtyFourBitMode)
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2007-07-18 05:54:55 +02:00
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{
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if(emi.legacy.addr)
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logAddrSize = 2; // 32 bit address size
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else
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logAddrSize = 3; // 64 bit address size
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}
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2008-06-12 06:51:14 +02:00
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else if(csAttr.defaultSize)
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2007-07-18 05:54:55 +02:00
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{
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if(emi.legacy.addr)
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logAddrSize = 1; // 16 bit address size
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else
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logAddrSize = 2; // 32 bit address size
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}
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else // 16 bit default operand size
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{
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if(emi.legacy.addr)
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logAddrSize = 2; // 32 bit address size
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else
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logAddrSize = 1; // 16 bit address size
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}
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2008-06-12 06:51:14 +02:00
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SegAttr ssAttr = tc->readMiscRegNoEffect(MISCREG_SS_ATTR);
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//Figure out the effective stack width. This can be overriden to
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//a fixed value at the decoder level.
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if(emi.mode.submode == SixtyFourBitMode)
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emi.stackSize = 8; // 64 bit stack width
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else if(ssAttr.defaultSize)
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emi.stackSize = 4; // 32 bit stack width
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else
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emi.stackSize = 2; // 16 bit stack width
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2007-07-18 05:54:55 +02:00
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//Set the actual address size
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emi.addrSize = 1 << logAddrSize;
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|
2007-03-15 20:16:38 +01:00
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//Figure out how big of an immediate we'll retreive based
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//on the opcode.
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2007-04-06 17:19:23 +02:00
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int immType = ImmediateType[emi.opcode.num - 1][nextByte];
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2007-12-02 09:02:51 +01:00
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if (emi.opcode.num == 1 && nextByte >= 0xA0 && nextByte <= 0xA3)
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immediateSize = SizeTypeToSize[logAddrSize - 1][immType];
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else
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immediateSize = SizeTypeToSize[logOpSize - 1][immType];
|
2007-06-13 22:09:03 +02:00
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2007-03-15 20:16:38 +01:00
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//Determine what to expect next
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2007-03-21 20:19:53 +01:00
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if (UsesModRM[emi.opcode.num - 1][nextByte]) {
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nextState = ModRMState;
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2007-03-15 20:16:38 +01:00
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} else {
|
2007-04-03 16:56:24 +02:00
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if(immediateSize) {
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nextState = ImmediateState;
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} else {
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emiIsReady = true;
|
2007-05-31 15:50:35 +02:00
|
|
|
nextState = ResetState;
|
2007-04-03 16:56:24 +02:00
|
|
|
}
|
2007-03-15 20:16:38 +01:00
|
|
|
}
|
|
|
|
}
|
|
|
|
return nextState;
|
|
|
|
}
|
|
|
|
|
|
|
|
//Get the ModRM byte and determine what displacement, if any, there is.
|
|
|
|
//Also determine whether or not to get the SIB byte, displacement, or
|
|
|
|
//immediate next.
|
|
|
|
Predecoder::State Predecoder::doModRMState(uint8_t nextByte)
|
|
|
|
{
|
|
|
|
State nextState = ErrorState;
|
2007-06-20 17:02:50 +02:00
|
|
|
ModRM modRM;
|
|
|
|
modRM = nextByte;
|
2007-03-15 20:16:38 +01:00
|
|
|
DPRINTF(Predecoder, "Found modrm byte %#x.\n", nextByte);
|
2008-06-12 06:51:14 +02:00
|
|
|
SegAttr csAttr = tc->readMiscRegNoEffect(MISCREG_CS_ATTR);
|
|
|
|
if (emi.mode.submode != SixtyFourBitMode &&
|
|
|
|
!csAttr.defaultSize) {
|
2007-03-15 20:16:38 +01:00
|
|
|
//figure out 16 bit displacement size
|
2008-09-28 06:03:49 +02:00
|
|
|
if ((modRM.mod == 0 && modRM.rm == 6) || modRM.mod == 2)
|
2007-03-15 20:16:38 +01:00
|
|
|
displacementSize = 2;
|
2008-09-28 06:03:49 +02:00
|
|
|
else if (modRM.mod == 1)
|
2007-03-15 20:16:38 +01:00
|
|
|
displacementSize = 1;
|
|
|
|
else
|
|
|
|
displacementSize = 0;
|
|
|
|
} else {
|
|
|
|
//figure out 32/64 bit displacement size
|
2008-09-28 06:03:49 +02:00
|
|
|
if ((modRM.mod == 0 && modRM.rm == 5) || modRM.mod == 2)
|
2007-03-15 20:16:38 +01:00
|
|
|
displacementSize = 4;
|
2008-09-28 06:03:49 +02:00
|
|
|
else if (modRM.mod == 1)
|
2007-04-03 16:56:24 +02:00
|
|
|
displacementSize = 1;
|
2007-03-15 20:16:38 +01:00
|
|
|
else
|
|
|
|
displacementSize = 0;
|
|
|
|
}
|
2007-07-25 00:37:16 +02:00
|
|
|
|
|
|
|
// The "test" instruction in group 3 needs an immediate, even though
|
|
|
|
// the other instructions with the same actual opcode don't.
|
|
|
|
if (emi.opcode.num == 1 && (modRM.reg & 0x6) == 0) {
|
|
|
|
if (emi.opcode.op == 0xF6)
|
|
|
|
immediateSize = 1;
|
|
|
|
else if (emi.opcode.op == 0xF7)
|
|
|
|
immediateSize = (emi.opSize == 8) ? 4 : emi.opSize;
|
|
|
|
}
|
|
|
|
|
2007-03-15 20:16:38 +01:00
|
|
|
//If there's an SIB, get that next.
|
|
|
|
//There is no SIB in 16 bit mode.
|
2007-07-25 00:37:16 +02:00
|
|
|
if (modRM.rm == 4 && modRM.mod != 3) {
|
2007-03-15 20:16:38 +01:00
|
|
|
// && in 32/64 bit mode)
|
2007-03-21 20:19:53 +01:00
|
|
|
nextState = SIBState;
|
2007-03-15 20:16:38 +01:00
|
|
|
} else if(displacementSize) {
|
2007-03-21 20:19:53 +01:00
|
|
|
nextState = DisplacementState;
|
2007-03-15 20:16:38 +01:00
|
|
|
} else if(immediateSize) {
|
2007-03-21 20:19:53 +01:00
|
|
|
nextState = ImmediateState;
|
2007-03-15 20:16:38 +01:00
|
|
|
} else {
|
|
|
|
emiIsReady = true;
|
2007-05-31 15:50:35 +02:00
|
|
|
nextState = ResetState;
|
2007-03-15 20:16:38 +01:00
|
|
|
}
|
|
|
|
//The ModRM byte is consumed no matter what
|
|
|
|
consumeByte();
|
2007-06-20 17:02:50 +02:00
|
|
|
emi.modRM = modRM;
|
2007-03-15 20:16:38 +01:00
|
|
|
return nextState;
|
|
|
|
}
|
|
|
|
|
|
|
|
//Get the SIB byte. We don't do anything with it at this point, other
|
|
|
|
//than storing it in the ExtMachInst. Determine if we need to get a
|
|
|
|
//displacement or immediate next.
|
|
|
|
Predecoder::State Predecoder::doSIBState(uint8_t nextByte)
|
|
|
|
{
|
|
|
|
State nextState = ErrorState;
|
2007-03-21 20:19:53 +01:00
|
|
|
emi.sib = nextByte;
|
2007-03-15 20:16:38 +01:00
|
|
|
DPRINTF(Predecoder, "Found SIB byte %#x.\n", nextByte);
|
|
|
|
consumeByte();
|
2007-07-25 00:37:16 +02:00
|
|
|
if (emi.modRM.mod == 0 && emi.sib.base == 5)
|
2007-07-22 04:23:03 +02:00
|
|
|
displacementSize = 4;
|
2007-07-25 00:37:16 +02:00
|
|
|
if (displacementSize) {
|
2007-03-21 20:19:53 +01:00
|
|
|
nextState = DisplacementState;
|
2007-03-15 20:16:38 +01:00
|
|
|
} else if(immediateSize) {
|
2007-03-21 20:19:53 +01:00
|
|
|
nextState = ImmediateState;
|
2007-03-15 20:16:38 +01:00
|
|
|
} else {
|
|
|
|
emiIsReady = true;
|
2007-05-31 15:50:35 +02:00
|
|
|
nextState = ResetState;
|
2007-03-15 20:16:38 +01:00
|
|
|
}
|
|
|
|
return nextState;
|
|
|
|
}
|
|
|
|
|
|
|
|
//Gather up the displacement, or at least as much of it
|
|
|
|
//as we can get.
|
|
|
|
Predecoder::State Predecoder::doDisplacementState()
|
|
|
|
{
|
|
|
|
State nextState = ErrorState;
|
|
|
|
|
2007-07-22 04:34:52 +02:00
|
|
|
getImmediate(immediateCollected,
|
2007-03-15 20:16:38 +01:00
|
|
|
emi.displacement,
|
|
|
|
displacementSize);
|
|
|
|
|
|
|
|
DPRINTF(Predecoder, "Collecting %d byte displacement, got %d bytes.\n",
|
2007-07-22 04:34:52 +02:00
|
|
|
displacementSize, immediateCollected);
|
2007-03-15 20:16:38 +01:00
|
|
|
|
2007-07-22 04:34:52 +02:00
|
|
|
if(displacementSize == immediateCollected) {
|
|
|
|
//Reset this for other immediates.
|
|
|
|
immediateCollected = 0;
|
2007-03-15 20:16:38 +01:00
|
|
|
//Sign extend the displacement
|
|
|
|
switch(displacementSize)
|
|
|
|
{
|
|
|
|
case 1:
|
|
|
|
emi.displacement = sext<8>(emi.displacement);
|
|
|
|
break;
|
|
|
|
case 2:
|
|
|
|
emi.displacement = sext<16>(emi.displacement);
|
|
|
|
break;
|
|
|
|
case 4:
|
|
|
|
emi.displacement = sext<32>(emi.displacement);
|
|
|
|
break;
|
|
|
|
default:
|
|
|
|
panic("Undefined displacement size!\n");
|
|
|
|
}
|
|
|
|
DPRINTF(Predecoder, "Collected displacement %#x.\n",
|
|
|
|
emi.displacement);
|
|
|
|
if(immediateSize) {
|
2007-03-21 20:19:53 +01:00
|
|
|
nextState = ImmediateState;
|
2007-03-15 20:16:38 +01:00
|
|
|
} else {
|
|
|
|
emiIsReady = true;
|
2007-05-31 15:50:35 +02:00
|
|
|
nextState = ResetState;
|
2007-03-15 20:16:38 +01:00
|
|
|
}
|
|
|
|
}
|
|
|
|
else
|
2007-03-21 20:19:53 +01:00
|
|
|
nextState = DisplacementState;
|
2007-03-15 20:16:38 +01:00
|
|
|
return nextState;
|
|
|
|
}
|
|
|
|
|
|
|
|
//Gather up the immediate, or at least as much of it
|
|
|
|
//as we can get
|
|
|
|
Predecoder::State Predecoder::doImmediateState()
|
|
|
|
{
|
|
|
|
State nextState = ErrorState;
|
|
|
|
|
|
|
|
getImmediate(immediateCollected,
|
|
|
|
emi.immediate,
|
|
|
|
immediateSize);
|
|
|
|
|
|
|
|
DPRINTF(Predecoder, "Collecting %d byte immediate, got %d bytes.\n",
|
|
|
|
immediateSize, immediateCollected);
|
|
|
|
|
|
|
|
if(immediateSize == immediateCollected)
|
|
|
|
{
|
2007-07-22 04:34:52 +02:00
|
|
|
//Reset this for other immediates.
|
|
|
|
immediateCollected = 0;
|
|
|
|
|
2007-04-06 17:19:23 +02:00
|
|
|
//XXX Warning! The following is an observed pattern and might
|
|
|
|
//not always be true!
|
|
|
|
|
|
|
|
//Instructions which use 64 bit operands but 32 bit immediates
|
|
|
|
//need to have the immediate sign extended to 64 bits.
|
|
|
|
//Instructions which use true 64 bit immediates won't be
|
|
|
|
//affected, and instructions that use true 32 bit immediates
|
|
|
|
//won't notice.
|
2007-06-14 22:52:24 +02:00
|
|
|
switch(immediateSize)
|
|
|
|
{
|
|
|
|
case 4:
|
2007-04-06 17:19:23 +02:00
|
|
|
emi.immediate = sext<32>(emi.immediate);
|
2007-06-14 22:52:24 +02:00
|
|
|
break;
|
|
|
|
case 1:
|
|
|
|
emi.immediate = sext<8>(emi.immediate);
|
|
|
|
}
|
|
|
|
|
2007-03-15 20:16:38 +01:00
|
|
|
DPRINTF(Predecoder, "Collected immediate %#x.\n",
|
|
|
|
emi.immediate);
|
|
|
|
emiIsReady = true;
|
2007-05-31 15:50:35 +02:00
|
|
|
nextState = ResetState;
|
2007-03-15 20:16:38 +01:00
|
|
|
}
|
|
|
|
else
|
2007-03-21 20:19:53 +01:00
|
|
|
nextState = ImmediateState;
|
2007-03-15 20:16:38 +01:00
|
|
|
return nextState;
|
|
|
|
}
|
|
|
|
}
|