2009-05-11 19:38:46 +02:00
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================ Begin RubySystem Configuration Print ================
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2009-07-07 00:49:48 +02:00
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RubySystem config:
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2010-01-30 05:29:40 +01:00
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random_seed: 1234
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2009-07-07 00:49:48 +02:00
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randomization: 0
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2010-01-30 05:29:40 +01:00
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cycle_period: 1
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2009-07-07 00:49:48 +02:00
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block_size_bytes: 64
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block_size_bits: 6
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2010-01-30 05:29:40 +01:00
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memory_size_bytes: 134217728
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memory_size_bits: 27
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2009-05-11 19:38:46 +02:00
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Network Configuration
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---------------------
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network: SIMPLE_NETWORK
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2010-01-30 05:29:40 +01:00
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topology:
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2009-05-11 19:38:46 +02:00
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virtual_net_0: active, ordered
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2009-07-07 00:49:48 +02:00
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virtual_net_1: active, ordered
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virtual_net_2: active, ordered
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2011-02-08 04:23:13 +01:00
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virtual_net_3: active, ordered
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2009-07-07 00:49:48 +02:00
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virtual_net_4: active, ordered
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2011-02-08 04:23:13 +01:00
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virtual_net_5: inactive
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2010-01-30 05:29:40 +01:00
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virtual_net_6: inactive
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virtual_net_7: inactive
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virtual_net_8: inactive
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virtual_net_9: inactive
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2009-05-11 19:38:46 +02:00
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Profiler Configuration
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----------------------
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periodic_stats_period: 1000000
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================ End RubySystem Configuration Print ================
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2011-02-08 04:23:13 +01:00
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Real time: Feb/07/2011 01:47:37
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2009-05-11 19:38:46 +02:00
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Profiler Stats
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--------------
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2011-02-08 04:23:13 +01:00
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Elapsed_time_in_seconds: 1
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Elapsed_time_in_minutes: 0.0166667
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Elapsed_time_in_hours: 0.000277778
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Elapsed_time_in_days: 1.15741e-05
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2009-05-11 19:38:46 +02:00
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2011-02-08 04:23:13 +01:00
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Virtual_time_in_seconds: 0.26
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Virtual_time_in_minutes: 0.00433333
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Virtual_time_in_hours: 7.22222e-05
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Virtual_time_in_days: 3.00926e-06
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2009-05-11 19:38:46 +02:00
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2010-01-30 05:29:40 +01:00
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Ruby_current_time: 123378
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Ruby_start_time: 0
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Ruby_cycles: 123378
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2009-05-11 19:38:46 +02:00
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2011-02-08 04:23:13 +01:00
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mbytes_resident: 36.4062
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mbytes_total: 226.781
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resident_ratio: 0.160552
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2009-05-11 19:38:46 +02:00
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2011-02-08 04:23:13 +01:00
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ruby_cycles_executed: [ 123379 ]
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2009-05-11 19:38:46 +02:00
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Busy Controller Counts:
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L1Cache-0:0
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Directory-0:0
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2010-01-30 05:29:40 +01:00
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2009-05-11 19:38:46 +02:00
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Busy Bank Count:0
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2010-01-30 05:29:40 +01:00
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sequencer_requests_outstanding: [binsize: 1 max: 1 count: 3295 average: 1 | standard deviation: 0 | 0 3295 ]
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2009-05-11 19:38:46 +02:00
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All Non-Zero Cycle Demand Cache Accesses
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----------------------------------------
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2010-01-30 05:29:40 +01:00
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miss_latency: [binsize: 2 max: 375 count: 3294 average: 36.4554 | standard deviation: 69.7725 | 0 2668 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 2 0 0 0 3 1 1 4 2 101 88 63 177 126 0 1 1 8 0 2 1 1 4 4 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 7 4 5 13 2 0 0 0 1 0 0 1 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 ]
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2011-02-08 04:23:13 +01:00
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miss_latency_IFETCH: [binsize: 2 max: 375 count: 2585 average: 23.1702 | standard deviation: 56.4841 | 0 2288 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 2 0 0 2 2 31 53 29 71 82 0 1 0 5 0 1 1 1 0 2 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 2 2 1 3 2 0 0 0 1 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 ]
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miss_latency_LD: [binsize: 2 max: 281 count: 415 average: 107.304 | standard deviation: 88.8453 | 0 170 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 1 1 0 2 0 56 24 27 75 32 0 0 1 3 0 1 0 0 2 2 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 5 0 4 7 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ]
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miss_latency_ST: [binsize: 2 max: 265 count: 294 average: 53.2585 | standard deviation: 80.456 | 0 210 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 1 0 0 14 11 7 31 12 0 0 0 0 0 0 0 0 2 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 2 0 3 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ]
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miss_latency_L1Cache: [binsize: 1 max: 3 count: 2668 average: 3 | standard deviation: 0 | 0 0 0 2668 ]
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miss_latency_Directory: [binsize: 2 max: 375 count: 626 average: 179.042 | standard deviation: 22.5462 | 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 2 0 0 0 3 1 1 4 2 101 88 63 177 126 0 1 1 8 0 2 1 1 4 4 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 7 4 5 13 2 0 0 0 1 0 0 1 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 ]
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miss_latency_wCC_issue_to_initial_request: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
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miss_latency_wCC_initial_forward_request: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
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miss_latency_wCC_forward_to_first_response: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
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miss_latency_wCC_first_response_to_completion: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
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imcomplete_wCC_Times: 0
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miss_latency_dir_issue_to_initial_request: [binsize: 1 max: 0 count: 1 average: 0 | standard deviation: 0 | 1 ]
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miss_latency_dir_initial_forward_request: [binsize: 1 max: 0 count: 1 average: 0 | standard deviation: 0 | 1 ]
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miss_latency_dir_forward_to_first_response: [binsize: 1 max: 0 count: 1 average: 0 | standard deviation: 0 | 1 ]
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miss_latency_dir_first_response_to_completion: [binsize: 1 max: 159 count: 1 average: 159 | standard deviation: 0 | 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 ]
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imcomplete_dir_Times: 625
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miss_latency_IFETCH_L1Cache: [binsize: 1 max: 3 count: 2288 average: 3 | standard deviation: 0 | 0 0 0 2288 ]
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miss_latency_IFETCH_Directory: [binsize: 2 max: 375 count: 297 average: 178.556 | standard deviation: 21.9279 | 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 2 0 0 2 2 31 53 29 71 82 0 1 0 5 0 1 1 1 0 2 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 2 2 1 3 2 0 0 0 1 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 ]
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miss_latency_LD_L1Cache: [binsize: 1 max: 3 count: 170 average: 3 | standard deviation: 0 | 0 0 0 170 ]
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miss_latency_LD_Directory: [binsize: 2 max: 281 count: 245 average: 179.678 | standard deviation: 23.5327 | 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 1 1 0 2 0 56 24 27 75 32 0 0 1 3 0 1 0 0 2 2 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 5 0 4 7 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ]
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miss_latency_ST_L1Cache: [binsize: 1 max: 3 count: 210 average: 3 | standard deviation: 0 | 0 0 0 210 ]
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miss_latency_ST_Directory: [binsize: 2 max: 265 count: 84 average: 178.905 | standard deviation: 21.977 | 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 1 0 0 14 11 7 31 12 0 0 0 0 0 0 0 0 2 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 2 0 3 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ]
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2009-05-11 19:38:46 +02:00
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All Non-Zero Cycle SW Prefetch Requests
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------------------------------------
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prefetch_latency: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
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prefetch_latency_L2Miss:[binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
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Request vs. RubySystem State Profile
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--------------------------------
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filter_action: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
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Message Delayed Cycles
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----------------------
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2010-01-30 05:29:40 +01:00
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Total_delay_cycles: [binsize: 1 max: 0 count: 1248 average: 0 | standard deviation: 0 | 1248 ]
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Total_nonPF_delay_cycles: [binsize: 1 max: 0 count: 1248 average: 0 | standard deviation: 0 | 1248 ]
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2009-05-11 19:38:46 +02:00
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virtual_network_0_delay_cycles: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
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2010-01-30 05:29:40 +01:00
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virtual_network_1_delay_cycles: [binsize: 1 max: 0 count: 626 average: 0 | standard deviation: 0 | 626 ]
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virtual_network_2_delay_cycles: [binsize: 1 max: 0 count: 622 average: 0 | standard deviation: 0 | 622 ]
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2009-05-11 19:38:46 +02:00
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virtual_network_3_delay_cycles: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
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2009-07-07 00:49:48 +02:00
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virtual_network_4_delay_cycles: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
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virtual_network_5_delay_cycles: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
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2010-01-30 05:29:40 +01:00
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virtual_network_6_delay_cycles: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
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virtual_network_7_delay_cycles: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
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virtual_network_8_delay_cycles: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
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virtual_network_9_delay_cycles: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
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2009-05-11 19:38:46 +02:00
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Resource Usage
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--------------
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page_size: 4096
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user_time: 0
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system_time: 0
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2011-02-08 04:23:13 +01:00
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page_reclaims: 10395
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page_faults: 0
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2009-05-11 19:38:46 +02:00
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swaps: 0
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2010-01-30 05:29:40 +01:00
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block_inputs: 0
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2011-02-08 04:23:13 +01:00
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block_outputs: 64
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2009-05-11 19:38:46 +02:00
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Network Stats
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-------------
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2011-02-08 04:23:13 +01:00
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total_msg_count_Control: 1878 15024
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total_msg_count_Data: 1866 134352
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total_msg_count_Response_Data: 1878 135216
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total_msg_count_Writeback_Control: 1866 14928
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total_msgs: 7488 total_bytes: 299520
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2009-07-07 00:49:48 +02:00
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switch_0_inlinks: 2
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switch_0_outlinks: 2
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2010-01-30 05:29:40 +01:00
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links_utilized_percent_switch_0: 0.157808
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links_utilized_percent_switch_0_link_0: 0.0633825 bw: 640000 base_latency: 1
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links_utilized_percent_switch_0_link_1: 0.252233 bw: 160000 base_latency: 1
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2009-05-11 19:38:46 +02:00
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2011-02-08 04:23:13 +01:00
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outgoing_messages_switch_0_link_0_Response_Data: 626 45072 [ 0 0 0 0 626 0 0 0 0 0 ] base_latency: 1
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outgoing_messages_switch_0_link_0_Writeback_Control: 622 4976 [ 0 0 0 622 0 0 0 0 0 0 ] base_latency: 1
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outgoing_messages_switch_0_link_1_Control: 626 5008 [ 0 0 626 0 0 0 0 0 0 0 ] base_latency: 1
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outgoing_messages_switch_0_link_1_Data: 622 44784 [ 0 0 622 0 0 0 0 0 0 0 ] base_latency: 1
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2009-05-11 19:38:46 +02:00
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2009-07-07 00:49:48 +02:00
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switch_1_inlinks: 2
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switch_1_outlinks: 2
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2010-01-30 05:29:40 +01:00
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links_utilized_percent_switch_1: 0.158294
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links_utilized_percent_switch_1_link_0: 0.0630582 bw: 640000 base_latency: 1
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links_utilized_percent_switch_1_link_1: 0.25353 bw: 160000 base_latency: 1
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2009-05-11 19:38:46 +02:00
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2011-02-08 04:23:13 +01:00
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outgoing_messages_switch_1_link_0_Control: 626 5008 [ 0 0 626 0 0 0 0 0 0 0 ] base_latency: 1
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outgoing_messages_switch_1_link_0_Data: 622 44784 [ 0 0 622 0 0 0 0 0 0 0 ] base_latency: 1
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outgoing_messages_switch_1_link_1_Response_Data: 626 45072 [ 0 0 0 0 626 0 0 0 0 0 ] base_latency: 1
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outgoing_messages_switch_1_link_1_Writeback_Control: 622 4976 [ 0 0 0 622 0 0 0 0 0 0 ] base_latency: 1
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2009-05-11 19:38:46 +02:00
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switch_2_inlinks: 2
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switch_2_outlinks: 2
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2010-01-30 05:29:40 +01:00
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links_utilized_percent_switch_2: 0.252881
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links_utilized_percent_switch_2_link_0: 0.25353 bw: 160000 base_latency: 1
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links_utilized_percent_switch_2_link_1: 0.252233 bw: 160000 base_latency: 1
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2011-02-08 04:23:13 +01:00
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outgoing_messages_switch_2_link_0_Response_Data: 626 45072 [ 0 0 0 0 626 0 0 0 0 0 ] base_latency: 1
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outgoing_messages_switch_2_link_0_Writeback_Control: 622 4976 [ 0 0 0 622 0 0 0 0 0 0 ] base_latency: 1
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outgoing_messages_switch_2_link_1_Control: 626 5008 [ 0 0 626 0 0 0 0 0 0 0 ] base_latency: 1
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outgoing_messages_switch_2_link_1_Data: 622 44784 [ 0 0 622 0 0 0 0 0 0 0 ] base_latency: 1
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2010-01-30 05:29:40 +01:00
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2011-02-08 04:23:13 +01:00
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Cache Stats: system.ruby.cpu_ruby_ports.dcache
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system.ruby.cpu_ruby_ports.dcache_total_misses: 626
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system.ruby.cpu_ruby_ports.dcache_total_demand_misses: 626
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system.ruby.cpu_ruby_ports.dcache_total_prefetches: 0
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system.ruby.cpu_ruby_ports.dcache_total_sw_prefetches: 0
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system.ruby.cpu_ruby_ports.dcache_total_hw_prefetches: 0
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2010-01-30 05:29:40 +01:00
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2011-02-08 04:23:13 +01:00
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system.ruby.cpu_ruby_ports.dcache_request_type_LD: 39.1374%
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system.ruby.cpu_ruby_ports.dcache_request_type_ST: 13.4185%
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system.ruby.cpu_ruby_ports.dcache_request_type_IFETCH: 47.4441%
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2010-01-30 05:29:40 +01:00
|
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2011-02-08 04:23:13 +01:00
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system.ruby.cpu_ruby_ports.dcache_access_mode_type_SupervisorMode: 626 100%
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2010-01-30 05:29:40 +01:00
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2011-02-08 04:23:13 +01:00
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--- L1Cache ---
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2009-05-11 19:38:46 +02:00
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- Event Counts -
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2011-02-08 04:23:13 +01:00
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Load [415 ] 415
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Ifetch [2585 ] 2585
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Store [294 ] 294
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Data [626 ] 626
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|
|
Fwd_GETX [0 ] 0
|
|
|
|
Inv [0 ] 0
|
|
|
|
Replacement [622 ] 622
|
|
|
|
Writeback_Ack [622 ] 622
|
|
|
|
Writeback_Nack [0 ] 0
|
2009-05-11 19:38:46 +02:00
|
|
|
|
|
|
|
- Transitions -
|
2011-02-08 04:23:13 +01:00
|
|
|
I Load [245 ] 245
|
|
|
|
I Ifetch [297 ] 297
|
|
|
|
I Store [84 ] 84
|
|
|
|
I Inv [0 ] 0
|
|
|
|
I Replacement [0 ] 0
|
2009-07-07 00:49:48 +02:00
|
|
|
|
2011-02-08 04:23:13 +01:00
|
|
|
II Writeback_Nack [0 ] 0
|
2009-07-07 00:49:48 +02:00
|
|
|
|
2011-02-08 04:23:13 +01:00
|
|
|
M Load [170 ] 170
|
|
|
|
M Ifetch [2288 ] 2288
|
|
|
|
M Store [210 ] 210
|
|
|
|
M Fwd_GETX [0 ] 0
|
|
|
|
M Inv [0 ] 0
|
|
|
|
M Replacement [622 ] 622
|
2010-01-30 05:29:40 +01:00
|
|
|
|
2011-02-08 04:23:13 +01:00
|
|
|
MI Fwd_GETX [0 ] 0
|
|
|
|
MI Inv [0 ] 0
|
|
|
|
MI Writeback_Ack [622 ] 622
|
|
|
|
MI Writeback_Nack [0 ] 0
|
2010-01-30 05:29:40 +01:00
|
|
|
|
2011-02-08 04:23:13 +01:00
|
|
|
MII Fwd_GETX [0 ] 0
|
2010-01-30 05:29:40 +01:00
|
|
|
|
2011-02-08 04:23:13 +01:00
|
|
|
IS Data [542 ] 542
|
2010-01-30 05:29:40 +01:00
|
|
|
|
2011-02-08 04:23:13 +01:00
|
|
|
IM Data [84 ] 84
|
2010-01-30 05:29:40 +01:00
|
|
|
|
2011-02-08 04:23:13 +01:00
|
|
|
Memory controller: system.dir_cntrl0.memBuffer:
|
2010-01-30 05:29:40 +01:00
|
|
|
memory_total_requests: 1248
|
|
|
|
memory_reads: 626
|
|
|
|
memory_writes: 622
|
|
|
|
memory_refreshes: 258
|
|
|
|
memory_total_request_delays: 1710
|
|
|
|
memory_delays_per_request: 1.37019
|
|
|
|
memory_delays_in_input_queue: 622
|
|
|
|
memory_delays_behind_head_of_bank_queue: 3
|
|
|
|
memory_delays_stalled_at_head_of_bank_queue: 1085
|
|
|
|
memory_stalls_for_bank_busy: 404
|
|
|
|
memory_stalls_for_random_busy: 0
|
|
|
|
memory_stalls_for_anti_starvation: 0
|
|
|
|
memory_stalls_for_arbitration: 39
|
|
|
|
memory_stalls_for_bus: 620
|
|
|
|
memory_stalls_for_tfaw: 0
|
|
|
|
memory_stalls_for_read_write_turnaround: 22
|
|
|
|
memory_stalls_for_read_read_turnaround: 0
|
|
|
|
accesses_per_bank: 55 40 0 100 42 42 88 45 14 10 14 10 46 82 38 6 22 14 14 48 20 52 26 92 34 10 12 24 28 44 38 138
|
2009-05-11 19:38:46 +02:00
|
|
|
|
2011-02-08 04:23:13 +01:00
|
|
|
--- Directory ---
|
2009-05-11 19:38:46 +02:00
|
|
|
- Event Counts -
|
2011-02-08 04:23:13 +01:00
|
|
|
GETX [626 ] 626
|
|
|
|
GETS [0 ] 0
|
|
|
|
PUTX [622 ] 622
|
|
|
|
PUTX_NotOwner [0 ] 0
|
|
|
|
DMA_READ [0 ] 0
|
|
|
|
DMA_WRITE [0 ] 0
|
|
|
|
Memory_Data [626 ] 626
|
|
|
|
Memory_Ack [622 ] 622
|
2009-05-11 19:38:46 +02:00
|
|
|
|
|
|
|
- Transitions -
|
2011-02-08 04:23:13 +01:00
|
|
|
I GETX [626 ] 626
|
|
|
|
I PUTX_NotOwner [0 ] 0
|
|
|
|
I DMA_READ [0 ] 0
|
|
|
|
I DMA_WRITE [0 ] 0
|
|
|
|
|
|
|
|
M GETX [0 ] 0
|
|
|
|
M PUTX [622 ] 622
|
|
|
|
M PUTX_NotOwner [0 ] 0
|
|
|
|
M DMA_READ [0 ] 0
|
|
|
|
M DMA_WRITE [0 ] 0
|
|
|
|
|
|
|
|
M_DRD GETX [0 ] 0
|
|
|
|
M_DRD PUTX [0 ] 0
|
|
|
|
|
|
|
|
M_DWR GETX [0 ] 0
|
|
|
|
M_DWR PUTX [0 ] 0
|
|
|
|
|
|
|
|
M_DWRI GETX [0 ] 0
|
|
|
|
M_DWRI Memory_Ack [0 ] 0
|
|
|
|
|
|
|
|
M_DRDI GETX [0 ] 0
|
|
|
|
M_DRDI Memory_Ack [0 ] 0
|
|
|
|
|
|
|
|
IM GETX [0 ] 0
|
|
|
|
IM GETS [0 ] 0
|
|
|
|
IM PUTX [0 ] 0
|
|
|
|
IM PUTX_NotOwner [0 ] 0
|
|
|
|
IM DMA_READ [0 ] 0
|
|
|
|
IM DMA_WRITE [0 ] 0
|
|
|
|
IM Memory_Data [626 ] 626
|
|
|
|
|
|
|
|
MI GETX [0 ] 0
|
|
|
|
MI GETS [0 ] 0
|
|
|
|
MI PUTX [0 ] 0
|
|
|
|
MI PUTX_NotOwner [0 ] 0
|
|
|
|
MI DMA_READ [0 ] 0
|
|
|
|
MI DMA_WRITE [0 ] 0
|
|
|
|
MI Memory_Ack [622 ] 622
|
|
|
|
|
|
|
|
ID GETX [0 ] 0
|
|
|
|
ID GETS [0 ] 0
|
|
|
|
ID PUTX [0 ] 0
|
|
|
|
ID PUTX_NotOwner [0 ] 0
|
|
|
|
ID DMA_READ [0 ] 0
|
|
|
|
ID DMA_WRITE [0 ] 0
|
|
|
|
ID Memory_Data [0 ] 0
|
|
|
|
|
|
|
|
ID_W GETX [0 ] 0
|
|
|
|
ID_W GETS [0 ] 0
|
|
|
|
ID_W PUTX [0 ] 0
|
|
|
|
ID_W PUTX_NotOwner [0 ] 0
|
|
|
|
ID_W DMA_READ [0 ] 0
|
|
|
|
ID_W DMA_WRITE [0 ] 0
|
|
|
|
ID_W Memory_Ack
|