2006-06-28 17:02:14 +02:00
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/*
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2013-06-27 11:49:50 +02:00
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* Copyright (c) 2012-2013 ARM Limited
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2013-04-22 19:20:33 +02:00
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* All rights reserved.
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*
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* The license below extends only to copyright in the software and shall
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* not be construed as granting a license to any other intellectual
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* property including but not limited to intellectual property relating
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* to a hardware implementation of the functionality of the software
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* licensed hereunder. You may use the software subject to the license
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* terms below provided that you ensure that this notice is replicated
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* unmodified and in its entirety in all distributions of the software,
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* modified or unmodified, in source code or in binary form.
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*
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2014-07-28 18:23:23 +02:00
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* Copyright (c) 2003-2005,2014 The Regents of The University of Michigan
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2006-06-28 17:02:14 +02:00
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are
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* met: redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer;
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* redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution;
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* neither the name of the copyright holders nor the names of its
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* contributors may be used to endorse or promote products derived from
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* this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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* Authors: Erik Hallnor
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*/
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/**
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* @file
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2014-07-28 18:23:23 +02:00
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* Definitions of a LRU tag store.
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2006-06-28 17:02:14 +02:00
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*/
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#include "mem/cache/tags/lru.hh"
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2016-05-26 12:56:24 +02:00
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#include "debug/CacheRepl.hh"
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2011-04-15 19:44:06 +02:00
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#include "mem/cache/base.hh"
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2006-06-28 17:02:14 +02:00
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2013-06-27 11:49:50 +02:00
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LRU::LRU(const Params *p)
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2014-07-28 18:23:23 +02:00
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: BaseSetAssoc(p)
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2006-06-28 17:02:14 +02:00
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{
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}
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2015-05-05 09:22:21 +02:00
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CacheBlk*
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2017-02-21 15:14:44 +01:00
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LRU::accessBlock(Addr addr, bool is_secure, Cycles &lat)
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2006-06-28 17:02:14 +02:00
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{
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2017-02-21 15:14:44 +01:00
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CacheBlk *blk = BaseSetAssoc::accessBlock(addr, is_secure, lat);
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2014-01-24 22:29:30 +01:00
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2016-05-26 12:56:24 +02:00
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if (blk != nullptr) {
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2006-06-28 17:02:14 +02:00
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// move this block to head of the MRU list
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2014-07-28 18:23:23 +02:00
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sets[blk->set].moveToHead(blk);
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2014-01-24 22:29:30 +01:00
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DPRINTF(CacheRepl, "set %x: moving blk %x (%s) to MRU\n",
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2014-07-28 18:23:23 +02:00
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blk->set, regenerateBlkAddr(blk->tag, blk->set),
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is_secure ? "s" : "ns");
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2006-06-28 17:02:14 +02:00
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}
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return blk;
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}
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2015-05-05 09:22:21 +02:00
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CacheBlk*
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LRU::findVictim(Addr addr)
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2006-06-28 17:02:14 +02:00
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{
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2014-07-28 18:23:23 +02:00
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int set = extractSet(addr);
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2006-06-28 17:02:14 +02:00
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// grab a replacement candidate
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2016-05-26 12:56:24 +02:00
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BlkType *blk = nullptr;
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2015-07-30 09:41:42 +02:00
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for (int i = assoc - 1; i >= 0; i--) {
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BlkType *b = sets[set].blks[i];
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if (b->way < allocAssoc) {
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blk = b;
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break;
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}
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}
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assert(!blk || blk->way < allocAssoc);
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2010-02-23 18:34:22 +01:00
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2015-07-30 09:41:42 +02:00
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if (blk && blk->isValid()) {
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2007-07-14 22:28:52 +02:00
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DPRINTF(CacheRepl, "set %x: selecting blk %x for replacement\n",
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2007-06-27 07:23:10 +02:00
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set, regenerateBlkAddr(blk->tag, set));
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2008-11-04 17:35:58 +01:00
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}
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2014-07-28 18:23:23 +02:00
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2008-11-04 17:35:58 +01:00
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return blk;
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}
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void
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2013-06-27 11:49:50 +02:00
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LRU::insertBlock(PacketPtr pkt, BlkType *blk)
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2008-11-04 17:35:58 +01:00
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{
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2014-07-28 18:23:23 +02:00
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BaseSetAssoc::insertBlock(pkt, blk);
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2012-02-12 23:07:39 +01:00
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2014-07-28 18:23:23 +02:00
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int set = extractSet(pkt->getAddr());
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2008-11-04 17:35:58 +01:00
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sets[set].moveToHead(blk);
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2006-06-28 17:02:14 +02:00
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}
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void
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2015-05-05 09:22:21 +02:00
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LRU::invalidate(CacheBlk *blk)
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2006-06-28 17:02:14 +02:00
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{
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2014-07-28 18:23:23 +02:00
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BaseSetAssoc::invalidate(blk);
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2012-09-11 20:14:49 +02:00
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// should be evicted before valid blocks
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2014-07-28 18:23:23 +02:00
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int set = blk->set;
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2012-09-11 20:14:49 +02:00
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sets[set].moveToTail(blk);
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2006-06-28 17:02:14 +02:00
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}
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2014-07-28 18:23:23 +02:00
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LRU*
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2013-06-27 11:49:50 +02:00
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LRUParams::create()
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{
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return new LRU(this);
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}
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