168 lines
4.9 KiB
C++
168 lines
4.9 KiB
C++
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/*
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* Copyright (c) 2010-2012 ARM Limited
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* All rights reserved
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*
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* The license below extends only to copyright in the software and shall
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* not be construed as granting a license to any other intellectual
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* property including but not limited to intellectual property relating
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* to a hardware implementation of the functionality of the software
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* licensed hereunder. You may use the software subject to the license
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* terms below provided that you ensure that this notice is replicated
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* unmodified and in its entirety in all distributions of the software,
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* modified or unmodified, in source code or in binary form.
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*
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* Copyright (c) 2001-2005 The Regents of The University of Michigan
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are
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* met: redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer;
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* redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution;
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* neither the name of the copyright holders nor the names of its
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* contributors may be used to endorse or promote products derived from
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* this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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* Authors: Ron Dreslinski
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* Ali Saidi
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* Andreas Hansson
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*/
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#include "base/random.hh"
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#include "mem/simple_mem.hh"
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using namespace std;
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SimpleMemory::SimpleMemory(const Params* p) :
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AbstractMemory(p),
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lat(p->latency), lat_var(p->latency_var)
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{
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for (size_t i = 0; i < p->port_port_connection_count; ++i) {
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ports.push_back(new MemoryPort(csprintf("%s-port-%d", name(), i),
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*this));
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}
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}
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void
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SimpleMemory::init()
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{
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for (vector<MemoryPort*>::iterator p = ports.begin(); p != ports.end();
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++p) {
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if (!(*p)->isConnected()) {
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fatal("SimpleMemory port %s is unconnected!\n", (*p)->name());
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} else {
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(*p)->sendRangeChange();
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}
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}
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}
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Tick
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SimpleMemory::calculateLatency(PacketPtr pkt)
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{
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if (pkt->memInhibitAsserted()) {
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return 0;
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} else {
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Tick latency = lat;
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if (lat_var != 0)
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latency += random_mt.random<Tick>(0, lat_var);
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return latency;
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}
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}
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Tick
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SimpleMemory::doAtomicAccess(PacketPtr pkt)
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{
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access(pkt);
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return calculateLatency(pkt);
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}
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void
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SimpleMemory::doFunctionalAccess(PacketPtr pkt)
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{
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functionalAccess(pkt);
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}
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SlavePort &
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SimpleMemory::getSlavePort(const std::string &if_name, int idx)
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{
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if (if_name != "port") {
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return MemObject::getSlavePort(if_name, idx);
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} else {
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if (idx >= static_cast<int>(ports.size())) {
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fatal("SimpleMemory::getSlavePort: unknown index %d\n", idx);
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}
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return *ports[idx];
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}
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}
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unsigned int
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SimpleMemory::drain(Event *de)
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{
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int count = 0;
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for (vector<MemoryPort*>::iterator p = ports.begin(); p != ports.end();
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++p) {
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count += (*p)->drain(de);
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}
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if (count)
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changeState(Draining);
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else
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changeState(Drained);
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return count;
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}
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SimpleMemory::MemoryPort::MemoryPort(const std::string& _name,
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SimpleMemory& _memory)
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: SimpleTimingPort(_name, &_memory), memory(_memory)
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{ }
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AddrRangeList
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SimpleMemory::MemoryPort::getAddrRanges()
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{
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AddrRangeList ranges;
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ranges.push_back(memory.getAddrRange());
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return ranges;
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}
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Tick
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SimpleMemory::MemoryPort::recvAtomic(PacketPtr pkt)
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{
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return memory.doAtomicAccess(pkt);
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}
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void
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SimpleMemory::MemoryPort::recvFunctional(PacketPtr pkt)
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{
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pkt->pushLabel(memory.name());
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if (!queue.checkFunctional(pkt)) {
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// Default implementation of SimpleTimingPort::recvFunctional()
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// calls recvAtomic() and throws away the latency; we can save a
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// little here by just not calculating the latency.
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memory.doFunctionalAccess(pkt);
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}
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pkt->popLabel();
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}
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SimpleMemory*
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SimpleMemoryParams::create()
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{
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return new SimpleMemory(this);
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}
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