gem5/arch/sparc/isa/formats/mem.isa

////////////////////////////////////////////////////////////////////
//
// Mem instructions
//

output header {{
        /**
         * Base class for integer operations.
         */
        class Mem : public SparcStaticInst
        {
          protected:

            // Constructor
            Mem(const char *mnem, ExtMachInst _machInst, OpClass __opClass) :
                SparcStaticInst(mnem, _machInst, __opClass)
            {
            }

            std::string generateDisassembly(Addr pc,
                    const SymbolTable *symtab) const;
        };
}};

output decoder {{
        std::string Mem::generateDisassembly(Addr pc, const SymbolTable *symtab) const
        {
            return "Memory instruction\n";
        }
}};

def template MemExecute {{
        Fault %(class_name)s::execute(%(CPU_exec_context)s *xc,
                Trace::InstRecord *traceData) const
        {
            Fault fault = NoFault;
            Addr EA;
            %(op_decl)s;
            %(op_rd)s;
            %(ea_code)s;
            %(code)s;

            if(fault == NoFault)
            {
                //Write the resulting state to the execution context
                %(op_wb)s;
            }

            return fault;
        }
}};

// Primary format for integer operate instructions:
def format Mem(code, *opt_flags) {{
        addrCalc = 'EA = I ? (Rs1 + SIMM13) : Rs1 + Rs2;'
        composite = code + '\n' + addrCalc
        origCodeBlk = CodeBlock(code)
        compositeBlk = CodeBlock(composite)
        addrCalcBlk = CodeBlock(addrCalc)
        iop = InstObjParams(name, Name, 'SparcStaticInst', compositeBlk, opt_flags)
        iop.code = origCodeBlk.code
        iop.orig_code = origCodeBlk.orig_code
        iop.ea_code = addrCalcBlk.code
        header_output = BasicDeclare.subst(iop)
        decoder_output = BasicConstructor.subst(iop)
        decode_block = BasicDecode.subst(iop)
        exec_output = MemExecute.subst(iop)
}};