133 lines
3 KiB
Text
133 lines
3 KiB
Text
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/*
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* Copyright (c) 2015 ARM Limited
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* All rights reserved
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are
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* met: redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer;
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* redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution;
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* neither the name of the copyright holders nor the names of its
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* contributors may be used to endorse or promote products derived from
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* this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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* Authors: Andreas Sandberg
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*/
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/dts-v1/;
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/memreserve/ 0x80000000 0x00010000;
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#include CONF_PLATFORM
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#define CPU(n) \
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cpu@ ## n { \
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device_type = "cpu"; \
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compatible = "gem5,armv8", "arm,armv8"; \
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reg = < n >; \
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enable-method = "spin-table"; \
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cpu-release-addr = <0 0x8000fff8>; \
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};
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/ {
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model = "V2P-AARCH64";
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compatible = "arm,vexpress,v2p-aarch64", "arm,vexpress";
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memory@80000000 {
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device_type = "memory";
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reg = <0 0x80000000 0x4 0x00000000>;
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};
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cpus {
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#address-cells = <1>;
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#size-cells = <0>;
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#if CONF_CPUS > 0
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CPU(0)
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#endif
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#if CONF_CPUS > 1
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CPU(1)
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#endif
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#if CONF_CPUS > 2
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CPU(2)
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#endif
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#if CONF_CPUS > 3
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CPU(3)
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#endif
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#if CONF_CPUS > 4
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CPU(4)
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#endif
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#if CONF_CPUS > 5
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CPU(5)
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#endif
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#if CONF_CPUS > 6
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CPU(6)
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#endif
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#if CONF_CPUS > 7
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CPU(7)
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#endif
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#if CONF_CPUS > 8
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CPU(8)
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#endif
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#if CONF_CPUS > 9
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CPU(9)
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#endif
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#if CONF_CPUS > 10
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CPU(10)
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#endif
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#if CONF_CPUS > 11
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CPU(11)
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#endif
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#if CONF_CPUS > 12
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CPU(12)
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#endif
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#if CONF_CPUS > 13
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CPU(13)
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#endif
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#if CONF_CPUS > 14
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CPU(14)
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#endif
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#if CONF_CPUS > 15
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CPU(15)
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#endif
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#if CONF_CPUS > 16
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#error Unsupported number of CPUs
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#endif
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};
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};
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&hdlcd0 {
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status = "ok";
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display-timings {
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native-mode = <&timing0>;
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timing0: timing_1080p60 {
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/* 1920x1080-60 */
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clock-frequency = <148500>;
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hactive = <1920>;
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vactive = <1080>;
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hfront-porch = <148>;
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hback-porch = <88>;
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hsync-len = <44>;
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vfront-porch = <36>;
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vback-porch = <4>;
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vsync-len = <5>;
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};
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};
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};
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