2004-06-10 07:02:33 +02:00
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/*
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2005-06-05 11:16:00 +02:00
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* Copyright (c) 2004-2005 The Regents of The University of Michigan
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2004-06-10 07:02:33 +02:00
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are
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* met: redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer;
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* redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution;
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* neither the name of the copyright holders nor the names of its
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* contributors may be used to endorse or promote products derived from
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* this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#include <map>
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#include <stack>
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#include <string>
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2006-02-27 10:05:02 +01:00
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#include "arch/alpha/osfpal.hh"
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2004-06-10 07:02:33 +02:00
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#include "base/trace.hh"
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#include "cpu/exec_context.hh"
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#include "kern/kernel_stats.hh"
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2004-10-23 04:49:12 +02:00
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#include "kern/tru64/tru64_syscalls.hh"
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2004-06-10 07:02:33 +02:00
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using namespace std;
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using namespace Stats;
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2004-08-20 17:35:31 +02:00
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namespace Kernel {
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2004-06-10 07:02:33 +02:00
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2004-09-03 20:12:59 +02:00
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const char *modestr[] = { "kernel", "user", "idle", "interrupt" };
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2004-08-20 17:35:31 +02:00
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Statistics::Statistics(ExecContext *context)
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: xc(context), idleProcess((Addr)-1), themode(kernel), lastModeTick(0),
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iplLast(0), iplLastTick(0)
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{
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2004-09-03 20:12:59 +02:00
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bin_int = xc->system->params->bin_int;
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2004-08-20 17:35:31 +02:00
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}
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2004-06-10 07:02:33 +02:00
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void
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2004-08-20 17:35:31 +02:00
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Statistics::regStats(const string &_name)
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2004-06-10 07:02:33 +02:00
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{
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2004-08-20 17:35:31 +02:00
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myname = _name;
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2004-06-10 07:02:33 +02:00
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_arm
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2004-08-20 17:35:31 +02:00
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.name(name() + ".inst.arm")
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2004-06-10 07:02:33 +02:00
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.desc("number of arm instructions executed")
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;
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_quiesce
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2004-08-20 17:35:31 +02:00
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.name(name() + ".inst.quiesce")
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2004-06-10 07:02:33 +02:00
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.desc("number of quiesce instructions executed")
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;
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_ivlb
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2004-08-20 17:35:31 +02:00
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.name(name() + ".inst.ivlb")
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2004-06-10 07:02:33 +02:00
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.desc("number of ivlb instructions executed")
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;
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_ivle
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2004-08-20 17:35:31 +02:00
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.name(name() + ".inst.ivle")
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2004-06-10 07:02:33 +02:00
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.desc("number of ivle instructions executed")
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;
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_hwrei
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2004-08-20 17:35:31 +02:00
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.name(name() + ".inst.hwrei")
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2004-06-10 07:02:33 +02:00
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.desc("number of hwrei instructions executed")
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;
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_iplCount
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.init(32)
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2004-08-20 17:35:31 +02:00
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.name(name() + ".ipl_count")
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2004-06-10 07:02:33 +02:00
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.desc("number of times we switched to this ipl")
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.flags(total | pdf | nozero | nonan)
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;
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_iplGood
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.init(32)
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2004-08-20 17:35:31 +02:00
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.name(name() + ".ipl_good")
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2004-06-10 07:02:33 +02:00
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.desc("number of times we switched to this ipl from a different ipl")
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.flags(total | pdf | nozero | nonan)
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;
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_iplTicks
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.init(32)
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2004-08-20 17:35:31 +02:00
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.name(name() + ".ipl_ticks")
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2004-06-10 07:02:33 +02:00
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.desc("number of cycles we spent at this ipl")
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.flags(total | pdf | nozero | nonan)
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;
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_iplUsed
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2004-08-20 17:35:31 +02:00
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.name(name() + ".ipl_used")
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2004-06-10 07:02:33 +02:00
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.desc("fraction of swpipl calls that actually changed the ipl")
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.flags(total | nozero | nonan)
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;
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_iplUsed = _iplGood / _iplCount;
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_callpal
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.init(256)
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2004-08-20 17:35:31 +02:00
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.name(name() + ".callpal")
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2004-06-10 07:02:33 +02:00
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.desc("number of callpals executed")
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.flags(total | pdf | nozero | nonan)
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;
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for (int i = 0; i < PAL::NumCodes; ++i) {
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const char *str = PAL::name(i);
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if (str)
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_callpal.subname(i, str);
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}
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_syscall
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.init(SystemCalls<Tru64>::Number)
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2004-08-20 17:35:31 +02:00
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.name(name() + ".syscall")
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2004-06-10 07:02:33 +02:00
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.desc("number of syscalls executed")
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.flags(total | pdf | nozero | nonan)
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;
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for (int i = 0; i < SystemCalls<Tru64>::Number; ++i) {
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const char *str = SystemCalls<Tru64>::name(i);
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if (str) {
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_syscall.subname(i, str);
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}
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}
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2006-02-24 07:51:45 +01:00
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/* _faults
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Changed the fault enum into a class, and fixed everything up to work with it. Next, the faults need to be pulled out of all the other code so that they are only used to communicate between the CPU and the ISA.
SConscript:
The new faults.cc file in sim allocates the system wide faults. When these faults are generated through a function interface in the ISA, this file may go away.
arch/alpha/alpha_memory.cc:
Changed Fault to Fault * and took the underscores out of fault names.
arch/alpha/alpha_memory.hh:
Changed Fault to Fault *. Also, added an include for the alpha faults.
arch/alpha/ev5.cc:
Changed the fault_addr array into a fault_addr function. Once all of the faults can be expected to have the same type, fault_addr can go away completely and the info it provided will come from the fault itself. Also, Fault was changed to Fault *, and underscores were taken out of fault names.
arch/alpha/isa/decoder.isa:
Changed Fault to Fault * and took the underscores out fault names.
arch/alpha/isa/fp.isa:
Changed Fault to Fault *, and took the underscores out of fault names.
arch/alpha/isa/main.isa:
Changed Fault to Fault *, removed underscores from fault names, and made an include of the alpha faults show up in all the generated files.
arch/alpha/isa/mem.isa:
Changed Fault to Fault * and removed underscores from fault names.
arch/alpha/isa/unimp.isa:
arch/alpha/isa/unknown.isa:
cpu/exec_context.hh:
cpu/ozone/cpu.hh:
cpu/simple/cpu.cc:
dev/alpha_console.cc:
dev/ide_ctrl.cc:
dev/isa_fake.cc:
dev/pciconfigall.cc:
dev/pcidev.cc:
dev/pcidev.hh:
dev/tsunami_cchip.cc:
dev/tsunami_io.cc:
dev/tsunami_pchip.cc:
Changed Fault to Fault *, and removed underscores from fault names.
arch/alpha/isa_traits.hh:
Changed the include of arch/alpha/faults.hh to sim/faults.hh, since the alpha faults weren't needed.
cpu/base_dyn_inst.cc:
Changed Fault to Fault *, and removed underscores from fault names. This file probably shouldn't use the Unimplemented Opcode fault.
cpu/base_dyn_inst.hh:
Changed Fault to Fault * and took the underscores out of the fault names.
cpu/exec_context.cc:
cpu/o3/alpha_dyn_inst.hh:
cpu/o3/alpha_dyn_inst_impl.hh:
cpu/o3/fetch.hh:
dev/alpha_console.hh:
dev/baddev.hh:
dev/ide_ctrl.hh:
dev/isa_fake.hh:
dev/ns_gige.hh:
dev/pciconfigall.hh:
dev/sinic.hh:
dev/tsunami_cchip.hh:
dev/tsunami_io.hh:
dev/tsunami_pchip.hh:
dev/uart.hh:
dev/uart8250.hh:
Changed Fault to Fault *.
cpu/o3/alpha_cpu.hh:
Changed Fault to Fault *, removed underscores from fault names.
cpu/o3/alpha_cpu_impl.hh:
Changed Fault to Fault *, removed underscores from fault names, and changed the fault_addr array to the fault_addr function. Once all faults are from the ISA, this function will probably go away.
cpu/o3/commit_impl.hh:
cpu/o3/fetch_impl.hh:
dev/baddev.cc:
Changed Fault to Fault *, and removed underscores from the fault names.
cpu/o3/regfile.hh:
Added an include for the alpha specific faults which will hopefully go away once the ipr stuff is moved, changed Fault to Fault *, and removed the underscores from fault names.
cpu/simple/cpu.hh:
Changed Fault to Fault *
dev/ns_gige.cc:
Changed Fault to Fault *, and removdd underscores from fault names.
dev/sinic.cc:
Changed Fault to Fault *, and removed the underscores from fault names.
dev/uart8250.cc:
Chanted Fault to Fault *, and removed underscores from fault names.
kern/kernel_stats.cc:
Removed underscores from fault names, and from NumFaults.
kern/kernel_stats.hh:
Changed the predeclaration of Fault from an enum to a class, and changd the "fault" function to work with the classes instead of the enum. Once there are no system wide faults anymore, this code will simplify back to something like it was originally.
sim/faults.cc:
This allocates the system wide faults.
sim/faults.hh:
This declares the system wide faults.
sim/syscall_emul.cc:
sim/syscall_emul.hh:
Removed the underscores from fault names.
--HG--
rename : arch/alpha/faults.cc => sim/faults.cc
rename : arch/alpha/faults.hh => sim/faults.hh
extra : convert_revision : 253d39258237333ae8ec4d8047367cb3ea68569d
2006-02-16 07:22:51 +01:00
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.init(NumFaults)
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2004-08-20 17:35:31 +02:00
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.name(name() + ".faults")
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2004-06-10 07:02:33 +02:00
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.desc("number of faults")
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.flags(total | pdf | nozero | nonan)
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;
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Changed the fault enum into a class, and fixed everything up to work with it. Next, the faults need to be pulled out of all the other code so that they are only used to communicate between the CPU and the ISA.
SConscript:
The new faults.cc file in sim allocates the system wide faults. When these faults are generated through a function interface in the ISA, this file may go away.
arch/alpha/alpha_memory.cc:
Changed Fault to Fault * and took the underscores out of fault names.
arch/alpha/alpha_memory.hh:
Changed Fault to Fault *. Also, added an include for the alpha faults.
arch/alpha/ev5.cc:
Changed the fault_addr array into a fault_addr function. Once all of the faults can be expected to have the same type, fault_addr can go away completely and the info it provided will come from the fault itself. Also, Fault was changed to Fault *, and underscores were taken out of fault names.
arch/alpha/isa/decoder.isa:
Changed Fault to Fault * and took the underscores out fault names.
arch/alpha/isa/fp.isa:
Changed Fault to Fault *, and took the underscores out of fault names.
arch/alpha/isa/main.isa:
Changed Fault to Fault *, removed underscores from fault names, and made an include of the alpha faults show up in all the generated files.
arch/alpha/isa/mem.isa:
Changed Fault to Fault * and removed underscores from fault names.
arch/alpha/isa/unimp.isa:
arch/alpha/isa/unknown.isa:
cpu/exec_context.hh:
cpu/ozone/cpu.hh:
cpu/simple/cpu.cc:
dev/alpha_console.cc:
dev/ide_ctrl.cc:
dev/isa_fake.cc:
dev/pciconfigall.cc:
dev/pcidev.cc:
dev/pcidev.hh:
dev/tsunami_cchip.cc:
dev/tsunami_io.cc:
dev/tsunami_pchip.cc:
Changed Fault to Fault *, and removed underscores from fault names.
arch/alpha/isa_traits.hh:
Changed the include of arch/alpha/faults.hh to sim/faults.hh, since the alpha faults weren't needed.
cpu/base_dyn_inst.cc:
Changed Fault to Fault *, and removed underscores from fault names. This file probably shouldn't use the Unimplemented Opcode fault.
cpu/base_dyn_inst.hh:
Changed Fault to Fault * and took the underscores out of the fault names.
cpu/exec_context.cc:
cpu/o3/alpha_dyn_inst.hh:
cpu/o3/alpha_dyn_inst_impl.hh:
cpu/o3/fetch.hh:
dev/alpha_console.hh:
dev/baddev.hh:
dev/ide_ctrl.hh:
dev/isa_fake.hh:
dev/ns_gige.hh:
dev/pciconfigall.hh:
dev/sinic.hh:
dev/tsunami_cchip.hh:
dev/tsunami_io.hh:
dev/tsunami_pchip.hh:
dev/uart.hh:
dev/uart8250.hh:
Changed Fault to Fault *.
cpu/o3/alpha_cpu.hh:
Changed Fault to Fault *, removed underscores from fault names.
cpu/o3/alpha_cpu_impl.hh:
Changed Fault to Fault *, removed underscores from fault names, and changed the fault_addr array to the fault_addr function. Once all faults are from the ISA, this function will probably go away.
cpu/o3/commit_impl.hh:
cpu/o3/fetch_impl.hh:
dev/baddev.cc:
Changed Fault to Fault *, and removed underscores from the fault names.
cpu/o3/regfile.hh:
Added an include for the alpha specific faults which will hopefully go away once the ipr stuff is moved, changed Fault to Fault *, and removed the underscores from fault names.
cpu/simple/cpu.hh:
Changed Fault to Fault *
dev/ns_gige.cc:
Changed Fault to Fault *, and removdd underscores from fault names.
dev/sinic.cc:
Changed Fault to Fault *, and removed the underscores from fault names.
dev/uart8250.cc:
Chanted Fault to Fault *, and removed underscores from fault names.
kern/kernel_stats.cc:
Removed underscores from fault names, and from NumFaults.
kern/kernel_stats.hh:
Changed the predeclaration of Fault from an enum to a class, and changd the "fault" function to work with the classes instead of the enum. Once there are no system wide faults anymore, this code will simplify back to something like it was originally.
sim/faults.cc:
This allocates the system wide faults.
sim/faults.hh:
This declares the system wide faults.
sim/syscall_emul.cc:
sim/syscall_emul.hh:
Removed the underscores from fault names.
--HG--
rename : arch/alpha/faults.cc => sim/faults.cc
rename : arch/alpha/faults.hh => sim/faults.hh
extra : convert_revision : 253d39258237333ae8ec4d8047367cb3ea68569d
2006-02-16 07:22:51 +01:00
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for (int i = 1; i < NumFaults; ++i) {
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const char *str = (*ListOfFaults[i])->name;
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2004-06-10 07:02:33 +02:00
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if (str)
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_faults.subname(i, str);
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2006-02-24 07:51:45 +01:00
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}*/
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2004-06-10 07:02:33 +02:00
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_mode
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2004-09-03 20:12:59 +02:00
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.init(cpu_mode_num)
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2004-08-20 17:35:31 +02:00
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.name(name() + ".mode_switch")
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2004-06-10 07:02:33 +02:00
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.desc("number of protection mode switches")
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;
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2004-09-03 20:12:59 +02:00
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for (int i = 0; i < cpu_mode_num; ++i)
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2004-08-20 17:35:31 +02:00
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_mode.subname(i, modestr[i]);
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2004-06-10 07:02:33 +02:00
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_modeGood
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2004-09-03 20:12:59 +02:00
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.init(cpu_mode_num)
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2004-08-20 17:35:31 +02:00
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.name(name() + ".mode_good")
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2004-06-10 07:02:33 +02:00
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;
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2004-09-03 20:12:59 +02:00
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for (int i = 0; i < cpu_mode_num; ++i)
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2004-08-20 17:35:31 +02:00
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_modeGood.subname(i, modestr[i]);
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2004-06-10 07:02:33 +02:00
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_modeFraction
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2004-08-20 17:35:31 +02:00
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.name(name() + ".mode_switch_good")
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2004-06-10 07:02:33 +02:00
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.desc("fraction of useful protection mode switches")
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.flags(total)
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;
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2004-08-20 17:35:31 +02:00
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2004-09-03 20:12:59 +02:00
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for (int i = 0; i < cpu_mode_num; ++i)
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2004-08-20 17:35:31 +02:00
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_modeFraction.subname(i, modestr[i]);
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2004-06-10 07:02:33 +02:00
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_modeFraction = _modeGood / _mode;
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_modeTicks
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2004-09-03 20:12:59 +02:00
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.init(cpu_mode_num)
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2004-08-20 17:35:31 +02:00
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.name(name() + ".mode_ticks")
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2004-06-10 07:02:33 +02:00
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.desc("number of ticks spent at the given mode")
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.flags(pdf)
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;
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2004-09-03 20:12:59 +02:00
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for (int i = 0; i < cpu_mode_num; ++i)
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2004-08-20 17:35:31 +02:00
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_modeTicks.subname(i, modestr[i]);
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2004-06-10 07:02:33 +02:00
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_swap_context
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2004-08-20 17:35:31 +02:00
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.name(name() + ".swap_context")
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2004-06-10 07:02:33 +02:00
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.desc("number of times the context was actually changed")
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;
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}
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void
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2004-08-20 17:35:31 +02:00
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Statistics::setIdleProcess(Addr idlepcbb)
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{
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2004-09-03 20:12:59 +02:00
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assert(themode == kernel || themode == interrupt);
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2004-08-20 17:35:31 +02:00
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idleProcess = idlepcbb;
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themode = idle;
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|
changeMode(themode);
|
|
|
|
}
|
2004-06-10 07:02:33 +02:00
|
|
|
|
|
|
|
void
|
2004-08-20 17:35:31 +02:00
|
|
|
Statistics::changeMode(cpu_mode newmode)
|
|
|
|
{
|
|
|
|
_mode[newmode]++;
|
2004-06-10 07:02:33 +02:00
|
|
|
|
2004-08-20 17:35:31 +02:00
|
|
|
if (newmode == themode)
|
|
|
|
return;
|
2004-06-10 07:02:33 +02:00
|
|
|
|
2004-08-20 17:35:31 +02:00
|
|
|
DPRINTF(Context, "old mode=%-8s new mode=%-8s\n",
|
|
|
|
modestr[themode], modestr[newmode]);
|
2004-06-10 07:02:33 +02:00
|
|
|
|
2004-08-20 17:35:31 +02:00
|
|
|
_modeGood[newmode]++;
|
|
|
|
_modeTicks[themode] += curTick - lastModeTick;
|
2004-06-10 07:02:33 +02:00
|
|
|
|
2004-08-20 17:35:31 +02:00
|
|
|
xc->system->kernelBinning->changeMode(newmode);
|
2004-06-10 07:02:33 +02:00
|
|
|
|
2004-08-20 17:35:31 +02:00
|
|
|
lastModeTick = curTick;
|
|
|
|
themode = newmode;
|
|
|
|
}
|
2004-06-10 07:02:33 +02:00
|
|
|
|
|
|
|
void
|
2004-08-20 17:35:31 +02:00
|
|
|
Statistics::swpipl(int ipl)
|
2004-06-10 07:02:33 +02:00
|
|
|
{
|
|
|
|
assert(ipl >= 0 && ipl <= 0x1f && "invalid IPL\n");
|
|
|
|
|
|
|
|
_iplCount[ipl]++;
|
|
|
|
|
|
|
|
if (ipl == iplLast)
|
|
|
|
return;
|
|
|
|
|
|
|
|
_iplGood[ipl]++;
|
|
|
|
_iplTicks[iplLast] += curTick - iplLastTick;
|
|
|
|
iplLastTick = curTick;
|
|
|
|
iplLast = ipl;
|
|
|
|
}
|
|
|
|
|
|
|
|
void
|
2004-09-03 20:12:59 +02:00
|
|
|
Statistics::mode(cpu_mode newmode)
|
2004-06-10 07:02:33 +02:00
|
|
|
{
|
Changes to put all the misc regs within the misc reg file. This includes the FPCR, Uniq, lock flag, lock addr, and IPRs.
They are now accessed by calling readMiscReg()/setMiscReg() on the XC. Old IPR accesses are supported by using readMiscRegWithEffect() and setMiscRegWithEffect() (names may change in the future).
arch/alpha/alpha_memory.cc:
Change accesses to IPR to go through the XC.
arch/alpha/ev5.cc:
Change accesses for IPRs to go through the misc regs.
arch/alpha/isa/decoder.isa:
Change accesses to IPRs to go through the misc regs. readIpr() and setIpr() are now changed to calls to readMiscRegWithEffect() and setMiscRegWithEffect().
arch/alpha/isa/fp.isa:
Change accesses to IPRs and Fpcr to go through the misc regs.
arch/alpha/isa/main.isa:
Add support for all misc regs being accessed through readMiscReg() and setMiscReg(). Instead of readUniq and readFpcr, they are replaced by calls with Uniq_DepTag and Fpcr_DepTag passed in as the register index.
arch/alpha/isa_traits.hh:
Change the MiscRegFile to a class that handles all accesses to MiscRegs, which in Alpha include the FPCR, Uniq, Lock Addr, Lock Flag, and IPRs.
Two flavors of accesses are supported: normal register reads/writes, and reads/writes with effect. The latter are basically the original read/write IPR functions, while the former are normal reads/writes.
The lock flag and lock addr registers are added to the dependence tags in order to support being accessed through the misc regs.
arch/alpha/stacktrace.cc:
cpu/simple/cpu.cc:
dev/sinic.cc:
Change accesses to the IPRs to go through the XC.
arch/alpha/vtophys.cc:
Change access to the IPR to go through the XC.
arch/isa_parser.py:
Change generation of code for control registers to use the readMiscReg and setMiscReg functions.
base/remote_gdb.cc:
Change accesses to the IPR to go through the XC.
cpu/exec_context.hh:
Use the miscRegs to access the lock addr, lock flag, and other misc registers.
cpu/o3/alpha_cpu.hh:
cpu/simple/cpu.hh:
Support interface for reading and writing misc registers, which replaces readUniq, readFpcr, readIpr, and their set functions.
cpu/o3/alpha_cpu_impl.hh:
Change accesses to the IPRs to go through the miscRegs.
For now comment out some of the accesses to the misc regs until the proxy exec context is completed.
cpu/o3/alpha_dyn_inst.hh:
Change accesses to misc regs to use readMiscReg and setMiscReg.
cpu/o3/alpha_dyn_inst_impl.hh:
Remove old misc reg accessors.
cpu/o3/cpu.cc:
Comment out old misc reg accesses until the proxy exec context is completed.
cpu/o3/cpu.hh:
Change accesses to the misc regs.
cpu/o3/regfile.hh:
Remove old access methods for the misc regs, replace them with readMiscReg and setMiscReg. They are dummy functions for now until the proxy exec context is completed.
kern/kernel_stats.cc:
kern/system_events.cc:
Have accesses to the IPRs go through the XC.
kern/tru64/tru64.hh:
Have accesses to the misc regs use the new access methods.
--HG--
extra : convert_revision : e32e0a3fe99522e17294bbe106ff5591cb1a9d76
2006-02-27 17:44:35 +01:00
|
|
|
Addr pcbb = xc->readMiscReg(AlphaISA::IPR_PALtemp23);
|
2004-06-10 07:02:33 +02:00
|
|
|
|
2004-09-03 20:12:59 +02:00
|
|
|
if ((newmode == kernel || newmode == interrupt) &&
|
|
|
|
pcbb == idleProcess)
|
2004-08-20 17:35:31 +02:00
|
|
|
newmode = idle;
|
2004-06-10 07:02:33 +02:00
|
|
|
|
2004-09-03 20:12:59 +02:00
|
|
|
if (bin_int == false && newmode == interrupt)
|
|
|
|
newmode = kernel;
|
|
|
|
|
2004-08-20 17:35:31 +02:00
|
|
|
changeMode(newmode);
|
|
|
|
}
|
|
|
|
|
|
|
|
void
|
|
|
|
Statistics::context(Addr oldpcbb, Addr newpcbb)
|
|
|
|
{
|
|
|
|
assert(themode != user);
|
|
|
|
|
|
|
|
_swap_context++;
|
|
|
|
changeMode(newpcbb == idleProcess ? idle : kernel);
|
2004-06-10 07:02:33 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
void
|
2004-08-20 17:35:31 +02:00
|
|
|
Statistics::callpal(int code)
|
2004-06-10 07:02:33 +02:00
|
|
|
{
|
|
|
|
if (!PAL::name(code))
|
|
|
|
return;
|
|
|
|
|
|
|
|
_callpal[code]++;
|
|
|
|
|
|
|
|
switch (code) {
|
2004-08-20 17:35:31 +02:00
|
|
|
case PAL::callsys: {
|
|
|
|
int number = xc->regs.intRegFile[0];
|
|
|
|
if (SystemCalls<Tru64>::validSyscallNumber(number)) {
|
|
|
|
int cvtnum = SystemCalls<Tru64>::convert(number);
|
|
|
|
_syscall[cvtnum]++;
|
|
|
|
}
|
|
|
|
} break;
|
|
|
|
|
|
|
|
case PAL::swpctx:
|
|
|
|
if (xc->system->kernelBinning)
|
|
|
|
xc->system->kernelBinning->palSwapContext(xc);
|
2004-06-10 07:02:33 +02:00
|
|
|
break;
|
|
|
|
}
|
2004-08-20 17:35:31 +02:00
|
|
|
}
|
2004-06-10 07:02:33 +02:00
|
|
|
|
2004-08-20 17:35:31 +02:00
|
|
|
void
|
|
|
|
Statistics::serialize(ostream &os)
|
|
|
|
{
|
|
|
|
int exemode = themode;
|
|
|
|
SERIALIZE_SCALAR(exemode);
|
2004-10-02 18:34:54 +02:00
|
|
|
SERIALIZE_SCALAR(idleProcess);
|
2004-10-02 18:43:59 +02:00
|
|
|
SERIALIZE_SCALAR(iplLast);
|
|
|
|
SERIALIZE_SCALAR(iplLastTick);
|
|
|
|
SERIALIZE_SCALAR(lastModeTick);
|
2004-08-20 17:35:31 +02:00
|
|
|
}
|
2004-06-10 07:02:33 +02:00
|
|
|
|
2004-08-20 17:35:31 +02:00
|
|
|
void
|
|
|
|
Statistics::unserialize(Checkpoint *cp, const string §ion)
|
|
|
|
{
|
|
|
|
int exemode;
|
|
|
|
UNSERIALIZE_SCALAR(exemode);
|
2004-10-02 18:34:54 +02:00
|
|
|
UNSERIALIZE_SCALAR(idleProcess);
|
2004-10-02 18:43:59 +02:00
|
|
|
UNSERIALIZE_SCALAR(iplLast);
|
|
|
|
UNSERIALIZE_SCALAR(iplLastTick);
|
|
|
|
UNSERIALIZE_SCALAR(lastModeTick);
|
2004-08-20 17:35:31 +02:00
|
|
|
themode = (cpu_mode)exemode;
|
2004-06-10 07:02:33 +02:00
|
|
|
}
|
2004-08-20 17:35:31 +02:00
|
|
|
|
|
|
|
/* end namespace Kernel */ }
|