2007-09-20 03:27:55 +02:00
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// Copyright (c) 2007 The Hewlett-Packard Development Company
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2013-03-11 19:15:46 +01:00
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// Copyright (c) 2012-2013 Mark D. Hill and David A. Wood
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2007-09-20 03:27:55 +02:00
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// All rights reserved.
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//
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2010-05-24 07:44:15 +02:00
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// The license below extends only to copyright in the software and shall
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// not be construed as granting a license to any other intellectual
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// property including but not limited to intellectual property relating
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// to a hardware implementation of the functionality of the software
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// licensed hereunder. You may use the software subject to the license
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// terms below provided that you ensure that this notice is replicated
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// unmodified and in its entirety in all distributions of the software,
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// modified or unmodified, in source code or in binary form.
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2007-09-20 03:27:55 +02:00
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//
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2010-05-24 07:44:15 +02:00
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// Redistribution and use in source and binary forms, with or without
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// modification, are permitted provided that the following conditions are
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// met: redistributions of source code must retain the above copyright
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// notice, this list of conditions and the following disclaimer;
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// redistributions in binary form must reproduce the above copyright
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// notice, this list of conditions and the following disclaimer in the
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// documentation and/or other materials provided with the distribution;
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// neither the name of the copyright holders nor the names of its
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2007-09-20 03:27:55 +02:00
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// contributors may be used to endorse or promote products derived from
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// this software without specific prior written permission.
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2007-09-20 03:27:55 +02:00
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//
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// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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//
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// Authors: Gabe Black
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2013-03-11 19:15:46 +01:00
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// Nilay Vaish
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2007-09-20 03:27:55 +02:00
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//////////////////////////////////////////////////////////////////////////
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//
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// FpOp Microop templates
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//
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//////////////////////////////////////////////////////////////////////////
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def template MicroFpOpExecute {{
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Fault %(class_name)s::execute(%(CPU_exec_context)s *xc,
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Trace::InstRecord *traceData) const
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{
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Fault fault = NoFault;
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DPRINTF(X86, "The data size is %d\n", dataSize);
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%(op_decl)s;
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%(op_rd)s;
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if(%(cond_check)s)
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{
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%(code)s;
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%(flag_code)s;
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%(top_code)s;
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}
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else
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{
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%(else_code)s;
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}
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//Write the resulting state to the execution context
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if(fault == NoFault)
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{
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%(op_wb)s;
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}
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return fault;
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}
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}};
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def template MicroFpOpDeclare {{
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class %(class_name)s : public %(base_class)s
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{
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public:
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%(class_name)s(ExtMachInst _machInst,
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const char * instMnem, uint64_t setFlags,
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InstRegIndex _src1, InstRegIndex _src2, InstRegIndex _dest,
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uint8_t _dataSize, int8_t _spm);
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%(BasicExecDeclare)s
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};
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}};
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def template MicroFpOpConstructor {{
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inline %(class_name)s::%(class_name)s(
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ExtMachInst machInst, const char * instMnem, uint64_t setFlags,
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InstRegIndex _src1, InstRegIndex _src2, InstRegIndex _dest,
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uint8_t _dataSize, int8_t _spm) :
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%(base_class)s(machInst, "%(mnemonic)s", instMnem, setFlags,
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_src1, _src2, _dest, _dataSize, _spm,
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%(op_class)s)
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{
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%(constructor)s;
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}
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}};
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let {{
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# Make these empty strings so that concatenating onto
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# them will always work.
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header_output = ""
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decoder_output = ""
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exec_output = ""
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class FpOpMeta(type):
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def buildCppClasses(self, name, Name, suffix, \
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code, flag_code, cond_check, else_code, op_class):
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# Globals to stick the output in
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global header_output
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global decoder_output
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global exec_output
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# Stick all the code together so it can be searched at once
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allCode = "|".join((code, flag_code, cond_check, else_code))
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# If there's something optional to do with flags, generate
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# a version without it and fix up this version to use it.
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if flag_code is not "" or cond_check is not "true":
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self.buildCppClasses(name, Name, suffix,
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code, "", "true", else_code, op_class)
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suffix = "Flags" + suffix
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base = "X86ISA::FpOp"
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# Get everything ready for the substitution
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iop_top = InstObjParams(name, Name + suffix + "Top", base,
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{"code" : code,
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"flag_code" : flag_code,
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"cond_check" : cond_check,
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"else_code" : else_code,
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"top_code" : "TOP = (TOP + spm + 8) % 8;",
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"op_class" : op_class})
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iop = InstObjParams(name, Name + suffix, base,
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{"code" : code,
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"flag_code" : flag_code,
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"cond_check" : cond_check,
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"else_code" : else_code,
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"top_code" : ";",
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"op_class" : op_class})
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# Generate the actual code (finally!)
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header_output += MicroFpOpDeclare.subst(iop_top)
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decoder_output += MicroFpOpConstructor.subst(iop_top)
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exec_output += MicroFpOpExecute.subst(iop_top)
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header_output += MicroFpOpDeclare.subst(iop)
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decoder_output += MicroFpOpConstructor.subst(iop)
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exec_output += MicroFpOpExecute.subst(iop)
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def __new__(mcls, Name, bases, dict):
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abstract = False
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name = Name.lower()
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if "abstract" in dict:
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abstract = dict['abstract']
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del dict['abstract']
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cls = super(FpOpMeta, mcls).__new__(mcls, Name, bases, dict)
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if not abstract:
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cls.className = Name
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cls.mnemonic = name
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code = cls.code
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flag_code = cls.flag_code
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cond_check = cls.cond_check
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else_code = cls.else_code
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op_class = cls.op_class
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# Set up the C++ classes
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mcls.buildCppClasses(cls, name, Name, "",
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code, flag_code, cond_check, else_code, op_class)
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# Hook into the microassembler dict
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global microopClasses
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microopClasses[name] = cls
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return cls
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2012-12-30 19:45:45 +01:00
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class FpUnaryOp(X86Microop):
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__metaclass__ = FpOpMeta
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# This class itself doesn't act as a microop
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abstract = True
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# Default template parameter values
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flag_code = ""
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cond_check = "true"
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else_code = ";"
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op_class = "FloatAddOp"
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def __init__(self, dest, src1, spm=0, \
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SetStatus=False, dataSize="env.dataSize"):
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self.dest = dest
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self.src1 = src1
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self.src2 = "InstRegIndex(0)"
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self.spm = spm
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self.dataSize = dataSize
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if SetStatus:
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self.className += "Flags"
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if spm:
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self.className += "Top"
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def getAllocator(self, microFlags):
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return '''new %(class_name)s(machInst, macrocodeBlock,
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%(flags)s, %(src1)s, %(src2)s, %(dest)s,
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%(dataSize)s, %(spm)d)''' % {
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"class_name" : self.className,
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"flags" : self.microFlagsText(microFlags),
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"src1" : self.src1, "src2" : self.src2,
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"dest" : self.dest,
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"dataSize" : self.dataSize,
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"spm" : self.spm}
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class FpBinaryOp(X86Microop):
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__metaclass__ = FpOpMeta
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# This class itself doesn't act as a microop
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abstract = True
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# Default template parameter values
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flag_code = ""
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cond_check = "true"
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else_code = ";"
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op_class = "FloatAddOp"
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def __init__(self, dest, src1, src2, spm=0, \
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SetStatus=False, dataSize="env.dataSize"):
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self.dest = dest
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self.src1 = src1
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self.src2 = src2
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self.spm = spm
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self.dataSize = dataSize
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if SetStatus:
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self.className += "Flags"
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if spm:
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self.className += "Top"
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def getAllocator(self, microFlags):
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return '''new %(class_name)s(machInst, macrocodeBlock,
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%(flags)s, %(src1)s, %(src2)s, %(dest)s,
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%(dataSize)s, %(spm)d)''' % {
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"class_name" : self.className,
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"flags" : self.microFlagsText(microFlags),
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"src1" : self.src1, "src2" : self.src2,
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"dest" : self.dest,
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"dataSize" : self.dataSize,
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"spm" : self.spm}
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class Movfp(FpUnaryOp):
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code = 'FpDestReg_uqw = FpSrcReg1_uqw;'
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else_code = 'FpDestReg_uqw = FpDestReg_uqw;'
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cond_check = "checkCondition(ccFlagBits | cfofBits | dfBit | \
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ecfBit | ezfBit, src2)"
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class Xorfp(FpBinaryOp):
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code = 'FpDestReg_uqw = FpSrcReg1_uqw ^ FpSrcReg2_uqw;'
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class Sqrtfp(FpBinaryOp):
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code = 'FpDestReg = sqrt(FpSrcReg2);'
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op_class = 'FloatSqrtOp'
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class Cosfp(FpUnaryOp):
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code = 'FpDestReg = cos(FpSrcReg1);'
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op_class = 'FloatSqrtOp'
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class Sinfp(FpUnaryOp):
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code = 'FpDestReg = sin(FpSrcReg1);'
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op_class = 'FloatSqrtOp'
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class Tanfp(FpUnaryOp):
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code = 'FpDestReg = tan(FpSrcReg1);'
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op_class = 'FloatSqrtOp'
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# Conversion microops
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class ConvOp(FpBinaryOp):
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abstract = True
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op_class = 'FloatCvtOp'
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def __init__(self, dest, src1):
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super(ConvOp, self).__init__(dest, src1, \
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"InstRegIndex(FLOATREG_MICROFP0)")
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# These probably shouldn't look at the ExtMachInst directly to figure
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# out what size to use and should instead delegate that to the macroop's
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# constructor. That would be more efficient, and it would make the
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# microops a little more modular.
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class cvtf_i2d(ConvOp):
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code = '''
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X86IntReg intReg = SSrcReg1;
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if (REX_W)
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FpDestReg = intReg.SR;
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else
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FpDestReg = intReg.SE;
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'''
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class cvtf_i2d_hi(ConvOp):
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code = 'FpDestReg = bits(SSrcReg1, 63, 32);'
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class cvtf_d2i(ConvOp):
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code = '''
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int64_t intSrcReg1 = static_cast<int64_t>(FpSrcReg1);
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if (REX_W)
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SDestReg = intSrcReg1;
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else
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SDestReg = merge(SDestReg, intSrcReg1, 4);
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'''
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# These need to consider size at some point. They'll always use doubles
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# for the moment.
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class addfp(FpBinaryOp):
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code = 'FpDestReg = FpSrcReg1 + FpSrcReg2;'
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2012-12-30 19:45:45 +01:00
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class mulfp(FpBinaryOp):
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2007-09-20 03:27:55 +02:00
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code = 'FpDestReg = FpSrcReg1 * FpSrcReg2;'
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2013-05-21 18:33:57 +02:00
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op_class = 'FloatMultOp'
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2007-09-20 03:27:55 +02:00
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2012-12-30 19:45:45 +01:00
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class divfp(FpBinaryOp):
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2007-09-20 03:27:55 +02:00
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code = 'FpDestReg = FpSrcReg1 / FpSrcReg2;'
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2013-05-21 18:33:57 +02:00
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op_class = 'FloatDivOp'
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2007-09-20 03:27:55 +02:00
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2012-12-30 19:45:45 +01:00
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class subfp(FpBinaryOp):
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2007-09-20 03:27:55 +02:00
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code = 'FpDestReg = FpSrcReg1 - FpSrcReg2;'
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2013-03-11 19:15:46 +01:00
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class Yl2xFp(FpBinaryOp):
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code = '''
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FpDestReg = FpSrcReg2 * (log(FpSrcReg1) / log(2));
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'''
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2013-05-21 18:33:57 +02:00
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op_class = 'FloatSqrtOp'
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2013-03-11 19:15:46 +01:00
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class PremFp(FpBinaryOp):
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code = '''
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FpDestReg = fmod(FpSrcReg1, FpSrcReg2);
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DPRINTF(X86, "src1: %lf, src2: %lf, dest: %lf\\n", FpSrcReg1, FpSrcReg2, FpDestReg);
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'''
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2013-05-21 18:33:57 +02:00
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op_class = 'FloatDivOp'
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2013-03-11 19:15:46 +01:00
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2012-12-30 19:45:45 +01:00
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class Compfp(FpBinaryOp):
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2007-09-20 03:27:55 +02:00
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def __init__(self, src1, src2, spm=0, setStatus=False, \
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dataSize="env.dataSize"):
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2009-07-16 18:29:29 +02:00
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super(Compfp, self).__init__("InstRegIndex(FLOATREG_MICROFP0)", \
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2007-09-20 03:27:55 +02:00
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src1, src2, spm, setStatus, dataSize)
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# This class sets the condition codes in rflags according to the
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# rules for comparing floating point.
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code = '''
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// ZF PF CF
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// Unordered 1 1 1
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// Greater than 0 0 0
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// Less than 0 0 1
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// Equal 1 0 0
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// OF = SF = AF = 0
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2012-05-22 18:29:53 +02:00
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ccFlagBits = ccFlagBits & ~(SFBit | AFBit | ZFBit | PFBit);
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cfofBits = cfofBits & ~(OFBit | CFBit);
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if (std::isnan(FpSrcReg1) || std::isnan(FpSrcReg2)) {
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ccFlagBits = ccFlagBits | (ZFBit | PFBit);
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cfofBits = cfofBits | CFBit;
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}
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2007-09-20 03:27:55 +02:00
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else if(FpSrcReg1 < FpSrcReg2)
|
2012-05-22 18:29:53 +02:00
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cfofBits = cfofBits | CFBit;
|
2007-09-20 03:27:55 +02:00
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else if(FpSrcReg1 == FpSrcReg2)
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ccFlagBits = ccFlagBits | ZFBit;
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'''
|
2013-05-21 18:33:57 +02:00
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op_class = 'FloatCmpOp'
|
2013-01-15 14:43:19 +01:00
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class absfp(FpUnaryOp):
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code = 'FpDestReg = fabs(FpSrcReg1);'
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flag_code = 'FSW &= (~CC1Bit);'
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class chsfp(FpUnaryOp):
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code = 'FpDestReg = (-1) * (FpSrcReg1);'
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flag_code = 'FSW &= (~CC1Bit);'
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2007-09-20 03:27:55 +02:00
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}};
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