sanchayanmaity/gem5
1
0
Fork 0
Code Issues Pull requests Projects Releases Packages Wiki Activity
gem5/tests/quick/fs/10.linux-boot/ref/arm/linux/realview-simple-timing-dual/simout

31 lines
1.8 KiB
Text
Raw Normal View History

ARM: Add some MP regressions and clean up the disk images and kernels a bit
2011-08-19 22:08:09 +02:00
gem5 Simulator System. http://gem5.org
gem5 is copyrighted software; use the --copyright option for details.
stats: bump stats to reflect ruby tester changes
2015-12-12 23:27:38 +01:00
gem5 compiled Dec 11 2015 20:46:46
gem5 started Dec 11 2015 20:47:09
gem5 executing on zizzer, pid 11535
command line: build/ARM/gem5.opt -d build/ARM/tests/opt/quick/fs/10.linux-boot/arm/linux/realview-simple-timing-dual -re /z/atgutier/gem5/gem5/tests/run.py build/ARM/tests/opt/quick/fs/10.linux-boot/arm/linux/realview-simple-timing-dual
stats: Update ARM stats to include programmable oscillators
2015-08-07 16:39:17 +02:00
ARM: Add some MP regressions and clean up the disk images and kernels a bit
2011-08-19 22:08:09 +02:00
Global frequency set at 1000000000000 ticks per second
stats: bump stats to reflect ruby tester changes
2015-12-12 23:27:38 +01:00
info: kernel located at: /dist/m5/system/binaries/vmlinux.aarch32.ll_20131205.0-gem5
tests: Update regressions for the new kernels and various preceeding fixes.
2014-10-30 05:18:29 +01:00
info: Using bootloader at address 0x10
info: Using kernel entry physical address at 0x80008000
stats: bump stats to reflect ruby tester changes
2015-12-12 23:27:38 +01:00
info: Loading DTB file: /dist/m5/system/binaries/vexpress.aarch32.ll_20131205.0-gem5.2cpu.dtb at address 0x88000000
ARM: Add some MP regressions and clean up the disk images and kernels a bit
2011-08-19 22:08:09 +02:00
info: Entering event queue @ 0. Starting simulation...
tests: Update regressions for the new kernels and various preceeding fixes.
2014-10-30 05:18:29 +01:00
info: trap check M:0 N:0 1:0 2:0 hdcr 0, hcptr 3fff, hstr 0
info: trap check M:0 N:0 1:0 2:0 hdcr 0, hcptr 3fff, hstr 0
info: trap check M:0 N:0 1:0 2:0 hdcr 0, hcptr 3fff, hstr 0
info: trap check M:0 N:0 1:0 2:0 hdcr 0, hcptr 3fff, hstr 0
info: trap check M:0 N:0 1:0 2:0 hdcr 0, hcptr 3fff, hstr 0
info: trap check M:0 N:0 1:0 2:0 hdcr 0, hcptr 3fff, hstr 0
info: trap check M:0 N:0 1:0 2:0 hdcr 0, hcptr 3fff, hstr 0
info: trap check M:0 N:0 1:0 2:0 hdcr 0, hcptr 3fff, hstr 0
info: trap check M:0 N:0 1:0 2:0 hdcr 0, hcptr 3fff, hstr 0
info: trap check M:0 N:0 1:0 2:0 hdcr 0, hcptr 3fff, hstr 0
info: trap check M:0 N:0 1:0 2:0 hdcr 0, hcptr 3fff, hstr 0
info: trap check M:0 N:0 1:0 2:0 hdcr 0, hcptr 3fff, hstr 0
info: trap check M:0 N:0 1:0 2:0 hdcr 0, hcptr 3fff, hstr 0
info: trap check M:0 N:0 1:0 2:0 hdcr 0, hcptr 3fff, hstr 0
info: trap check M:0 N:0 1:0 2:0 hdcr 0, hcptr 3fff, hstr 0
stats: Update to reflect changes to PCI handling
2015-12-05 01:11:25 +01:00
Exiting @ tick 2871850306000 because m5_exit instruction encountered
Reference in a new issue Copy permalink