gem5/cpu/beta_cpu/rename.cc


#include "cpu/beta_cpu/alpha_dyn_inst.hh"
#include "cpu/beta_cpu/rename_impl.hh"
#include "cpu/beta_cpu/alpha_impl.hh"

template SimpleRename<AlphaSimpleImpl>;
Check in of new CPU. This checkin works under non-Fullsystem mode, with no caches. SConscript: Added new CPU files to build. arch/alpha/isa_desc: Changed rduniq and wruniq to be nonspeculative because the uniq register is not renamed. arch/isa_parser.py: Added new CPU exec method. base/statistics.hh: Minor change for namespace conflict. Probably can change back one the new CPU files are cleaned up. base/traceflags.py: Added new CPU trace flags. cpu/static_inst.hh: Changed static inst to use a file that defines the execute functions. --HG-- extra : convert_revision : bd4ce34361308280168324817fc1258dd253e519 2004-08-20 20:54:07 +02:00
			`#include "cpu/beta_cpu/alpha_dyn_inst.hh"`
			`#include "cpu/beta_cpu/rename_impl.hh"`
			`#include "cpu/beta_cpu/alpha_impl.hh"`

			`template SimpleRename<AlphaSimpleImpl>;`