2009-05-13 07:55:04 +02:00
|
|
|
[root]
|
|
|
|
type=Root
|
|
|
|
children=system
|
2011-02-08 04:23:11 +01:00
|
|
|
dummy=0
|
2009-05-13 07:55:04 +02:00
|
|
|
|
|
|
|
[system]
|
|
|
|
type=System
|
|
|
|
children=cpu membus physmem
|
|
|
|
mem_mode=atomic
|
|
|
|
physmem=system.physmem
|
|
|
|
|
|
|
|
[system.cpu]
|
|
|
|
type=InOrderCPU
|
|
|
|
children=dcache dtb icache itb l2cache toL2Bus tracer workload
|
|
|
|
BTBEntries=4096
|
|
|
|
BTBTagSize=16
|
|
|
|
CP0_Config=0
|
|
|
|
CP0_Config1=0
|
|
|
|
CP0_Config1_C2=false
|
|
|
|
CP0_Config1_CA=false
|
|
|
|
CP0_Config1_DA=0
|
|
|
|
CP0_Config1_DL=0
|
|
|
|
CP0_Config1_DS=0
|
|
|
|
CP0_Config1_EP=false
|
|
|
|
CP0_Config1_FP=false
|
|
|
|
CP0_Config1_IA=0
|
|
|
|
CP0_Config1_IL=0
|
|
|
|
CP0_Config1_IS=0
|
|
|
|
CP0_Config1_M=0
|
|
|
|
CP0_Config1_MD=false
|
|
|
|
CP0_Config1_MMU=0
|
|
|
|
CP0_Config1_PC=false
|
|
|
|
CP0_Config1_WR=false
|
|
|
|
CP0_Config2=0
|
|
|
|
CP0_Config2_M=false
|
|
|
|
CP0_Config2_SA=0
|
|
|
|
CP0_Config2_SL=0
|
|
|
|
CP0_Config2_SS=0
|
|
|
|
CP0_Config2_SU=0
|
|
|
|
CP0_Config2_TA=0
|
|
|
|
CP0_Config2_TL=0
|
|
|
|
CP0_Config2_TS=0
|
|
|
|
CP0_Config2_TU=0
|
|
|
|
CP0_Config3=0
|
|
|
|
CP0_Config3_DSPP=false
|
|
|
|
CP0_Config3_LPA=false
|
|
|
|
CP0_Config3_M=false
|
|
|
|
CP0_Config3_MT=false
|
|
|
|
CP0_Config3_SM=false
|
|
|
|
CP0_Config3_SP=false
|
|
|
|
CP0_Config3_TL=false
|
|
|
|
CP0_Config3_VEIC=false
|
|
|
|
CP0_Config3_VInt=false
|
|
|
|
CP0_Config_AR=0
|
|
|
|
CP0_Config_AT=0
|
|
|
|
CP0_Config_BE=0
|
|
|
|
CP0_Config_MT=0
|
|
|
|
CP0_Config_VI=0
|
|
|
|
CP0_EBase_CPUNum=0
|
|
|
|
CP0_IntCtl_IPPCI=0
|
|
|
|
CP0_IntCtl_IPTI=0
|
|
|
|
CP0_PRId=0
|
|
|
|
CP0_PRId_CompanyID=0
|
|
|
|
CP0_PRId_CompanyOptions=0
|
|
|
|
CP0_PRId_ProcessorID=1
|
|
|
|
CP0_PRId_Revision=0
|
|
|
|
CP0_PerfCtr_M=false
|
|
|
|
CP0_PerfCtr_W=false
|
|
|
|
CP0_SrsCtl_HSS=0
|
|
|
|
CP0_WatchHi_M=false
|
|
|
|
RASSize=16
|
|
|
|
activity=0
|
|
|
|
cachePorts=2
|
|
|
|
checker=Null
|
|
|
|
choiceCtrBits=2
|
|
|
|
choicePredictorSize=8192
|
|
|
|
clock=500
|
|
|
|
cpu_id=0
|
|
|
|
dataMemPort=dcache_port
|
|
|
|
defer_registration=false
|
|
|
|
div16Latency=1
|
|
|
|
div16RepeatRate=1
|
|
|
|
div24Latency=1
|
|
|
|
div24RepeatRate=1
|
|
|
|
div32Latency=1
|
|
|
|
div32RepeatRate=1
|
|
|
|
div8Latency=1
|
|
|
|
div8RepeatRate=1
|
|
|
|
do_checkpoint_insts=true
|
|
|
|
do_statistics_insts=true
|
|
|
|
dtb=system.cpu.dtb
|
2011-02-04 06:09:22 +01:00
|
|
|
fetchBuffSize=4
|
2009-05-13 07:55:04 +02:00
|
|
|
fetchMemPort=icache_port
|
|
|
|
functionTrace=false
|
|
|
|
functionTraceStart=0
|
|
|
|
function_trace=false
|
|
|
|
function_trace_start=0
|
|
|
|
globalCtrBits=2
|
|
|
|
globalHistoryBits=13
|
|
|
|
globalPredictorSize=8192
|
|
|
|
instShiftAmt=2
|
|
|
|
itb=system.cpu.itb
|
|
|
|
localCtrBits=2
|
|
|
|
localHistoryBits=11
|
|
|
|
localHistoryTableSize=2048
|
|
|
|
localPredictorSize=2048
|
|
|
|
max_insts_all_threads=0
|
|
|
|
max_insts_any_thread=0
|
|
|
|
max_loads_all_threads=0
|
|
|
|
max_loads_any_thread=0
|
|
|
|
memBlockSize=64
|
|
|
|
multLatency=1
|
|
|
|
multRepeatRate=1
|
|
|
|
numThreads=1
|
|
|
|
phase=0
|
|
|
|
predType=tournament
|
|
|
|
progress_interval=0
|
|
|
|
stageTracing=false
|
2011-02-04 06:09:22 +01:00
|
|
|
stageWidth=4
|
2009-05-13 07:55:04 +02:00
|
|
|
system=system
|
2010-02-01 00:31:28 +01:00
|
|
|
threadModel=SMT
|
2009-05-13 07:55:04 +02:00
|
|
|
tracer=system.cpu.tracer
|
|
|
|
workload=system.cpu.workload
|
|
|
|
dcache_port=system.cpu.dcache.cpu_side
|
|
|
|
icache_port=system.cpu.icache.cpu_side
|
|
|
|
|
|
|
|
[system.cpu.dcache]
|
|
|
|
type=BaseCache
|
|
|
|
addr_range=0:18446744073709551615
|
|
|
|
assoc=2
|
|
|
|
block_size=64
|
|
|
|
forward_snoops=true
|
|
|
|
hash_delay=1
|
|
|
|
latency=1000
|
|
|
|
max_miss_count=0
|
|
|
|
mshrs=10
|
2010-02-25 19:08:41 +01:00
|
|
|
num_cpus=1
|
2009-05-13 07:55:04 +02:00
|
|
|
prefetch_data_accesses_only=false
|
|
|
|
prefetch_degree=1
|
|
|
|
prefetch_latency=10000
|
|
|
|
prefetch_on_access=false
|
|
|
|
prefetch_past_page=false
|
|
|
|
prefetch_policy=none
|
|
|
|
prefetch_serial_squash=false
|
|
|
|
prefetch_use_cpu_id=true
|
|
|
|
prefetcher_size=100
|
|
|
|
prioritizeRequests=false
|
|
|
|
repl=Null
|
|
|
|
size=262144
|
|
|
|
subblock_size=0
|
|
|
|
tgts_per_mshr=5
|
|
|
|
trace_addr=0
|
|
|
|
two_queue=false
|
|
|
|
write_buffers=8
|
|
|
|
cpu_side=system.cpu.dcache_port
|
|
|
|
mem_side=system.cpu.toL2Bus.port[1]
|
|
|
|
|
|
|
|
[system.cpu.dtb]
|
|
|
|
type=MipsTLB
|
|
|
|
size=64
|
|
|
|
|
|
|
|
[system.cpu.icache]
|
|
|
|
type=BaseCache
|
|
|
|
addr_range=0:18446744073709551615
|
|
|
|
assoc=2
|
|
|
|
block_size=64
|
|
|
|
forward_snoops=true
|
|
|
|
hash_delay=1
|
|
|
|
latency=1000
|
|
|
|
max_miss_count=0
|
|
|
|
mshrs=10
|
2010-02-25 19:08:41 +01:00
|
|
|
num_cpus=1
|
2009-05-13 07:55:04 +02:00
|
|
|
prefetch_data_accesses_only=false
|
|
|
|
prefetch_degree=1
|
|
|
|
prefetch_latency=10000
|
|
|
|
prefetch_on_access=false
|
|
|
|
prefetch_past_page=false
|
|
|
|
prefetch_policy=none
|
|
|
|
prefetch_serial_squash=false
|
|
|
|
prefetch_use_cpu_id=true
|
|
|
|
prefetcher_size=100
|
|
|
|
prioritizeRequests=false
|
|
|
|
repl=Null
|
|
|
|
size=131072
|
|
|
|
subblock_size=0
|
|
|
|
tgts_per_mshr=5
|
|
|
|
trace_addr=0
|
|
|
|
two_queue=false
|
|
|
|
write_buffers=8
|
|
|
|
cpu_side=system.cpu.icache_port
|
|
|
|
mem_side=system.cpu.toL2Bus.port[0]
|
|
|
|
|
|
|
|
[system.cpu.itb]
|
|
|
|
type=MipsTLB
|
|
|
|
size=64
|
|
|
|
|
|
|
|
[system.cpu.l2cache]
|
|
|
|
type=BaseCache
|
|
|
|
addr_range=0:18446744073709551615
|
|
|
|
assoc=2
|
|
|
|
block_size=64
|
|
|
|
forward_snoops=true
|
|
|
|
hash_delay=1
|
|
|
|
latency=10000
|
|
|
|
max_miss_count=0
|
|
|
|
mshrs=10
|
2010-02-25 19:08:41 +01:00
|
|
|
num_cpus=1
|
2009-05-13 07:55:04 +02:00
|
|
|
prefetch_data_accesses_only=false
|
|
|
|
prefetch_degree=1
|
|
|
|
prefetch_latency=100000
|
|
|
|
prefetch_on_access=false
|
|
|
|
prefetch_past_page=false
|
|
|
|
prefetch_policy=none
|
|
|
|
prefetch_serial_squash=false
|
|
|
|
prefetch_use_cpu_id=true
|
|
|
|
prefetcher_size=100
|
|
|
|
prioritizeRequests=false
|
|
|
|
repl=Null
|
|
|
|
size=2097152
|
|
|
|
subblock_size=0
|
|
|
|
tgts_per_mshr=5
|
|
|
|
trace_addr=0
|
|
|
|
two_queue=false
|
|
|
|
write_buffers=8
|
|
|
|
cpu_side=system.cpu.toL2Bus.port[2]
|
|
|
|
mem_side=system.membus.port[1]
|
|
|
|
|
|
|
|
[system.cpu.toL2Bus]
|
|
|
|
type=Bus
|
|
|
|
block_size=64
|
|
|
|
bus_id=0
|
|
|
|
clock=1000
|
|
|
|
header_cycles=1
|
2010-08-17 14:06:22 +02:00
|
|
|
use_default_range=false
|
2009-05-13 07:55:04 +02:00
|
|
|
width=64
|
|
|
|
port=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.l2cache.cpu_side
|
|
|
|
|
|
|
|
[system.cpu.tracer]
|
|
|
|
type=ExeTracer
|
|
|
|
|
|
|
|
[system.cpu.workload]
|
|
|
|
type=LiveProcess
|
|
|
|
cmd=hello
|
|
|
|
cwd=
|
|
|
|
egid=100
|
|
|
|
env=
|
|
|
|
errout=cerr
|
|
|
|
euid=100
|
2011-02-08 04:23:11 +01:00
|
|
|
executable=tests/test-progs/hello/bin/mips/linux/hello
|
2009-05-13 07:55:04 +02:00
|
|
|
gid=100
|
|
|
|
input=cin
|
|
|
|
max_stack_size=67108864
|
|
|
|
output=cout
|
|
|
|
pid=100
|
|
|
|
ppid=99
|
|
|
|
simpoint=0
|
|
|
|
system=system
|
|
|
|
uid=100
|
|
|
|
|
|
|
|
[system.membus]
|
|
|
|
type=Bus
|
|
|
|
block_size=64
|
|
|
|
bus_id=0
|
|
|
|
clock=1000
|
|
|
|
header_cycles=1
|
2010-08-17 14:06:22 +02:00
|
|
|
use_default_range=false
|
2009-05-13 07:55:04 +02:00
|
|
|
width=64
|
|
|
|
port=system.physmem.port[0] system.cpu.l2cache.mem_side
|
|
|
|
|
|
|
|
[system.physmem]
|
|
|
|
type=PhysicalMemory
|
|
|
|
file=
|
|
|
|
latency=30000
|
|
|
|
latency_var=0
|
|
|
|
null=false
|
|
|
|
range=0:134217727
|
|
|
|
zero=false
|
|
|
|
port=system.membus.port[0]
|
|
|
|
|