2006-03-14 22:01:21 +01:00
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/*
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* Copyright (c) 2003-2005 The Regents of The University of Michigan
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are
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* met: redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer;
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* redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution;
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* neither the name of the copyright holders nor the names of its
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* contributors may be used to endorse or promote products derived from
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* this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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2006-06-01 01:26:56 +02:00
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*
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* Authors: Gabe Black
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* Ali Saidi
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2006-03-14 22:01:21 +01:00
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*/
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2009-07-09 08:02:21 +02:00
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#ifndef __ARCH_SPARC_REGISTERS_HH__
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#define __ARCH_SPARC_REGISTERS_HH__
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2006-03-14 22:01:21 +01:00
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2009-07-09 08:02:21 +02:00
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#include "arch/sparc/max_inst_regs.hh"
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#include "arch/sparc/miscregs.hh"
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2009-07-09 08:02:20 +02:00
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#include "arch/sparc/sparc_traits.hh"
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2009-07-09 08:02:21 +02:00
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#include "base/types.hh"
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2006-03-14 22:01:21 +01:00
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namespace SparcISA
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{
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2009-07-09 08:02:21 +02:00
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using SparcISAInst::MaxInstSrcRegs;
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using SparcISAInst::MaxInstDestRegs;
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typedef uint64_t IntReg;
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typedef uint64_t MiscReg;
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typedef float FloatReg;
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typedef uint32_t FloatRegBits;
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typedef union
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{
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IntReg intReg;
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FloatReg fpreg;
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MiscReg ctrlreg;
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} AnyReg;
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2009-07-09 08:02:20 +02:00
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2009-07-09 08:02:21 +02:00
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typedef uint16_t RegIndex;
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2006-03-14 22:39:59 +01:00
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2009-07-09 08:02:21 +02:00
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// These enumerate all the registers for dependence tracking.
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enum DependenceTags {
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FP_Base_DepTag = 32*3+9,
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2010-08-26 02:10:43 +02:00
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Ctrl_Base_DepTag = FP_Base_DepTag + 64,
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Max_DepTag = Ctrl_Base_DepTag + NumMiscRegs
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2009-07-09 08:02:21 +02:00
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};
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// semantically meaningful register indices
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const int ZeroReg = 0; // architecturally meaningful
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// the rest of these depend on the ABI
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const int ReturnAddressReg = 31; // post call, precall is 15
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const int ReturnValueReg = 8; // Post return, 24 is pre-return.
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const int StackPointerReg = 14;
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const int FramePointerReg = 30;
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// Some OS syscall use a second register (o1) to return a second value
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const int SyscallPseudoReturnReg = 9;
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const int NumIntArchRegs = 32;
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const int NumIntRegs = (MaxGL + 1) * 8 + NWindows * 16 + NumMicroIntRegs;
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2006-03-14 22:39:59 +01:00
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2006-03-14 22:01:21 +01:00
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} // namespace SparcISA
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#endif
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