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gem5/tests/quick/00.hello/ref/power/linux/o3-timing/simout

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stats: update stats for preceding coherence changes Because the handling of the E state for multilevel caches has changed, stats are affected for any non-ruby config with caches, even uniprocessor simple CPU.
2010-09-09 20:40:19 +02:00
Redirecting stdout to build/POWER_SE/tests/opt/quick/00.hello/power/linux/o3-timing/simout
Redirecting stderr to build/POWER_SE/tests/opt/quick/00.hello/power/linux/o3-timing/simerr
test: Hello world test program for Power includes reference outputs for the Hello World tests on simple-atomic and o3-timing.
2009-10-27 17:24:40 +01:00
M5 Simulator System
Copyright (c) 2001-2008
The Regents of The University of Michigan
All Rights Reserved
stats: update stats for preceding coherence changes Because the handling of the E state for multilevel caches has changed, stats are affected for any non-ruby config with caches, even uniprocessor simple CPU.
2010-09-09 20:40:19 +02:00
M5 compiled Aug 26 2010 12:59:22
M5 revision 85cafc6ccb42 7662 default qtip tip sc-fail-fix
M5 started Aug 26 2010 12:59:25
BPRED: Update regressions for tournament predictor fix.
2010-05-14 05:45:59 +02:00
M5 executing on zizzer
stats: update stats for preceding coherence changes Because the handling of the E state for multilevel caches has changed, stats are affected for any non-ruby config with caches, even uniprocessor simple CPU.
2010-09-09 20:40:19 +02:00
command line: build/POWER_SE/m5.opt -d build/POWER_SE/tests/opt/quick/00.hello/power/linux/o3-timing -re tests/run.py build/POWER_SE/tests/opt/quick/00.hello/power/linux/o3-timing
test: Hello world test program for Power includes reference outputs for the Hello World tests on simple-atomic and o3-timing.
2009-10-27 17:24:40 +01:00
Global frequency set at 1000000000000 ticks per second
info: Entering event queue @ 0. Starting simulation...
Hello world!
stats: update stats for preceding coherence changes Because the handling of the E state for multilevel caches has changed, stats are affected for any non-ruby config with caches, even uniprocessor simple CPU.
2010-09-09 20:40:19 +02:00
Exiting @ tick 11733000 because target called exit()
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