ab08960f64
Change pushcli / popcli so that they can never turn on interrupts unexpectedly. That is, if interrupts are on, then pushcli(); popcli(); turns them off and back on, but if they are off to begin with, then pushcli(); popcli(); is a no-op. I think our fundamental mistake was having a primitive (release and then popcli nee spllo) that could turn interrupts on at unexpected moments instead of being explicit about when we want to start allowing interrupts. With the new semantics, all the manual fiddling of ncli to force interrupts off in certain sections goes away. In return, we must explicitly mark the places where we want to enable interrupts unconditionally, by calling sti(). There is only one: inside the scheduler loop.
117 lines
2.4 KiB
C
117 lines
2.4 KiB
C
// Mutual exclusion spin locks.
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#include "types.h"
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#include "defs.h"
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#include "param.h"
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#include "x86.h"
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#include "mmu.h"
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#include "proc.h"
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#include "spinlock.h"
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extern int use_console_lock;
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void
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initlock(struct spinlock *lock, char *name)
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{
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lock->name = name;
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lock->locked = 0;
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lock->cpu = 0xffffffff;
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}
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// Acquire the lock.
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// Loops (spins) until the lock is acquired.
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// Holding a lock for a long time may cause
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// other CPUs to waste time spinning to acquire it.
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void
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acquire(struct spinlock *lock)
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{
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pushcli();
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if(holding(lock))
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panic("acquire");
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while(cmpxchg(0, 1, &lock->locked) == 1)
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;
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// Serialize instructions: now that lock is acquired, make sure
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// we wait for all pending writes from other processors.
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cpuid(0, 0, 0, 0, 0); // memory barrier (see Ch 7, IA-32 manual vol 3)
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// Record info about lock acquisition for debugging.
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// The +10 is only so that we can tell the difference
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// between forgetting to initialize lock->cpu
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// and holding a lock on cpu 0.
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lock->cpu = cpu() + 10;
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getcallerpcs(&lock, lock->pcs);
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}
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// Release the lock.
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void
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release(struct spinlock *lock)
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{
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if(!holding(lock))
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panic("release");
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lock->pcs[0] = 0;
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lock->cpu = 0xffffffff;
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// Serialize instructions: before unlocking the lock, make sure
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// to flush any pending memory writes from this processor.
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cpuid(0, 0, 0, 0, 0); // memory barrier (see Ch 7, IA-32 manual vol 3)
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lock->locked = 0;
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popcli();
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}
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// Record the current call stack in pcs[] by following the %ebp chain.
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void
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getcallerpcs(void *v, uint pcs[])
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{
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uint *ebp;
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int i;
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ebp = (uint*)v - 2;
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for(i = 0; i < 10; i++){
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if(ebp == 0 || ebp == (uint*)0xffffffff)
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break;
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pcs[i] = ebp[1]; // saved %eip
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ebp = (uint*)ebp[0]; // saved %ebp
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}
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for(; i < 10; i++)
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pcs[i] = 0;
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}
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// Check whether this cpu is holding the lock.
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int
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holding(struct spinlock *lock)
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{
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return lock->locked && lock->cpu == cpu() + 10;
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}
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// Pushcli/popcli are like cli/sti except that they are matched:
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// it takes two popcli to undo two pushcli. Also, if interrupts
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// are off, then pushcli, popcli leaves them off.
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void
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pushcli(void)
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{
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int eflags;
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eflags = read_eflags();
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cli();
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if(cpus[cpu()].ncli++ == 0)
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cpus[cpu()].intena = eflags & FL_IF;
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}
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void
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popcli(void)
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{
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if(read_eflags()&FL_IF)
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panic("popcli - interruptible");
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if(--cpus[cpu()].ncli < 0)
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panic("popcli");
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if(cpus[cpu()].ncli == 0 && cpus[cpu()].intena)
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sti();
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}
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