f70172129c
if no lapic available, use 8253pit for clock now xv6 runs both on qemu (uniprocessor) and bochs (uniprocessor and MP)
47 lines
1.7 KiB
C
47 lines
1.7 KiB
C
#include "types.h"
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#include "x86.h"
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#include "defs.h"
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#include "traps.h"
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// Register definitions for the Intel
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// 8253/8254/82C54 Programmable Interval Timer (PIT).
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#define IO_TIMER1 0x040 /* 8253 Timer #1 */
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#define IO_TIMER2 0x048 /* 8253 Timer #2 (EISA only) */
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//
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// Frequency of all three count-down timers; (TIMER_FREQ/freq) is the
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// appropriate count to generate a frequency of freq hz.
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#define TIMER_FREQ 1193182
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#define TIMER_DIV(x) ((TIMER_FREQ+(x)/2)/(x))
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#define TIMER_CNTR0 (IO_TIMER1 + 0) /* timer 0 counter port */
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#define TIMER_CNTR1 (IO_TIMER1 + 1) /* timer 1 counter port */
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#define TIMER_CNTR2 (IO_TIMER1 + 2) /* timer 2 counter port */
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#define TIMER_MODE (IO_TIMER1 + 3) /* timer mode port */
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#define TIMER_SEL0 0x00 /* select counter 0 */
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#define TIMER_SEL1 0x40 /* select counter 1 */
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#define TIMER_SEL2 0x80 /* select counter 2 */
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#define TIMER_INTTC 0x00 /* mode 0, intr on terminal cnt */
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#define TIMER_ONESHOT 0x02 /* mode 1, one shot */
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#define TIMER_RATEGEN 0x04 /* mode 2, rate generator */
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#define TIMER_SQWAVE 0x06 /* mode 3, square wave */
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#define TIMER_SWSTROBE 0x08 /* mode 4, s/w triggered strobe */
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#define TIMER_HWSTROBE 0x0a /* mode 5, h/w triggered strobe */
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#define TIMER_LATCH 0x00 /* latch counter for reading */
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#define TIMER_LSB 0x10 /* r/w counter LSB */
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#define TIMER_MSB 0x20 /* r/w counter MSB */
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#define TIMER_16BIT 0x30 /* r/w counter 16 bits, LSB first */
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#define TIMER_BCD 0x01 /* count in BCD */
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void
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pit8253_timerinit(void)
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{
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// initialize 8253 clock to interrupt 100 times/sec
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outb(TIMER_MODE, TIMER_SEL0 | TIMER_RATEGEN | TIMER_16BIT);
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outb(IO_TIMER1, TIMER_DIV(100) % 256);
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outb(IO_TIMER1, TIMER_DIV(100) / 256);
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irq_setmask_8259A(irq_mask_8259A & ~(1<<IRQ_TIMER));
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}
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