137 lines
3.8 KiB
Plaintext
137 lines
3.8 KiB
Plaintext
This file lists subtle things that might not be commented
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as well as they should be in the source code and that
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might be worth pointing out in a longer explanation or in class.
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---
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[2009/07/12: No longer relevant; forkret1 changed
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and this is now cleaner.]
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forkret1 in trapasm.S is called with a tf argument.
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In order to use it, forkret1 copies the tf pointer into
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%esp and then jumps to trapret, which pops the
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register state out of the trap frame. If an interrupt
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came in between the mov tf, %esp and the iret that
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goes back out to user space, the interrupt stack frame
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would end up scribbling over the tf and whatever memory
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lay under it.
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Why is this safe? Because forkret1 is only called
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the first time a process returns to user space, and
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at that point, cp->tf is set to point to a trap frame
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constructed at the top of cp's kernel stack. So tf
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*is* a valid %esp that can hold interrupt state.
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If other tf's were used in forkret1, we could add
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a cli before the mov tf, %esp.
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---
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In pushcli, must cli() no matter what. It is not safe to do
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if(cpus[cpu()].ncli == 0)
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cli();
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cpus[cpu()].ncli++;
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because if interrupts are off then we might call cpu(), get
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rescheduled to a different cpu, look at cpus[oldcpu].ncli,
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and wrongly decide not to disable interrupts on the new cpu.
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Instead do
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cli();
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cpus[cpu()].ncli++;
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always.
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---
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There is a (harmless) race in pushcli, which does
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eflags = readeflags();
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cli();
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if(c->ncli++ == 0)
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c->intena = eflags & FL_IF;
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Consider a bottom-level pushcli.
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If interrupts are disabled already, then the right thing
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happens: read_eflags finds that FL_IF is not set,
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and intena = 0. If interrupts are enabled, then
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it is less clear that the right thing happens:
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the readeflags can execute, then the process
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can get preempted and rescheduled on another cpu,
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and then once it starts running, perhaps with
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interrupts disabled (can happen since the scheduler
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only enables interrupts once per scheduling loop,
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not every time it schedules a process), it will
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incorrectly record that interrupts *were* enabled.
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This doesn't matter, because if it was safe to be
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running with interrupts enabled before the context
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switch, it is still safe (and arguably more correct)
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to run with them enabled after the context switch too.
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In fact it would be safe if scheduler always set
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c->intena = 1;
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before calling swtch, and perhaps it should.
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---
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The x86's processor-ordering memory model
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matches spin locks well, so no explicit memory
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synchronization instructions are required in
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acquire and release.
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Consider two sequences of code on different CPUs:
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CPU0
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A;
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release(lk);
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and
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CPU1
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acquire(lk);
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B;
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We want to make sure that:
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- all reads in B see the effects of writes in A.
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- all reads in A do *not* see the effects of writes in B.
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The x86 guarantees that writes in A will go out
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to memory before the write of lk->locked = 0 in
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release(lk). It further guarantees that CPU1
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will observe CPU0's write of lk->locked = 0 only
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after observing the earlier writes by CPU0.
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So any reads in B are guaranteed to observe the
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effects of writes in A.
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According to the Intel manual behavior spec, the
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second condition requires a serialization instruction
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in release, to avoid reads in A happening after giving
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up lk. No Intel SMP processor in existence actually
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moves reads down after writes, but the language in
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the spec allows it. There is no telling whether future
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processors will need it.
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---
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The code in fork needs to read np->pid before
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setting np->state to RUNNABLE.
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int
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fork(void)
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{
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...
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pid = np->pid;
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np->state = RUNNABLE;
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return pid;
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}
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After setting np->state to RUNNABLE, some other CPU
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might run the process, it might exit, and then it might
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get reused for a different process (with a new pid), all
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before the return statement. So it's not safe to just do
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"return np->pid;".
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This works because proc.h marks the pid as volatile.
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