oops - wrong bit (vic zandy)
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ioapic.c
2
ioapic.c
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@ -17,7 +17,7 @@
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// The first (low) register in a pair contains configuration bits.
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// The first (low) register in a pair contains configuration bits.
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// The second (high) register contains a bitmask telling which
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// The second (high) register contains a bitmask telling which
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// CPUs can serve that interrupt.
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// CPUs can serve that interrupt.
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#define INT_DISABLED 0x00100000 // Interrupt disabled
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#define INT_DISABLED 0x00010000 // Interrupt disabled
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#define INT_LEVEL 0x00008000 // Level-triggered (vs edge-)
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#define INT_LEVEL 0x00008000 // Level-triggered (vs edge-)
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#define INT_ACTIVELOW 0x00002000 // Active low (vs high)
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#define INT_ACTIVELOW 0x00002000 // Active low (vs high)
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#define INT_LOGICAL 0x00000800 // Destination is CPU id (vs APIC ID)
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#define INT_LOGICAL 0x00000800 // Destination is CPU id (vs APIC ID)
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