Style nits; indentation and tabs
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16f205b5c9
commit
a7061b4f97
5 changed files with 36 additions and 36 deletions
2
defs.h
2
defs.h
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@ -131,7 +131,7 @@ void release(struct spinlock*);
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void pushcli(void);
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void popcli(void);
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void initsleeplock(struct sleeplock*);
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void acquire_sleeplock(struct sleeplock*,struct spinlock*);
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void acquire_sleeplock(struct sleeplock*, struct spinlock*);
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void release_sleeplock(struct sleeplock*);
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int acquired_sleeplock(struct sleeplock*);
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2
file.c
2
file.c
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@ -134,7 +134,7 @@ filewrite(struct file *f, char *addr, int n)
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begin_trans();
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ilock(f->ip);
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if ((r = writei(f->ip, addr + i, f->off, n1)) > 0)
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f->off += r;
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f->off += r;
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iunlock(f->ip);
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commit_trans();
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8
main.c
8
main.c
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@ -107,10 +107,10 @@ startothers(void)
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// Use PTE_PS in page directory entry to enable 4Mbyte pages.
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__attribute__((__aligned__(PGSIZE)))
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pde_t enterpgdir[NPDENTRIES] = {
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// Map VA's [0, 4MB) to PA's [0, 4MB)
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[0] = (0) + PTE_P + PTE_W + PTE_PS,
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// Map VA's [KERNBASE, KERNBASE+4MB) to PA's [0, 4MB)
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[KERNBASE>>PDXSHIFT] = (0) + PTE_P + PTE_W + PTE_PS,
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// Map VA's [0, 4MB) to PA's [0, 4MB)
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[0] = (0) + PTE_P + PTE_W + PTE_PS,
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// Map VA's [KERNBASE, KERNBASE+4MB) to PA's [0, 4MB)
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[KERNBASE>>PDXSHIFT] = (0) + PTE_P + PTE_W + PTE_PS,
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};
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//PAGEBREAK!
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58
mmu.h
58
mmu.h
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@ -25,19 +25,19 @@
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#define FL_ID 0x00200000 // ID flag
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// Control Register flags
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#define CR0_PE 0x00000001 // Protection Enable
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#define CR0_MP 0x00000002 // Monitor coProcessor
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#define CR0_EM 0x00000004 // Emulation
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#define CR0_TS 0x00000008 // Task Switched
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#define CR0_ET 0x00000010 // Extension Type
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#define CR0_NE 0x00000020 // Numeric Errror
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#define CR0_WP 0x00010000 // Write Protect
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#define CR0_AM 0x00040000 // Alignment Mask
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#define CR0_NW 0x20000000 // Not Writethrough
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#define CR0_CD 0x40000000 // Cache Disable
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#define CR0_PG 0x80000000 // Paging
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#define CR0_PE 0x00000001 // Protection Enable
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#define CR0_MP 0x00000002 // Monitor coProcessor
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#define CR0_EM 0x00000004 // Emulation
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#define CR0_TS 0x00000008 // Task Switched
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#define CR0_ET 0x00000010 // Extension Type
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#define CR0_NE 0x00000020 // Numeric Errror
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#define CR0_WP 0x00010000 // Write Protect
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#define CR0_AM 0x00040000 // Alignment Mask
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#define CR0_NW 0x20000000 // Not Writethrough
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#define CR0_CD 0x40000000 // Cache Disable
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#define CR0_PG 0x80000000 // Paging
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#define CR4_PSE 0x00000010 // Page size extension
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#define CR4_PSE 0x00000010 // Page size extension
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#define SEG_KCODE 1 // kernel code
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#define SEG_KDATA 2 // kernel data+stack
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@ -109,39 +109,39 @@ struct segdesc {
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// \--- PDX(va) --/ \--- PTX(va) --/
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// page directory index
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#define PDX(va) (((uint)(va) >> PDXSHIFT) & 0x3FF)
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#define PDX(va) (((uint)(va) >> PDXSHIFT) & 0x3FF)
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// page table index
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#define PTX(va) (((uint)(va) >> PTXSHIFT) & 0x3FF)
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#define PTX(va) (((uint)(va) >> PTXSHIFT) & 0x3FF)
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// construct virtual address from indexes and offset
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#define PGADDR(d, t, o) ((uint)((d) << PDXSHIFT | (t) << PTXSHIFT | (o)))
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#define PGADDR(d, t, o) ((uint)((d) << PDXSHIFT | (t) << PTXSHIFT | (o)))
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// Page directory and page table constants.
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#define NPDENTRIES 1024 // page directory entries per page directory
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#define NPTENTRIES 1024 // page table entries per page table
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#define NPDENTRIES 1024 // page directory entries per page directory
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#define NPTENTRIES 1024 // page table entries per page table
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#define PGSIZE 4096 // bytes mapped by a page
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#define PGSHIFT 12 // log2(PGSIZE)
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#define PTXSHIFT 12 // offset of PTX in a linear address
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#define PDXSHIFT 22 // offset of PDX in a linear address
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#define PTXSHIFT 12 // offset of PTX in a linear address
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#define PDXSHIFT 22 // offset of PDX in a linear address
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#define PGROUNDUP(sz) (((sz)+PGSIZE-1) & ~(PGSIZE-1))
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#define PGROUNDDOWN(a) (((a)) & ~(PGSIZE-1))
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// Page table/directory entry flags.
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#define PTE_P 0x001 // Present
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#define PTE_W 0x002 // Writeable
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#define PTE_U 0x004 // User
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#define PTE_PWT 0x008 // Write-Through
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#define PTE_PCD 0x010 // Cache-Disable
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#define PTE_A 0x020 // Accessed
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#define PTE_D 0x040 // Dirty
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#define PTE_PS 0x080 // Page Size
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#define PTE_MBZ 0x180 // Bits must be zero
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#define PTE_P 0x001 // Present
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#define PTE_W 0x002 // Writeable
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#define PTE_U 0x004 // User
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#define PTE_PWT 0x008 // Write-Through
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#define PTE_PCD 0x010 // Cache-Disable
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#define PTE_A 0x020 // Accessed
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#define PTE_D 0x040 // Dirty
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#define PTE_PS 0x080 // Page Size
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#define PTE_MBZ 0x180 // Bits must be zero
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// Address in page table or page directory entry
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#define PTE_ADDR(pte) ((uint)(pte) & ~0xFFF)
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#define PTE_ADDR(pte) ((uint)(pte) & ~0xFFF)
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#ifndef __ASSEMBLER__
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typedef uint pte_t;
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2
vm.c
2
vm.c
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@ -137,7 +137,7 @@ setupkvm(char* (*alloc)(void))
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panic("PHYSTOP too high");
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for(k = kmap; k < &kmap[NELEM(kmap)]; k++)
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if(mappages(pgdir, k->virt, k->phys_end - k->phys_start, (uint)k->phys_start,
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k->perm, alloc) < 0)
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k->perm, alloc) < 0)
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return 0;
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return pgdir;
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