be consistent: no underscores in function names
This commit is contained in:
rsc
parent
b7f653dc49
commit
2157576107
4
bio.c
4
bio.c
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@ -100,7 +100,7 @@ bread(uint dev, uint sector)
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b = bget(dev, sector);
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if(!(b->flags & B_VALID))
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ide_rw(b);
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iderw(b);
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return b;
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}
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@ -111,7 +111,7 @@ bwrite(struct buf *b)
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if((b->flags & B_BUSY) == 0)
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panic("bwrite");
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b->flags |= B_DIRTY;
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ide_rw(b);
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iderw(b);
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}
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// Release the buffer buf.
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46
console.c
46
console.c
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@ -26,7 +26,7 @@ int use_console_lock = 0;
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// .bochsrc to copy to the stdout:
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// parport1: enabled=1, file="/dev/stdout"
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static void
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lpt_putc(int c)
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lptputc(int c)
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{
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int i;
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@ -40,7 +40,7 @@ lpt_putc(int c)
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}
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static void
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cga_putc(int c)
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cgaputc(int c)
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{
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int pos;
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@ -72,7 +72,7 @@ cga_putc(int c)
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}
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void
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cons_putc(int c)
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consputc(int c)
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{
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if(panicked){
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cli();
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@ -80,8 +80,8 @@ cons_putc(int c)
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;
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}
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lpt_putc(c);
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cga_putc(c);
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lptputc(c);
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cgaputc(c);
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}
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void
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@ -106,7 +106,7 @@ printint(int xx, int base, int sgn)
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buf[i++] = '-';
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while(--i >= 0)
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cons_putc(buf[i]);
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consputc(buf[i]);
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}
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// Print to the console. only understands %d, %x, %p, %s.
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@ -130,7 +130,7 @@ cprintf(char *fmt, ...)
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if(c == '%')
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state = '%';
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else
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cons_putc(c);
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consputc(c);
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break;
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case '%':
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@ -147,15 +147,15 @@ cprintf(char *fmt, ...)
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if(s == 0)
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s = "(null)";
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for(; *s; s++)
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cons_putc(*s);
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consputc(*s);
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break;
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case '%':
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cons_putc('%');
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consputc('%');
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break;
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default:
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// Print unknown % sequence to draw attention.
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cons_putc('%');
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cons_putc(c);
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consputc('%');
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consputc(c);
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break;
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}
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state = 0;
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@ -168,14 +168,14 @@ cprintf(char *fmt, ...)
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}
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int
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console_write(struct inode *ip, char *buf, int n)
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consolewrite(struct inode *ip, char *buf, int n)
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{
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int i;
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iunlock(ip);
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acquire(&console_lock);
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for(i = 0; i < n; i++)
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cons_putc(buf[i] & 0xff);
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consputc(buf[i] & 0xff);
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release(&console_lock);
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ilock(ip);
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@ -194,7 +194,7 @@ struct {
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#define C(x) ((x)-'@') // Control-x
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void
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console_intr(int (*getc)(void))
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consoleintr(int (*getc)(void))
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{
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int c;
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@ -208,19 +208,19 @@ console_intr(int (*getc)(void))
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while(input.e != input.w &&
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input.buf[(input.e-1) % INPUT_BUF] != '\n'){
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input.e--;
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cons_putc(BACKSPACE);
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consputc(BACKSPACE);
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}
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break;
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case C('H'): // Backspace
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if(input.e != input.w){
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input.e--;
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cons_putc(BACKSPACE);
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consputc(BACKSPACE);
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}
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break;
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default:
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if(c != 0 && input.e-input.r < INPUT_BUF){
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input.buf[input.e++ % INPUT_BUF] = c;
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cons_putc(c);
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consputc(c);
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if(c == '\n' || c == C('D') || input.e == input.r+INPUT_BUF){
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input.w = input.e;
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wakeup(&input.r);
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@ -233,7 +233,7 @@ console_intr(int (*getc)(void))
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}
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int
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console_read(struct inode *ip, char *dst, int n)
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consoleread(struct inode *ip, char *dst, int n)
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{
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uint target;
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int c;
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@ -271,17 +271,17 @@ console_read(struct inode *ip, char *dst, int n)
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}
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void
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console_init(void)
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consoleinit(void)
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{
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initlock(&console_lock, "console");
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initlock(&input.lock, "console input");
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devsw[CONSOLE].write = console_write;
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devsw[CONSOLE].read = console_read;
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devsw[CONSOLE].write = consolewrite;
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devsw[CONSOLE].read = consoleread;
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use_console_lock = 1;
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pic_enable(IRQ_KBD);
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ioapic_enable(IRQ_KBD, 0);
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picenable(IRQ_KBD);
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ioapicenable(IRQ_KBD, 0);
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}
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void
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36
defs.h
36
defs.h
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@ -14,9 +14,9 @@ void brelse(struct buf*);
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void bwrite(struct buf*);
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// console.c
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void console_init(void);
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void consoleinit(void);
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void cprintf(char*, ...);
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void console_intr(int(*)(void));
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void consoleintr(int(*)(void));
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void panic(char*) __attribute__((noreturn));
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// exec.c
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@ -50,14 +50,14 @@ void stati(struct inode*, struct stat*);
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int writei(struct inode*, char*, uint, uint);
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// ide.c
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void ide_init(void);
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void ide_intr(void);
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void ide_rw(struct buf *);
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void ideinit(void);
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void ideintr(void);
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void iderw(struct buf *);
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// ioapic.c
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void ioapic_enable(int irq, int cpu);
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extern uchar ioapic_id;
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void ioapic_init(void);
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void ioapicenable(int irq, int cpu);
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extern uchar ioapicid;
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void ioapicinit(void);
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// kalloc.c
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char* kalloc(int);
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@ -65,24 +65,24 @@ void kfree(char*, int);
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void kinit(void);
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// kbd.c
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void kbd_intr(void);
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void kbdintr(void);
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// lapic.c
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int cpu(void);
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extern volatile uint* lapic;
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void lapic_eoi(void);
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void lapic_init(int);
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void lapic_startap(uchar, uint);
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void lapiceoi(void);
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void lapicinit(int);
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void lapicstartap(uchar, uint);
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// mp.c
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extern int ismp;
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int mp_bcpu(void);
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void mp_init(void);
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void mp_startthem(void);
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int mpbcpu(void);
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void mpinit(void);
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void mpstartthem(void);
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// picirq.c
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void pic_enable(int);
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void pic_init(void);
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void picenable(int);
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void picinit(void);
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// pipe.c
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int pipealloc(struct file**, struct file**);
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@ -136,7 +136,7 @@ int fetchstr(struct proc*, uint, char**);
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void syscall(void);
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// timer.c
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void timer_init(void);
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void timerinit(void);
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// trap.c
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void idtinit(void);
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34
ide.c
34
ide.c
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@ -26,11 +26,11 @@ static struct spinlock ide_lock;
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static struct buf *ide_queue;
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static int disk_1_present;
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static void ide_start_request();
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static void idestart(struct buf*);
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// Wait for IDE disk to become ready.
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static int
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ide_wait_ready(int check_error)
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idewait(int check_error)
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{
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int r;
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@ -42,14 +42,14 @@ ide_wait_ready(int check_error)
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}
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void
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ide_init(void)
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ideinit(void)
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{
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int i;
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initlock(&ide_lock, "ide");
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pic_enable(IRQ_IDE);
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ioapic_enable(IRQ_IDE, ncpu - 1);
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ide_wait_ready(0);
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picenable(IRQ_IDE);
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ioapicenable(IRQ_IDE, ncpu - 1);
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idewait(0);
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// Check if disk 1 is present
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outb(0x1f6, 0xe0 | (1<<4));
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@ -66,12 +66,12 @@ ide_init(void)
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// Start the request for b. Caller must hold ide_lock.
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static void
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ide_start_request(struct buf *b)
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idestart(struct buf *b)
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{
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if(b == 0)
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panic("ide_start_request");
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panic("idestart");
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ide_wait_ready(0);
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idewait(0);
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outb(0x3f6, 0); // generate interrupt
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outb(0x1f2, 1); // number of sectors
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outb(0x1f3, b->sector & 0xff);
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@ -88,7 +88,7 @@ ide_start_request(struct buf *b)
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// Interrupt handler.
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void
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ide_intr(void)
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ideintr(void)
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{
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struct buf *b;
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@ -99,7 +99,7 @@ ide_intr(void)
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}
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// Read data if needed.
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if(!(b->flags & B_DIRTY) && ide_wait_ready(1) >= 0)
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if(!(b->flags & B_DIRTY) && idewait(1) >= 0)
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insl(0x1f0, b->data, 512/4);
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// Wake process waiting for this buf.
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@ -109,7 +109,7 @@ ide_intr(void)
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// Start disk on next buf in queue.
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if((ide_queue = b->qnext) != 0)
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ide_start_request(ide_queue);
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idestart(ide_queue);
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release(&ide_lock);
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}
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@ -119,16 +119,16 @@ ide_intr(void)
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// If B_DIRTY is set, write buf to disk, clear B_DIRTY, set B_VALID.
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// Else if B_VALID is not set, read buf from disk, set B_VALID.
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void
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ide_rw(struct buf *b)
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iderw(struct buf *b)
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{
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struct buf **pp;
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if(!(b->flags & B_BUSY))
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panic("ide_rw: buf not busy");
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panic("iderw: buf not busy");
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if((b->flags & (B_VALID|B_DIRTY)) == B_VALID)
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panic("ide_rw: nothing to do");
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panic("iderw: nothing to do");
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if(b->dev != 0 && !disk_1_present)
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panic("ide disk 1 not present");
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panic("idrw: ide disk 1 not present");
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acquire(&ide_lock);
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@ -140,7 +140,7 @@ ide_rw(struct buf *b)
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// Start disk if necessary.
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if(ide_queue == b)
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ide_start_request(b);
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idestart(b);
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// Wait for request to finish.
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// Assuming will not sleep too long: ignore cp->killed.
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24
ioapic.c
24
ioapic.c
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@ -32,21 +32,21 @@ struct ioapic {
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};
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static uint
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ioapic_read(int reg)
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ioapicread(int reg)
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{
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ioapic->reg = reg;
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return ioapic->data;
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}
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static void
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ioapic_write(int reg, uint data)
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ioapicwrite(int reg, uint data)
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{
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ioapic->reg = reg;
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ioapic->data = data;
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}
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void
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ioapic_init(void)
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ioapicinit(void)
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{
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int i, id, maxintr;
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@ -54,21 +54,21 @@ ioapic_init(void)
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return;
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ioapic = (volatile struct ioapic*)IOAPIC;
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maxintr = (ioapic_read(REG_VER) >> 16) & 0xFF;
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id = ioapic_read(REG_ID) >> 24;
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if(id != ioapic_id)
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cprintf("ioapic_init: id isn't equal to ioapic_id; not a MP\n");
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maxintr = (ioapicread(REG_VER) >> 16) & 0xFF;
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id = ioapicread(REG_ID) >> 24;
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if(id != ioapicid)
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cprintf("ioapicinit: id isn't equal to ioapicid; not a MP\n");
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// Mark all interrupts edge-triggered, active high, disabled,
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// and not routed to any CPUs.
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for(i = 0; i <= maxintr; i++){
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ioapic_write(REG_TABLE+2*i, INT_DISABLED | (IRQ_OFFSET + i));
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ioapic_write(REG_TABLE+2*i+1, 0);
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ioapicwrite(REG_TABLE+2*i, INT_DISABLED | (IRQ_OFFSET + i));
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ioapicwrite(REG_TABLE+2*i+1, 0);
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}
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}
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void
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ioapic_enable(int irq, int cpunum)
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ioapicenable(int irq, int cpunum)
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{
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if(!ismp)
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return;
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@ -76,6 +76,6 @@ ioapic_enable(int irq, int cpunum)
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// Mark interrupt edge-triggered, active high,
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// enabled, and routed to the given cpunum,
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// which happens to be that cpu's APIC ID.
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ioapic_write(REG_TABLE+2*irq, IRQ_OFFSET + irq);
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ioapic_write(REG_TABLE+2*irq+1, cpunum << 24);
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ioapicwrite(REG_TABLE+2*irq, IRQ_OFFSET + irq);
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ioapicwrite(REG_TABLE+2*irq+1, cpunum << 24);
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}
|
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|
|
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6
kbd.c
6
kbd.c
|
|
@ -4,7 +4,7 @@
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#include "kbd.h"
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int
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kbd_getc(void)
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kbdgetc(void)
|
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{
|
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static uint shift;
|
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static uchar *charcode[4] = {
|
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|
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@ -44,7 +44,7 @@ kbd_getc(void)
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}
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void
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kbd_intr(void)
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kbdintr(void)
|
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{
|
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console_intr(kbd_getc);
|
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consoleintr(kbdgetc);
|
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}
|
||||
|
|
|
|||
10
lapic.c
10
lapic.c
|
|
@ -46,7 +46,7 @@ lapicw(int index, int value)
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|||
|
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//PAGEBREAK!
|
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void
|
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lapic_init(int c)
|
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lapicinit(int c)
|
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{
|
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if(!lapic)
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return;
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|
|
@ -99,11 +99,11 @@ cpu(void)
|
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// Would prefer to panic but even printing is chancy here:
|
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// almost everything, including cprintf and panic, calls cpu,
|
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// often indirectly through acquire and release.
|
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if(read_eflags()&FL_IF){
|
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if(readeflags()&FL_IF){
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static int n;
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if(n++ == 0)
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cprintf("cpu called from %x with interrupts enabled\n",
|
||||
((uint*)read_ebp())[1]);
|
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__builtin_return_address(0));
|
||||
}
|
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|
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if(lapic)
|
||||
|
|
@ -113,7 +113,7 @@ cpu(void)
|
|||
|
||||
// Acknowledge interrupt.
|
||||
void
|
||||
lapic_eoi(void)
|
||||
lapiceoi(void)
|
||||
{
|
||||
if(lapic)
|
||||
lapicw(EOI, 0);
|
||||
|
|
@ -136,7 +136,7 @@ microdelay(int us)
|
|||
// Start additional processor running bootstrap code at addr.
|
||||
// See Appendix B of MultiProcessor Specification.
|
||||
void
|
||||
lapic_startap(uchar apicid, uint addr)
|
||||
lapicstartap(uchar apicid, uint addr)
|
||||
{
|
||||
int i;
|
||||
ushort *wrv;
|
||||
|
|
|
|||
20
main.c
20
main.c
|
|
@ -12,22 +12,22 @@ static void mpmain(void) __attribute__((noreturn));
|
|||
int
|
||||
main(void)
|
||||
{
|
||||
mp_init(); // collect info about this machine
|
||||
lapic_init(mp_bcpu());
|
||||
mpinit(); // collect info about this machine
|
||||
lapicinit(mpbcpu());
|
||||
cprintf("\ncpu%d: starting xv6\n\n", cpu());
|
||||
|
||||
pinit(); // process table
|
||||
binit(); // buffer cache
|
||||
pic_init(); // interrupt controller
|
||||
ioapic_init(); // another interrupt controller
|
||||
picinit(); // interrupt controller
|
||||
ioapicinit(); // another interrupt controller
|
||||
kinit(); // physical memory allocator
|
||||
tvinit(); // trap vectors
|
||||
fileinit(); // file table
|
||||
iinit(); // inode cache
|
||||
console_init(); // I/O devices & their interrupts
|
||||
ide_init(); // disk
|
||||
consoleinit(); // I/O devices & their interrupts
|
||||
ideinit(); // disk
|
||||
if(!ismp)
|
||||
timer_init(); // uniprocessor timer
|
||||
timerinit(); // uniprocessor timer
|
||||
userinit(); // first user process
|
||||
bootothers(); // start other processors
|
||||
|
||||
|
|
@ -42,8 +42,8 @@ mpmain(void)
|
|||
{
|
||||
cprintf("cpu%d: mpmain\n", cpu());
|
||||
idtinit();
|
||||
if(cpu() != mp_bcpu())
|
||||
lapic_init(cpu());
|
||||
if(cpu() != mpbcpu())
|
||||
lapicinit(cpu());
|
||||
setupsegs(0);
|
||||
xchg(&cpus[cpu()].booted, 1);
|
||||
|
||||
|
|
@ -71,7 +71,7 @@ bootothers(void)
|
|||
stack = kalloc(KSTACKSIZE);
|
||||
*(void**)(code-4) = stack + KSTACKSIZE;
|
||||
*(void**)(code-8) = mpmain;
|
||||
lapic_startap(c->apicid, (uint)code);
|
||||
lapicstartap(c->apicid, (uint)code);
|
||||
|
||||
// Wait for cpu to get through bootstrap.
|
||||
while(c->booted == 0)
|
||||
|
|
|
|||
28
mp.c
28
mp.c
|
|
@ -14,10 +14,10 @@ struct cpu cpus[NCPU];
|
|||
static struct cpu *bcpu;
|
||||
int ismp;
|
||||
int ncpu;
|
||||
uchar ioapic_id;
|
||||
uchar ioapicid;
|
||||
|
||||
int
|
||||
mp_bcpu(void)
|
||||
mpbcpu(void)
|
||||
{
|
||||
return bcpu-cpus;
|
||||
}
|
||||
|
|
@ -35,7 +35,7 @@ sum(uchar *addr, int len)
|
|||
|
||||
// Look for an MP structure in the len bytes at addr.
|
||||
static struct mp*
|
||||
mp_search1(uchar *addr, int len)
|
||||
mpsearch1(uchar *addr, int len)
|
||||
{
|
||||
uchar *e, *p;
|
||||
|
||||
|
|
@ -52,7 +52,7 @@ mp_search1(uchar *addr, int len)
|
|||
// 2) in the last KB of system base memory;
|
||||
// 3) in the BIOS ROM between 0xE0000 and 0xFFFFF.
|
||||
static struct mp*
|
||||
mp_search(void)
|
||||
mpsearch(void)
|
||||
{
|
||||
uchar *bda;
|
||||
uint p;
|
||||
|
|
@ -60,14 +60,14 @@ mp_search(void)
|
|||
|
||||
bda = (uchar*)0x400;
|
||||
if((p = ((bda[0x0F]<<8)|bda[0x0E]) << 4)){
|
||||
if((mp = mp_search1((uchar*)p, 1024)))
|
||||
if((mp = mpsearch1((uchar*)p, 1024)))
|
||||
return mp;
|
||||
} else {
|
||||
p = ((bda[0x14]<<8)|bda[0x13])*1024;
|
||||
if((mp = mp_search1((uchar*)p-1024, 1024)))
|
||||
if((mp = mpsearch1((uchar*)p-1024, 1024)))
|
||||
return mp;
|
||||
}
|
||||
return mp_search1((uchar*)0xF0000, 0x10000);
|
||||
return mpsearch1((uchar*)0xF0000, 0x10000);
|
||||
}
|
||||
|
||||
// Search for an MP configuration table. For now,
|
||||
|
|
@ -76,12 +76,12 @@ mp_search(void)
|
|||
// if correct, check the version.
|
||||
// To do: check extended table checksum.
|
||||
static struct mpconf*
|
||||
mp_config(struct mp **pmp)
|
||||
mpconfig(struct mp **pmp)
|
||||
{
|
||||
struct mpconf *conf;
|
||||
struct mp *mp;
|
||||
|
||||
if((mp = mp_search()) == 0 || mp->physaddr == 0)
|
||||
if((mp = mpsearch()) == 0 || mp->physaddr == 0)
|
||||
return 0;
|
||||
conf = (struct mpconf*)mp->physaddr;
|
||||
if(memcmp(conf, "PCMP", 4) != 0)
|
||||
|
|
@ -95,7 +95,7 @@ mp_config(struct mp **pmp)
|
|||
}
|
||||
|
||||
void
|
||||
mp_init(void)
|
||||
mpinit(void)
|
||||
{
|
||||
uchar *p, *e;
|
||||
struct mp *mp;
|
||||
|
|
@ -104,7 +104,7 @@ mp_init(void)
|
|||
struct mpioapic *ioapic;
|
||||
|
||||
bcpu = &cpus[ncpu];
|
||||
if((conf = mp_config(&mp)) == 0)
|
||||
if((conf = mpconfig(&mp)) == 0)
|
||||
return;
|
||||
|
||||
ismp = 1;
|
||||
|
|
@ -122,7 +122,7 @@ mp_init(void)
|
|||
continue;
|
||||
case MPIOAPIC:
|
||||
ioapic = (struct mpioapic*)p;
|
||||
ioapic_id = ioapic->apicno;
|
||||
ioapicid = ioapic->apicno;
|
||||
p += sizeof(struct mpioapic);
|
||||
continue;
|
||||
case MPBUS:
|
||||
|
|
@ -131,8 +131,8 @@ mp_init(void)
|
|||
p += 8;
|
||||
continue;
|
||||
default:
|
||||
cprintf("mp_init: unknown config type %x\n", *p);
|
||||
panic("mp_init");
|
||||
cprintf("mpinit: unknown config type %x\n", *p);
|
||||
panic("mpinit");
|
||||
}
|
||||
}
|
||||
|
||||
|
|
|
|||
10
picirq.c
10
picirq.c
|
|
@ -15,7 +15,7 @@
|
|||
static ushort irqmask = 0xFFFF & ~(1<<IRQ_SLAVE);
|
||||
|
||||
static void
|
||||
pic_setmask(ushort mask)
|
||||
picsetmask(ushort mask)
|
||||
{
|
||||
irqmask = mask;
|
||||
outb(IO_PIC1+1, mask);
|
||||
|
|
@ -23,14 +23,14 @@ pic_setmask(ushort mask)
|
|||
}
|
||||
|
||||
void
|
||||
pic_enable(int irq)
|
||||
picenable(int irq)
|
||||
{
|
||||
pic_setmask(irqmask & ~(1<<irq));
|
||||
picsetmask(irqmask & ~(1<<irq));
|
||||
}
|
||||
|
||||
// Initialize the 8259A interrupt controllers.
|
||||
void
|
||||
pic_init(void)
|
||||
picinit(void)
|
||||
{
|
||||
// mask all interrupts
|
||||
outb(IO_PIC1+1, 0xFF);
|
||||
|
|
@ -80,5 +80,5 @@ pic_init(void)
|
|||
outb(IO_PIC2, 0x0a); // OCW3
|
||||
|
||||
if(irqmask != 0xFFFF)
|
||||
pic_setmask(irqmask);
|
||||
picsetmask(irqmask);
|
||||
}
|
||||
|
|
|
|||
2
proc.c
2
proc.c
|
|
@ -242,7 +242,7 @@ sched(void)
|
|||
{
|
||||
int intena;
|
||||
|
||||
if(read_eflags()&FL_IF)
|
||||
if(readeflags()&FL_IF)
|
||||
panic("sched interruptible");
|
||||
if(cp->state == RUNNING)
|
||||
panic("sched running");
|
||||
|
|
|
|||
|
|
@ -100,7 +100,7 @@ pushcli(void)
|
|||
{
|
||||
int eflags;
|
||||
|
||||
eflags = read_eflags();
|
||||
eflags = readeflags();
|
||||
cli();
|
||||
if(cpus[cpu()].ncli++ == 0)
|
||||
cpus[cpu()].intena = eflags & FL_IF;
|
||||
|
|
@ -109,7 +109,7 @@ pushcli(void)
|
|||
void
|
||||
popcli(void)
|
||||
{
|
||||
if(read_eflags()&FL_IF)
|
||||
if(readeflags()&FL_IF)
|
||||
panic("popcli - interruptible");
|
||||
if(--cpus[cpu()].ncli < 0)
|
||||
panic("popcli");
|
||||
|
|
|
|||
4
timer.c
4
timer.c
|
|
@ -22,13 +22,13 @@
|
|||
#define TIMER_16BIT 0x30 // r/w counter 16 bits, LSB first
|
||||
|
||||
void
|
||||
timer_init(void)
|
||||
timerinit(void)
|
||||
{
|
||||
// Interrupt 100 times/sec.
|
||||
outb(TIMER_MODE, TIMER_SEL0 | TIMER_RATEGEN | TIMER_16BIT);
|
||||
outb(IO_TIMER1, TIMER_DIV(100) % 256);
|
||||
outb(IO_TIMER1, TIMER_DIV(100) / 256);
|
||||
pic_enable(IRQ_TIMER);
|
||||
picenable(IRQ_TIMER);
|
||||
}
|
||||
|
||||
|
||||
|
|
|
|||
12
trap.c
12
trap.c
|
|
@ -52,20 +52,20 @@ trap(struct trapframe *tf)
|
|||
wakeup(&ticks);
|
||||
release(&tickslock);
|
||||
}
|
||||
lapic_eoi();
|
||||
lapiceoi();
|
||||
break;
|
||||
case IRQ_OFFSET + IRQ_IDE:
|
||||
ide_intr();
|
||||
lapic_eoi();
|
||||
ideintr();
|
||||
lapiceoi();
|
||||
break;
|
||||
case IRQ_OFFSET + IRQ_KBD:
|
||||
kbd_intr();
|
||||
lapic_eoi();
|
||||
kbdintr();
|
||||
lapiceoi();
|
||||
break;
|
||||
case IRQ_OFFSET + IRQ_SPURIOUS:
|
||||
cprintf("cpu%d: spurious interrupt at %x:%x\n",
|
||||
cpu(), tf->cs, tf->eip);
|
||||
lapic_eoi();
|
||||
lapiceoi();
|
||||
break;
|
||||
|
||||
default:
|
||||
|
|
|
|||
17
x86.h
17
x86.h
|
|
@ -48,15 +48,6 @@ stosb(void *addr, int data, int cnt)
|
|||
"memory", "cc");
|
||||
}
|
||||
|
||||
static inline uint
|
||||
read_ebp(void)
|
||||
{
|
||||
uint ebp;
|
||||
|
||||
asm volatile("movl %%ebp, %0" : "=a" (ebp));
|
||||
return ebp;
|
||||
}
|
||||
|
||||
struct segdesc;
|
||||
|
||||
static inline void
|
||||
|
|
@ -92,19 +83,13 @@ ltr(ushort sel)
|
|||
}
|
||||
|
||||
static inline uint
|
||||
read_eflags(void)
|
||||
readeflags(void)
|
||||
{
|
||||
uint eflags;
|
||||
asm volatile("pushfl; popl %0" : "=r" (eflags));
|
||||
return eflags;
|
||||
}
|
||||
|
||||
static inline void
|
||||
write_eflags(uint eflags)
|
||||
{
|
||||
asm volatile("pushl %0; popfl" : : "r" (eflags));
|
||||
}
|
||||
|
||||
static inline uint
|
||||
xchg(volatile uint *addr, uint newval)
|
||||
{
|
||||
|
|
|
|||
Loading…
Reference in New Issue