Update u-boot links
Signed-off-by: Sanchayan Maity <sanchayan.maity@harman.com>
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3 changed files with 6 additions and 4 deletions
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.gitignore
vendored
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*.log
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*.out
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*.synctex.gz
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*.fdb_latexmk
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*.fls
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@ -89,9 +89,9 @@ Passionate about Linux and Open-source. Have made contributions to upstream Linu
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\resumeSubItem{Advanced Knowledge}
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{C, Linux Device Drivers, Linux System Programming}
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\resumeSubItem{Intermediate Knowledge}
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{OpenEmbedded/Yocto, buildroot, u-boot, FreeRTOS, gdb, git, Qt, gstreamer}
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{OpenEmbedded/Yocto, buildroot, u-boot, FreeRTOS, gdb, git, Qt, gstreamer, Haskell}
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\resumeSubItem{Basic Knowledge}
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{Haskell, Rust, Clojure, C++, Python, SQLite, mySQL, PostgreSQL, JIRA}
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{Rust, Clojure, C++, Python, SQLite, mySQL, PostgreSQL, JIRA}
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\resumeSubHeadingListEnd
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%-----------EXPERIENCE-----------------
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@ -119,9 +119,9 @@ Passionate about Linux and Open-source. Have made contributions to upstream Linu
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{Toradex}{Bangalore, IN}
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{Linux Development Engineer. Responsible for BSP development, maintenance \& customer support.}{Aug 2014 - Dec 2017}
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\resumeItemListStart
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\resumeItem{\href{http://git.denx.de/?p=u-boot.git&a=search&h=HEAD&st=author&s=sanchayan}{u-boot}}
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\resumeItem{\href{https://gitlab.denx.de/u-boot/u-boot/commits/master?search=maitysanchayan@gmail.com}{u-boot}}
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{Responsible for up-streaming u-boot boot-loader support for Toradex Colibri Vybrid module based on NXP Vybrid processor.}
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\resumeItem{\href{http://git.denx.de/?p=u-boot.git;a=blob;f=drivers/usb/host/ehci-vf.c;h=5bb3763814197217a945d64f456cf61a94a5e69d;hb=HEAD}{u-boot USB}}
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\resumeItem{\href{https://gitlab.denx.de/u-boot/u-boot/blob/HEAD/drivers/usb/host/ehci-vf.c}{u-boot USB}}
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{Implemented USB host support in u-boot boot-loader for NXP Vybrid processor.}
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\resumeItem{\href{http://git.toradex.com/cgit/linux-toradex.git/commit/drivers/rpmsg/vf610_rpmsg.c?h=toradex_vf_4.4&id=5feabad053bd3d31fa9aab3ac6b6c06b9260aeec}{remoteproc/rpmsg}}
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{Implemented remote processor communication support using remoteproc/rpmsg subsystem in Linux on NXP Vybrid processor. Vybrid is an asymmetric heterogeneous multi-core processor with both Cortex A5 and Cortex M4 core on same SoC die. This project involved the implementation of a driver
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