9ba760e603
ask to map in oxpcie i/o memory and support serial i/o for it in the kernel. set oxpcie=<address> in boot monitor (retrieve address using pci_debug=1 output). (no sanity checking is done on the address currently.) disabled by default. The change also contains some other minor cleanup (a new serial.h to set register info common to UART and the OXPCIe card, in-kernel memory mapping a little more structured and env_get() to get sysenv variables without knowing about the params_buffer).
32 lines
1.4 KiB
C
32 lines
1.4 KiB
C
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_PROTOTYPE( void oxpcie_set_vaddr, (unsigned char *vaddr));
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_PROTOTYPE( void oxpcie_putc, (char c));
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_PROTOTYPE( int oxpcie_in, (void));
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#include "serial.h"
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/* OXPCIe952 info */
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#define UART1BASE_550 0x1000
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#define UART1BASE_650 0x1090
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#define UART1BASE_950
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#define BASELINEICR (UART1BASE_550 + 0xC0)
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#define OXPCIE_THR oxpcie_vaddr[UART1BASE_550 + THRREG]
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#define OXPCIE_RBR oxpcie_vaddr[UART1BASE_550 + RBRREG]
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#define OXPCIE_LSR oxpcie_vaddr[UART1BASE_550 + LSRREG]
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#define OXPCIE_LCR oxpcie_vaddr[UART1BASE_550 + LCRREG]
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#define OXPCIE_DLL oxpcie_vaddr[UART1BASE_550 + 0x00]
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#define OXPCIE_DLM oxpcie_vaddr[UART1BASE_550 + 0x01]
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#define OXPCIE_FICR oxpcie_vaddr[UART1BASE_550 + FICRREG]
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#define OXPCIE_SPR oxpcie_vaddr[UART1BASE_550 + SPRREG]
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#define OXPCIE_EFR oxpcie_vaddr[UART1BASE_650 + 0x10]
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#define OXPCIE_ICR oxpcie_vaddr[UART1BASE_950 + 0x05]
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#define OXPCIE_CPR oxpcie_vaddr[BASELINEICR + 0x01]
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#define OXPCIE_TCR oxpcie_vaddr[BASELINEICR + 0x02]
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#define OXPCIE_CPR2 oxpcie_vaddr[BASELINEICR + 0x03]
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#define OXPCIE_CSR oxpcie_vaddr[BASELINEICR + 0x0C]
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#define OXPCIE_PIDX oxpcie_vaddr[BASELINEICR + 0x12]
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#define LCR_CONFIG 0x03 /* bits 6:0 -= 0x03 => 8N1, no break. */
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