21 lines
746 B
C
21 lines
746 B
C
#ifndef _OMAP_CCNT_H
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#define _OMAP_CCNT_H
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/* ARM ARM B4.1.116 */
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#define OMAP_PMCNTENSET_C (1 << 31) /* Enable PMCCNTR cycle counter */
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/* ARM ARM B4.1.117 PMCR */
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#define OMAP_PMCR_DP (1 << 5) /* Disable when ev. cnt. prohibited */
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#define OMAP_PMCR_X (1 << 4) /* Export enable */
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#define OMAP_PMCR_D (1 << 3) /* Clock divider */
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#define OMAP_PMCR_C (1 << 2) /* Cycle counter reset */
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#define OMAP_PMCR_P (1 << 1) /* Event counter reset */
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#define OMAP_PMCR_E (1 << 0) /* Enable event counters */
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/* ARM ARM B4.1.119 PMINTENSET */
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#define OMAP_PMINTENSET_C (1 << 31) /* PMCCNTR overflow int req. enable*/
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/* ARM ARM B4.1.124 PMUSERENR */
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#define OMAP_PMUSERENR_EN (1 << 0) /* User mode access enable bit */
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#endif /* _OMAP_CCNT_H */
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