e6bac75a8b
The natural term to use when talking about MINIX big pages on ARM is SECTION. A section is a level 1 page table entry pointing to a 1MB area. Change-Id: I9bd27ca99bc772126c31c27a537b1415db20c4a6
53 lines
1.6 KiB
C
53 lines
1.6 KiB
C
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#ifndef _PAGETABLE_H
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#define _PAGETABLE_H 1
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#include <stdint.h>
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#include <machine/vm.h>
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#include "vm.h"
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/* Mapping flags. */
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#define PTF_WRITE ARM_VM_PTE_RW
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#define PTF_READ ARM_VM_PTE_RO
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#define PTF_PRESENT ARM_VM_PTE_PRESENT
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#define PTF_SUPER ARM_VM_PTE_SUPER
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#define PTF_USER ARM_VM_PTE_USER
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#define PTF_NOCACHE ARM_VM_PTE_DEVICE
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#define PTF_CACHEWB ARM_VM_PTE_WB
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#define PTF_CACHEWT ARM_VM_PTE_WT
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#define PTF_SHARE ARM_VM_PTE_SHAREABLE
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#define ARCH_VM_DIR_ENTRIES ARM_VM_DIR_ENTRIES
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#define ARCH_BIG_PAGE_SIZE ARM_SECTION_SIZE
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#define ARCH_VM_ADDR_MASK ARM_VM_ADDR_MASK
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#define ARCH_VM_PDE_MASK ARM_VM_PDE_MASK
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#define ARCH_VM_PDE_PRESENT ARM_VM_PDE_PRESENT
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#define ARCH_VM_PTE_PRESENT ARM_VM_PTE_PRESENT
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#define ARCH_VM_PTE_USER ARM_VM_PTE_USER
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#define ARCH_PAGEDIR_SIZE ARM_PAGEDIR_SIZE
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#define ARCH_VM_PTE_RW ARM_VM_PTE_RW
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#define ARCH_VM_BIGPAGE ARM_VM_SECTION
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#define ARCH_VM_PT_ENTRIES ARM_VM_PT_ENTRIES
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#define ARCH_VM_PTE_RO ARM_VM_PTE_RO
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/* For arch-specific PT routines to check if no bits outside
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* the regular flags are set.
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*/
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#define PTF_ALLFLAGS (PTF_READ|PTF_WRITE|PTF_PRESENT|PTF_SUPER|PTF_USER|PTF_NOCACHE|PTF_CACHEWB|PTF_CACHEWT|PTF_SHARE)
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#define PFERR_PROT(e) ((ARM_VM_PFE_FS(e) == ARM_VM_PFE_L1PERM) \
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|| (ARM_VM_PFE_FS(e) == ARM_VM_PFE_L2PERM))
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#define PFERR_NOPAGE(e) (!PFERR_PROT(e))
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#define PFERR_WRITE(e) ((e) & ARM_VM_PFE_W)
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#define PFERR_READ(e) (!((e) & ARM_VM_PFE_W))
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#define VM_PAGE_SIZE ARM_PAGE_SIZE
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/* virtual address -> pde, pte macros */
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#define ARCH_VM_PTE(v) ARM_VM_PTE(v)
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#define ARCH_VM_PDE(v) ARM_VM_PDE(v)
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#endif
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