fa59fc6eb4
Headers that will be shared between old includes and NetBSD-like includes are moved into common/include tree. They are still copied in /usr/include in 'make includes', so compilation and programs aren't be affected.
125 lines
5.1 KiB
C
125 lines
5.1 KiB
C
/* Definitions of several known BIOS addresses. The addresses listed here
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* are found in three memory areas that have been defined in <ibm/memory.h>.
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* - the BIOS interrupt vectors
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* - the BIOS data area
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* - the motherboard BIOS memory
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*
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* Created: March 2005, Jorrit N. Herder
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*/
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#ifndef _BIOS_H
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#define _BIOS_H
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/* PART I --
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* The BIOS interrupt vector table (IVT) area (1024 B as of address 0x0000).
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* Although this area holds 256 interrupt vectors (with jump addresses), some
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* vectors actually contain important BIOS data. Some addresses are below.
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*/
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#define BIOS_EQUIP_CHECK_ADDR 0x0044
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#define BIOS_EQUIP_CHECK_SIZE 4L
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#define BIOS_VIDEO_PARAMS_ADDR 0x0074
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#define BIOS_VIDEO_PARAMS_SIZE 4L
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#define BIOS_FLOP_PARAMS_ADDR 0x0078
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#define BIOS_FLOP_PARAMS_SIZE 4L
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#define BIOS_HD0_PARAMS_ADDR 0x0104 /* disk 0 parameters */
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#define BIOS_HD0_PARAMS_SIZE 4L
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#define BIOS_HD1_PARAMS_ADDR 0x0118 /* disk 1 parameters */
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#define BIOS_HD1_PARAMS_SIZE 4L
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/* PART I --
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* Addresses in the BIOS data area (256 B as of address 0x0400). The addresses
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* listed below are the most important ones, and the ones that are currently
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* used. Other addresses may be defined below when new features are added.
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*/
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/* Serial ports (COM1-COM4). */
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#define COM1_IO_PORT_ADDR 0x400 /* COM1 port address */
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#define COM1_IO_PORT_SIZE 2L
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#define COM2_IO_PORT_ADDR 0x402 /* COM2 port address */
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#define COM2_IO_PORT_SIZE 2L
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#define COM3_IO_PORT_ADDR 0x404 /* COM3 port address */
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#define COM3_IO_PORT_SIZE 2L
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#define COM4_IO_PORT_ADDR 0x406 /* COM4 port address */
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#define COM4_IO_PORT_SIZE 2L
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/* Parallel ports (LPT1-LPT4). */
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#define LPT1_IO_PORT_ADDR 0x408 /* LPT1 port address */
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#define LPT1_IO_PORT_SIZE 2L
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#define LPT2_IO_PORT_ADDR 0x40A /* LPT2 port address */
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#define LPT2_IO_PORT_SIZE 2L
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#define LPT3_IO_PORT_ADDR 0x40C /* LPT3 port address */
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#define LPT3_IO_PORT_SIZE 2L
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#define LPT4_IO_PORT_ADDR 0x40E /* LPT4 port (except on PS/2) */
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#define LPT4_IO_PORT_SIZE 2L
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/* Video controller (VDU). */
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#define VDU_SCREEN_COLS_ADDR 0x44A /* VDU nr of screen columns */
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#define VDU_SCREEN_COLS_SIZE 2L
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/* Base I/O port address for active 6845 CRT controller. */
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#define VDU_CRT_BASE_ADDR 0x463 /* 3B4h = mono, 3D4h = color */
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#define VDU_CRT_BASE_SIZE 2L
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/* Soft reset flags to control shutdown. */
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#define SOFT_RESET_FLAG_ADDR 0x472 /* soft reset flag on Ctl-Alt-Del */
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#define SOFT_RESET_FLAG_SIZE 2L
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#define STOP_MEM_CHECK 0x1234 /* bypass memory tests & CRT init */
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#define PRESERVE_MEMORY 0x4321 /* preserve memory */
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#define SYSTEM_SUSPEND 0x5678 /* system suspend */
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#define MANUFACTURER_TEST 0x9ABC /* manufacturer test */
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#define CONVERTIBLE_POST 0xABCD /* convertible POST loop */
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/* ... many other values are used during POST */
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/* Hard disk parameters. (Also see BIOS interrupt vector table above.) */
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#define NR_HD_DRIVES_ADDR 0x475 /* number of hard disk drives */
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#define NR_HD_DRIVES_SIZE 1L
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/* Parallel ports (LPT1-LPT4) timeout values. */
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#define LPT1_TIMEOUT_ADDR 0x478 /* time-out value for LPT1 */
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#define LPT1_TIMEOUT_SIZE 1L
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#define LPT2_TIMEOUT_ADDR 0x479 /* time-out value for LPT2 */
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#define LPT2_TIMEOUT_SIZE 1L
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#define LPT3_TIMEOUT_ADDR 0x47A /* time-out value for LPT3 */
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#define LPT3_TIMEOUT_SIZE 1L
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#define LPT4_TIMEOUT_ADDR 0x47B /* time-out for LPT4 (except PS/2) */
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#define LPT4_TIMEOUT_SIZE 1L
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/* Serial ports (COM1-COM4) timeout values. */
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#define COM1_TIMEOUT_ADDR 0x47C /* time-out value for COM1 */
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#define COM1_TIMEOUT_SIZE 1L
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#define COM2_TIMEOUT_ADDR 0x47D /* time-out value for COM2 */
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#define COM2_TIMEOUT_SIZE 1L
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#define COM3_TIMEOUT_ADDR 0x47E /* time-out value for COM3 */
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#define COM3_TIMEOUT_SIZE 1L
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#define COM4_TIMEOUT_ADDR 0x47F /* time-out value for COM4 */
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#define COM4_TIMEOUT_SIZE 1L
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/* Video controller (VDU). */
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#define VDU_SCREEN_ROWS_ADDR 0x484 /* screen rows (less 1, EGA+)*/
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#define VDU_SCREEN_ROWS_SIZE 1L
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#define VDU_FONTLINES_ADDR 0x485 /* point height of char matrix */
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#define VDU_FONTLINES_SIZE 2L
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/* Video controller (VDU). */
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#define VDU_VIDEO_MODE_ADDR 0x49A /* current video mode */
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#define VDU_VIDEO_MODE_SIZE 1L
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/* PART III --
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* The motherboard BIOS memory contains some known values that are currently
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* in use. Other sections in the upper memory area (UMA) addresses vary in
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* size and locus and are not further defined here. A rough map is given in
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* <ibm/memory.h>.
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*/
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/* Machine ID (we're interested in PS/2 and AT models). */
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#define MACHINE_ID_ADDR 0xFFFFE /* BIOS machine ID byte */
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#define MACHINE_ID_SIZE 1L
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#define PS_386_MACHINE 0xF8 /* ID byte for PS/2 modela 70/80 */
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#define PC_AT_MACHINE 0xFC /* PC/AT, PC/XT286, PS/2 models 50/60 */
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#endif /* _BIOS_H */
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