. file- and functionality-compatible with previous situation (FreeBSD csu) (with a crt1.o -> crt0.o symlink in /usr/lib) . harmonizes source with netbsd . harmonizes linker invocation (e.g. clang) with netbsd . helpful to get some arm code in there for the arm port project
732 lines
22 KiB
C
732 lines
22 KiB
C
/* $NetBSD: mdreloc.c,v 1.50 2010/09/24 12:00:10 skrll Exp $ */
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/*-
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* Copyright (c) 2000 Eduardo Horvath.
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* Copyright (c) 1999, 2002 The NetBSD Foundation, Inc.
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* All rights reserved.
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*
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* This code is derived from software contributed to The NetBSD Foundation
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* by Paul Kranenburg and by Charles M. Hannum.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
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* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
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* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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#include <sys/cdefs.h>
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#ifndef lint
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__RCSID("$NetBSD: mdreloc.c,v 1.50 2010/09/24 12:00:10 skrll Exp $");
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#endif /* not lint */
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#include <errno.h>
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#include <stdio.h>
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#include <stdlib.h>
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#include <string.h>
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#include <unistd.h>
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#include "rtldenv.h"
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#include "debug.h"
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#include "rtld.h"
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/*
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* The following table holds for each relocation type:
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* - the width in bits of the memory location the relocation
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* applies to (not currently used)
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* - the number of bits the relocation value must be shifted to the
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* right (i.e. discard least significant bits) to fit into
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* the appropriate field in the instruction word.
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* - flags indicating whether
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* * the relocation involves a symbol
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* * the relocation is relative to the current position
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* * the relocation is for a GOT entry
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* * the relocation is relative to the load address
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*
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*/
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#define _RF_S 0x80000000 /* Resolve symbol */
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#define _RF_A 0x40000000 /* Use addend */
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#define _RF_P 0x20000000 /* Location relative */
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#define _RF_G 0x10000000 /* GOT offset */
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#define _RF_B 0x08000000 /* Load address relative */
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#define _RF_U 0x04000000 /* Unaligned */
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#define _RF_SZ(s) (((s) & 0xff) << 8) /* memory target size */
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#define _RF_RS(s) ( (s) & 0xff) /* right shift */
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static const int reloc_target_flags[] = {
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0, /* NONE */
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_RF_S|_RF_A| _RF_SZ(8) | _RF_RS(0), /* RELOC_8 */
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_RF_S|_RF_A| _RF_SZ(16) | _RF_RS(0), /* RELOC_16 */
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_RF_S|_RF_A| _RF_SZ(32) | _RF_RS(0), /* RELOC_32 */
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_RF_S|_RF_A|_RF_P| _RF_SZ(8) | _RF_RS(0), /* DISP_8 */
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_RF_S|_RF_A|_RF_P| _RF_SZ(16) | _RF_RS(0), /* DISP_16 */
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_RF_S|_RF_A|_RF_P| _RF_SZ(32) | _RF_RS(0), /* DISP_32 */
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_RF_S|_RF_A|_RF_P| _RF_SZ(32) | _RF_RS(2), /* WDISP_30 */
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_RF_S|_RF_A|_RF_P| _RF_SZ(32) | _RF_RS(2), /* WDISP_22 */
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_RF_S|_RF_A| _RF_SZ(32) | _RF_RS(10), /* HI22 */
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_RF_S|_RF_A| _RF_SZ(32) | _RF_RS(0), /* 22 */
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_RF_S|_RF_A| _RF_SZ(32) | _RF_RS(0), /* 13 */
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_RF_S|_RF_A| _RF_SZ(32) | _RF_RS(0), /* LO10 */
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_RF_G| _RF_SZ(32) | _RF_RS(0), /* GOT10 */
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_RF_G| _RF_SZ(32) | _RF_RS(0), /* GOT13 */
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_RF_G| _RF_SZ(32) | _RF_RS(10), /* GOT22 */
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_RF_S|_RF_A|_RF_P| _RF_SZ(32) | _RF_RS(0), /* PC10 */
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_RF_S|_RF_A|_RF_P| _RF_SZ(32) | _RF_RS(10), /* PC22 */
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_RF_A|_RF_P| _RF_SZ(32) | _RF_RS(2), /* WPLT30 */
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_RF_SZ(32) | _RF_RS(0), /* COPY */
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_RF_S|_RF_A| _RF_SZ(64) | _RF_RS(0), /* GLOB_DAT */
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_RF_SZ(32) | _RF_RS(0), /* JMP_SLOT */
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_RF_A| _RF_B| _RF_SZ(64) | _RF_RS(0), /* RELATIVE */
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_RF_S|_RF_A| _RF_U| _RF_SZ(32) | _RF_RS(0), /* UA_32 */
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_RF_A| _RF_SZ(32) | _RF_RS(0), /* PLT32 */
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_RF_A| _RF_SZ(32) | _RF_RS(10), /* HIPLT22 */
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_RF_A| _RF_SZ(32) | _RF_RS(0), /* LOPLT10 */
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_RF_A|_RF_P| _RF_SZ(32) | _RF_RS(0), /* PCPLT32 */
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_RF_A|_RF_P| _RF_SZ(32) | _RF_RS(10), /* PCPLT22 */
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_RF_A|_RF_P| _RF_SZ(32) | _RF_RS(0), /* PCPLT10 */
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_RF_S|_RF_A| _RF_SZ(32) | _RF_RS(0), /* 10 */
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_RF_S|_RF_A| _RF_SZ(32) | _RF_RS(0), /* 11 */
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_RF_S|_RF_A| _RF_SZ(64) | _RF_RS(0), /* 64 */
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_RF_S|_RF_A|/*extra*/ _RF_SZ(32) | _RF_RS(0), /* OLO10 */
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_RF_S|_RF_A| _RF_SZ(32) | _RF_RS(42), /* HH22 */
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_RF_S|_RF_A| _RF_SZ(32) | _RF_RS(32), /* HM10 */
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_RF_S|_RF_A| _RF_SZ(32) | _RF_RS(10), /* LM22 */
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_RF_S|_RF_A|_RF_P| _RF_SZ(32) | _RF_RS(42), /* PC_HH22 */
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_RF_S|_RF_A|_RF_P| _RF_SZ(32) | _RF_RS(32), /* PC_HM10 */
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_RF_S|_RF_A|_RF_P| _RF_SZ(32) | _RF_RS(10), /* PC_LM22 */
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_RF_S|_RF_A|_RF_P| _RF_SZ(32) | _RF_RS(2), /* WDISP16 */
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_RF_S|_RF_A|_RF_P| _RF_SZ(32) | _RF_RS(2), /* WDISP19 */
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_RF_S|_RF_A| _RF_SZ(32) | _RF_RS(0), /* GLOB_JMP */
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_RF_S|_RF_A| _RF_SZ(32) | _RF_RS(0), /* 7 */
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_RF_S|_RF_A| _RF_SZ(32) | _RF_RS(0), /* 5 */
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_RF_S|_RF_A| _RF_SZ(32) | _RF_RS(0), /* 6 */
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_RF_S|_RF_A|_RF_P| _RF_SZ(64) | _RF_RS(0), /* DISP64 */
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_RF_A| _RF_SZ(64) | _RF_RS(0), /* PLT64 */
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_RF_S|_RF_A| _RF_SZ(32) | _RF_RS(10), /* HIX22 */
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_RF_S|_RF_A| _RF_SZ(32) | _RF_RS(0), /* LOX10 */
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_RF_S|_RF_A| _RF_SZ(32) | _RF_RS(22), /* H44 */
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_RF_S|_RF_A| _RF_SZ(32) | _RF_RS(12), /* M44 */
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_RF_S|_RF_A| _RF_SZ(32) | _RF_RS(0), /* L44 */
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_RF_S|_RF_A| _RF_SZ(64) | _RF_RS(0), /* REGISTER */
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_RF_S|_RF_A| _RF_U| _RF_SZ(64) | _RF_RS(0), /* UA64 */
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_RF_S|_RF_A| _RF_U| _RF_SZ(16) | _RF_RS(0), /* UA16 */
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};
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#ifdef RTLD_DEBUG_RELOC
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static const char *reloc_names[] = {
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"NONE", "RELOC_8", "RELOC_16", "RELOC_32", "DISP_8",
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"DISP_16", "DISP_32", "WDISP_30", "WDISP_22", "HI22",
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"22", "13", "LO10", "GOT10", "GOT13",
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"GOT22", "PC10", "PC22", "WPLT30", "COPY",
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"GLOB_DAT", "JMP_SLOT", "RELATIVE", "UA_32", "PLT32",
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"HIPLT22", "LOPLT10", "LOPLT10", "PCPLT22", "PCPLT32",
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"10", "11", "64", "OLO10", "HH22",
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"HM10", "LM22", "PC_HH22", "PC_HM10", "PC_LM22",
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"WDISP16", "WDISP19", "GLOB_JMP", "7", "5", "6",
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"DISP64", "PLT64", "HIX22", "LOX10", "H44", "M44",
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"L44", "REGISTER", "UA64", "UA16"
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};
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#endif
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#define RELOC_RESOLVE_SYMBOL(t) ((reloc_target_flags[t] & _RF_S) != 0)
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#define RELOC_PC_RELATIVE(t) ((reloc_target_flags[t] & _RF_P) != 0)
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#define RELOC_BASE_RELATIVE(t) ((reloc_target_flags[t] & _RF_B) != 0)
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#define RELOC_UNALIGNED(t) ((reloc_target_flags[t] & _RF_U) != 0)
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#define RELOC_USE_ADDEND(t) ((reloc_target_flags[t] & _RF_A) != 0)
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#define RELOC_TARGET_SIZE(t) ((reloc_target_flags[t] >> 8) & 0xff)
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#define RELOC_VALUE_RIGHTSHIFT(t) (reloc_target_flags[t] & 0xff)
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static const long reloc_target_bitmask[] = {
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#define _BM(x) (~(-(1ULL << (x))))
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0, /* NONE */
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_BM(8), _BM(16), _BM(32), /* RELOC_8, _16, _32 */
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_BM(8), _BM(16), _BM(32), /* DISP8, DISP16, DISP32 */
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_BM(30), _BM(22), /* WDISP30, WDISP22 */
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_BM(22), _BM(22), /* HI22, _22 */
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_BM(13), _BM(10), /* RELOC_13, _LO10 */
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_BM(10), _BM(13), _BM(22), /* GOT10, GOT13, GOT22 */
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_BM(10), _BM(22), /* _PC10, _PC22 */
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_BM(30), 0, /* _WPLT30, _COPY */
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_BM(32), _BM(32), _BM(32), /* _GLOB_DAT, JMP_SLOT, _RELATIVE */
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_BM(32), _BM(32), /* _UA32, PLT32 */
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_BM(22), _BM(10), /* _HIPLT22, LOPLT10 */
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_BM(32), _BM(22), _BM(10), /* _PCPLT32, _PCPLT22, _PCPLT10 */
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_BM(10), _BM(11), -1, /* _10, _11, _64 */
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_BM(10), _BM(22), /* _OLO10, _HH22 */
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_BM(10), _BM(22), /* _HM10, _LM22 */
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_BM(22), _BM(10), _BM(22), /* _PC_HH22, _PC_HM10, _PC_LM22 */
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_BM(16), _BM(19), /* _WDISP16, _WDISP19 */
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-1, /* GLOB_JMP */
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_BM(7), _BM(5), _BM(6) /* _7, _5, _6 */
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-1, -1, /* DISP64, PLT64 */
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_BM(22), _BM(13), /* HIX22, LOX10 */
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_BM(22), _BM(10), _BM(13), /* H44, M44, L44 */
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-1, -1, _BM(16), /* REGISTER, UA64, UA16 */
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#undef _BM
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};
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#define RELOC_VALUE_BITMASK(t) (reloc_target_bitmask[t])
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/*
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* Instruction templates:
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*/
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#define BAA 0x10400000 /* ba,a %xcc, 0 */
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#define SETHI 0x03000000 /* sethi %hi(0), %g1 */
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#define JMP 0x81c06000 /* jmpl %g1+%lo(0), %g0 */
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#define NOP 0x01000000 /* sethi %hi(0), %g0 */
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#define OR 0x82806000 /* or %g1, 0, %g1 */
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#define XOR 0x82c06000 /* xor %g1, 0, %g1 */
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#define MOV71 0x8283a000 /* or %o7, 0, %g1 */
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#define MOV17 0x9c806000 /* or %g1, 0, %o7 */
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#define CALL 0x40000000 /* call 0 */
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#define SLLX 0x8b407000 /* sllx %g1, 0, %g1 */
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#define SETHIG5 0x0b000000 /* sethi %hi(0), %g5 */
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#define ORG5 0x82804005 /* or %g1, %g5, %g1 */
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/* %hi(v)/%lo(v) with variable shift */
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#define HIVAL(v, s) (((v) >> (s)) & 0x003fffff)
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#define LOVAL(v, s) (((v) >> (s)) & 0x000003ff)
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void _rtld_bind_start_0(long, long);
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void _rtld_bind_start_1(long, long);
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void _rtld_relocate_nonplt_self(Elf_Dyn *, Elf_Addr);
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caddr_t _rtld_bind(const Obj_Entry *, Elf_Word);
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/*
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* Install rtld function call into this PLT slot.
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*/
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#define SAVE 0x9de3bf50 /* i.e. `save %sp,-176,%sp' */
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#define SETHI_l0 0x21000000
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#define SETHI_l1 0x23000000
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#define OR_l0_l0 0xa0142000
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#define SLLX_l0_32_l0 0xa12c3020
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#define OR_l0_l1_l0 0xa0140011
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#define JMPL_l0_o0 0x91c42000
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#define MOV_g1_o1 0x92100001
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void _rtld_install_plt(Elf_Word *, Elf_Addr);
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static inline int _rtld_relocate_plt_object(const Obj_Entry *,
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const Elf_Rela *, Elf_Addr *);
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void
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_rtld_install_plt(Elf_Word *pltgot, Elf_Addr proc)
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{
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pltgot[0] = SAVE;
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pltgot[1] = SETHI_l0 | HIVAL(proc, 42);
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pltgot[2] = SETHI_l1 | HIVAL(proc, 10);
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pltgot[3] = OR_l0_l0 | LOVAL(proc, 32);
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pltgot[4] = SLLX_l0_32_l0;
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pltgot[5] = OR_l0_l1_l0;
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pltgot[6] = JMPL_l0_o0 | LOVAL(proc, 0);
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pltgot[7] = MOV_g1_o1;
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}
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void
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_rtld_setup_pltgot(const Obj_Entry *obj)
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{
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/*
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* On sparc64 we got troubles.
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*
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* Instructions are 4 bytes long.
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* Elf[64]_Addr is 8 bytes long, so are our pltglot[]
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* array entries.
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* Each PLT entry jumps to PLT0 to enter the dynamic
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* linker.
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* Loading an arbitrary 64-bit pointer takes 6
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* instructions and 2 registers.
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*
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* Somehow we need to issue a save to get a new stack
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* frame, load the address of the dynamic linker, and
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* jump there, in 8 instructions or less.
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*
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* Oh, we need to fill out both PLT0 and PLT1.
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*/
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{
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Elf_Word *entry = (Elf_Word *)obj->pltgot;
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/* Install in entries 0 and 1 */
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_rtld_install_plt(&entry[0], (Elf_Addr) &_rtld_bind_start_0);
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_rtld_install_plt(&entry[8], (Elf_Addr) &_rtld_bind_start_1);
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/*
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* Install the object reference in first slot
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* of entry 2.
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*/
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obj->pltgot[8] = (Elf_Addr) obj;
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}
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}
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void
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_rtld_relocate_nonplt_self(Elf_Dyn *dynp, Elf_Addr relocbase)
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{
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const Elf_Rela *rela = 0, *relalim;
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Elf_Addr relasz = 0;
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Elf_Addr *where;
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for (; dynp->d_tag != DT_NULL; dynp++) {
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switch (dynp->d_tag) {
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case DT_RELA:
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rela = (const Elf_Rela *)(relocbase + dynp->d_un.d_ptr);
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break;
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case DT_RELASZ:
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relasz = dynp->d_un.d_val;
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break;
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}
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}
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relalim = (const Elf_Rela *)((const uint8_t *)rela + relasz);
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for (; rela < relalim; rela++) {
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where = (Elf_Addr *)(relocbase + rela->r_offset);
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*where = (Elf_Addr)(relocbase + rela->r_addend);
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}
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}
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int
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_rtld_relocate_nonplt_objects(Obj_Entry *obj)
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{
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const Elf_Rela *rela;
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const Elf_Sym *def = NULL;
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const Obj_Entry *defobj = NULL;
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for (rela = obj->rela; rela < obj->relalim; rela++) {
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Elf_Addr *where;
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Elf_Word type;
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Elf_Addr value = 0, mask;
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unsigned long symnum;
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where = (Elf_Addr *) (obj->relocbase + rela->r_offset);
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symnum = ELF_R_SYM(rela->r_info);
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type = ELF_R_TYPE(rela->r_info);
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if (type == R_TYPE(NONE))
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continue;
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/* We do JMP_SLOTs in _rtld_bind() below */
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if (type == R_TYPE(JMP_SLOT))
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continue;
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/* COPY relocs are also handled elsewhere */
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if (type == R_TYPE(COPY))
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continue;
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/*
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* We use the fact that relocation types are an `enum'
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* Note: R_SPARC_UA16 is currently numerically largest.
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*/
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if (type > R_TYPE(UA16))
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return (-1);
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value = rela->r_addend;
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/*
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* Handle relative relocs here, as an optimization.
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*/
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if (type == R_TYPE(RELATIVE)) {
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*where = (Elf_Addr)(obj->relocbase + value);
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rdbg(("RELATIVE in %s --> %p", obj->path,
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(void *)*where));
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continue;
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}
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if (RELOC_RESOLVE_SYMBOL(type)) {
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/* Find the symbol */
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def = _rtld_find_symdef(symnum, obj, &defobj,
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false);
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if (def == NULL)
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return -1;
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/* Add in the symbol's absolute address */
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value += (Elf_Addr)(defobj->relocbase + def->st_value);
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}
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if (RELOC_PC_RELATIVE(type)) {
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value -= (Elf_Addr)where;
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}
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if (RELOC_BASE_RELATIVE(type)) {
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/*
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* Note that even though sparcs use `Elf_rela'
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* exclusively we still need the implicit memory addend
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* in relocations referring to GOT entries.
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* Undoubtedly, someone f*cked this up in the distant
|
|
* past, and now we're stuck with it in the name of
|
|
* compatibility for all eternity..
|
|
*
|
|
* In any case, the implicit and explicit should be
|
|
* mutually exclusive. We provide a check for that
|
|
* here.
|
|
*/
|
|
#ifdef DIAGNOSTIC
|
|
if (value != 0 && *where != 0) {
|
|
xprintf("BASE_REL(%s): where=%p, *where 0x%lx, "
|
|
"addend=0x%lx, base %p\n",
|
|
obj->path, where, *where,
|
|
rela->r_addend, obj->relocbase);
|
|
}
|
|
#endif
|
|
/* XXXX -- apparently we ignore the preexisting value */
|
|
value += (Elf_Addr)(obj->relocbase);
|
|
}
|
|
|
|
mask = RELOC_VALUE_BITMASK(type);
|
|
value >>= RELOC_VALUE_RIGHTSHIFT(type);
|
|
value &= mask;
|
|
|
|
if (RELOC_UNALIGNED(type)) {
|
|
/* Handle unaligned relocations. */
|
|
Elf_Addr tmp = 0;
|
|
char *ptr = (char *)where;
|
|
int i, size = RELOC_TARGET_SIZE(type)/8;
|
|
|
|
/* Read it in one byte at a time. */
|
|
for (i=0; i<size; i++)
|
|
tmp = (tmp << 8) | ptr[i];
|
|
|
|
tmp &= ~mask;
|
|
tmp |= value;
|
|
|
|
/* Write it back out. */
|
|
for (i=0; i<size; i++)
|
|
ptr[i] = ((tmp >> (8*i)) & 0xff);
|
|
#ifdef RTLD_DEBUG_RELOC
|
|
value = (Elf_Addr)tmp;
|
|
#endif
|
|
|
|
} else if (RELOC_TARGET_SIZE(type) > 32) {
|
|
*where &= ~mask;
|
|
*where |= value;
|
|
#ifdef RTLD_DEBUG_RELOC
|
|
value = (Elf_Addr)*where;
|
|
#endif
|
|
} else {
|
|
Elf32_Addr *where32 = (Elf32_Addr *)where;
|
|
|
|
*where32 &= ~mask;
|
|
*where32 |= value;
|
|
#ifdef RTLD_DEBUG_RELOC
|
|
value = (Elf_Addr)*where32;
|
|
#endif
|
|
}
|
|
|
|
#ifdef RTLD_DEBUG_RELOC
|
|
if (RELOC_RESOLVE_SYMBOL(type)) {
|
|
rdbg(("%s %s in %s --> %p in %s", reloc_names[type],
|
|
obj->strtab + obj->symtab[symnum].st_name,
|
|
obj->path, (void *)value, defobj->path));
|
|
} else {
|
|
rdbg(("%s in %s --> %p", reloc_names[type],
|
|
obj->path, (void *)value));
|
|
}
|
|
#endif
|
|
}
|
|
return (0);
|
|
}
|
|
|
|
int
|
|
_rtld_relocate_plt_lazy(const Obj_Entry *obj)
|
|
{
|
|
return (0);
|
|
}
|
|
|
|
caddr_t
|
|
_rtld_bind(const Obj_Entry *obj, Elf_Word reloff)
|
|
{
|
|
const Elf_Rela *rela = obj->pltrela + reloff;
|
|
Elf_Addr result;
|
|
int err;
|
|
|
|
result = 0; /* XXX gcc */
|
|
|
|
if (ELF_R_TYPE(obj->pltrela->r_info) == R_TYPE(JMP_SLOT)) {
|
|
/*
|
|
* XXXX
|
|
*
|
|
* The first four PLT entries are reserved. There is some
|
|
* disagreement whether they should have associated relocation
|
|
* entries. Both the SPARC 32-bit and 64-bit ELF
|
|
* specifications say that they should have relocation entries,
|
|
* but the 32-bit SPARC binutils do not generate them, and now
|
|
* the 64-bit SPARC binutils have stopped generating them too.
|
|
*
|
|
* So, to provide binary compatibility, we will check the first
|
|
* entry, if it is reserved it should not be of the type
|
|
* JMP_SLOT. If it is JMP_SLOT, then the 4 reserved entries
|
|
* were not generated and our index is 4 entries too far.
|
|
*/
|
|
rela -= 4;
|
|
}
|
|
|
|
err = _rtld_relocate_plt_object(obj, rela, &result);
|
|
if (err)
|
|
_rtld_die();
|
|
|
|
return (caddr_t)result;
|
|
}
|
|
|
|
int
|
|
_rtld_relocate_plt_objects(const Obj_Entry *obj)
|
|
{
|
|
const Elf_Rela *rela;
|
|
|
|
rela = obj->pltrela;
|
|
|
|
/*
|
|
* Check for first four reserved entries - and skip them.
|
|
* See above for details.
|
|
*/
|
|
if (ELF_R_TYPE(obj->pltrela->r_info) != R_TYPE(JMP_SLOT))
|
|
rela += 4;
|
|
|
|
for (; rela < obj->pltrelalim; rela++)
|
|
if (_rtld_relocate_plt_object(obj, rela, NULL) < 0)
|
|
return -1;
|
|
|
|
return 0;
|
|
}
|
|
|
|
/*
|
|
* New inline function that is called by _rtld_relocate_plt_object and
|
|
* _rtld_bind
|
|
*/
|
|
static inline int
|
|
_rtld_relocate_plt_object(const Obj_Entry *obj, const Elf_Rela *rela,
|
|
Elf_Addr *tp)
|
|
{
|
|
Elf_Word *where = (Elf_Word *)(obj->relocbase + rela->r_offset);
|
|
const Elf_Sym *def;
|
|
const Obj_Entry *defobj;
|
|
Elf_Addr value, offset;
|
|
unsigned long info = rela->r_info;
|
|
|
|
assert(ELF_R_TYPE(info) == R_TYPE(JMP_SLOT));
|
|
|
|
def = _rtld_find_plt_symdef(ELF_R_SYM(info), obj, &defobj, tp != NULL);
|
|
if (__predict_false(def == NULL))
|
|
return -1;
|
|
if (__predict_false(def == &_rtld_sym_zero))
|
|
return 0;
|
|
|
|
value = (Elf_Addr)(defobj->relocbase + def->st_value);
|
|
rdbg(("bind now/fixup in %s --> new=%p",
|
|
defobj->strtab + def->st_name, (void *)value));
|
|
|
|
/*
|
|
* At the PLT entry pointed at by `where', we now construct a direct
|
|
* transfer to the now fully resolved function address.
|
|
*
|
|
* A PLT entry is supposed to start by looking like this:
|
|
*
|
|
* sethi %hi(. - .PLT0), %g1
|
|
* ba,a %xcc, .PLT1
|
|
* nop
|
|
* nop
|
|
* nop
|
|
* nop
|
|
* nop
|
|
* nop
|
|
*
|
|
* When we replace these entries we start from the last instruction
|
|
* and do it in reverse order so the last thing we do is replace the
|
|
* branch. That allows us to change this atomically.
|
|
*
|
|
* We now need to find out how far we need to jump. We have a choice
|
|
* of several different relocation techniques which are increasingly
|
|
* expensive.
|
|
*/
|
|
|
|
offset = ((Elf_Addr)where) - value;
|
|
if (rela->r_addend) {
|
|
Elf_Addr *ptr = (Elf_Addr *)where;
|
|
/*
|
|
* This entry is >= 32768. The relocations points to a
|
|
* PC-relative pointer to the bind_0 stub at the top of the
|
|
* PLT section. Update it to point to the target function.
|
|
*/
|
|
ptr[0] += value - (Elf_Addr)obj->pltgot;
|
|
|
|
} else if (offset <= (1L<<20) && (Elf_SOff)offset >= -(1L<<20)) {
|
|
/*
|
|
* We're within 1MB -- we can use a direct branch insn.
|
|
*
|
|
* We can generate this pattern:
|
|
*
|
|
* sethi %hi(. - .PLT0), %g1
|
|
* ba,a %xcc, addr
|
|
* nop
|
|
* nop
|
|
* nop
|
|
* nop
|
|
* nop
|
|
* nop
|
|
*
|
|
*/
|
|
where[1] = BAA | ((offset >> 2) & 0x3fffff);
|
|
__asm volatile("iflush %0+4" : : "r" (where));
|
|
} else if (value < (1L<<32)) {
|
|
/*
|
|
* We're within 32-bits of address zero.
|
|
*
|
|
* The resulting code in the jump slot is:
|
|
*
|
|
* sethi %hi(. - .PLT0), %g1
|
|
* sethi %hi(addr), %g1
|
|
* jmp %g1+%lo(addr)
|
|
* nop
|
|
* nop
|
|
* nop
|
|
* nop
|
|
* nop
|
|
*
|
|
*/
|
|
where[2] = JMP | LOVAL(value, 0);
|
|
where[1] = SETHI | HIVAL(value, 10);
|
|
__asm volatile("iflush %0+8" : : "r" (where));
|
|
__asm volatile("iflush %0+4" : : "r" (where));
|
|
|
|
} else if ((Elf_SOff)value <= 0 && (Elf_SOff)value > -(1L<<32)) {
|
|
/*
|
|
* We're within 32-bits of address -1.
|
|
*
|
|
* The resulting code in the jump slot is:
|
|
*
|
|
* sethi %hi(. - .PLT0), %g1
|
|
* sethi %hix(addr), %g1
|
|
* xor %g1, %lox(addr), %g1
|
|
* jmp %g1
|
|
* nop
|
|
* nop
|
|
* nop
|
|
* nop
|
|
*
|
|
*/
|
|
where[3] = JMP;
|
|
where[2] = XOR | ((~value) & 0x00001fff);
|
|
where[1] = SETHI | HIVAL(~value, 10);
|
|
__asm volatile("iflush %0+12" : : "r" (where));
|
|
__asm volatile("iflush %0+8" : : "r" (where));
|
|
__asm volatile("iflush %0+4" : : "r" (where));
|
|
|
|
} else if (offset <= (1L<<32) && (Elf_SOff)offset >= -((1L<<32) - 4)) {
|
|
/*
|
|
* We're within 32-bits -- we can use a direct call insn
|
|
*
|
|
* The resulting code in the jump slot is:
|
|
*
|
|
* sethi %hi(. - .PLT0), %g1
|
|
* mov %o7, %g1
|
|
* call (.+offset)
|
|
* mov %g1, %o7
|
|
* nop
|
|
* nop
|
|
* nop
|
|
* nop
|
|
*
|
|
*/
|
|
where[3] = MOV17;
|
|
where[2] = CALL | ((offset >> 4) & 0x3fffffff);
|
|
where[1] = MOV71;
|
|
__asm volatile("iflush %0+12" : : "r" (where));
|
|
__asm volatile("iflush %0+8" : : "r" (where));
|
|
__asm volatile("iflush %0+4" : : "r" (where));
|
|
|
|
} else if (offset < (1L<<44)) {
|
|
/*
|
|
* We're within 44 bits. We can generate this pattern:
|
|
*
|
|
* The resulting code in the jump slot is:
|
|
*
|
|
* sethi %hi(. - .PLT0), %g1
|
|
* sethi %h44(addr), %g1
|
|
* or %g1, %m44(addr), %g1
|
|
* sllx %g1, 12, %g1
|
|
* jmp %g1+%l44(addr)
|
|
* nop
|
|
* nop
|
|
* nop
|
|
*
|
|
*/
|
|
where[4] = JMP | LOVAL(offset, 0);
|
|
where[3] = SLLX | 12;
|
|
where[2] = OR | (((offset) >> 12) & 0x00001fff);
|
|
where[1] = SETHI | HIVAL(offset, 22);
|
|
__asm volatile("iflush %0+16" : : "r" (where));
|
|
__asm volatile("iflush %0+12" : : "r" (where));
|
|
__asm volatile("iflush %0+8" : : "r" (where));
|
|
__asm volatile("iflush %0+4" : : "r" (where));
|
|
|
|
} else if ((Elf_SOff)offset < 0 && (Elf_SOff)offset > -(1L<<44)) {
|
|
/*
|
|
* We're within 44 bits. We can generate this pattern:
|
|
*
|
|
* The resulting code in the jump slot is:
|
|
*
|
|
* sethi %hi(. - .PLT0), %g1
|
|
* sethi %h44(-addr), %g1
|
|
* xor %g1, %m44(-addr), %g1
|
|
* sllx %g1, 12, %g1
|
|
* jmp %g1+%l44(addr)
|
|
* nop
|
|
* nop
|
|
* nop
|
|
*
|
|
*/
|
|
where[4] = JMP | LOVAL(offset, 0);
|
|
where[3] = SLLX | 12;
|
|
where[2] = XOR | (((~offset) >> 12) & 0x00001fff);
|
|
where[1] = SETHI | HIVAL(~offset, 22);
|
|
__asm volatile("iflush %0+16" : : "r" (where));
|
|
__asm volatile("iflush %0+12" : : "r" (where));
|
|
__asm volatile("iflush %0+8" : : "r" (where));
|
|
__asm volatile("iflush %0+4" : : "r" (where));
|
|
|
|
} else {
|
|
/*
|
|
* We need to load all 64-bits
|
|
*
|
|
* The resulting code in the jump slot is:
|
|
*
|
|
* sethi %hi(. - .PLT0), %g1
|
|
* sethi %hh(addr), %g1
|
|
* sethi %lm(addr), %g5
|
|
* or %g1, %hm(addr), %g1
|
|
* sllx %g1, 32, %g1
|
|
* or %g1, %g5, %g1
|
|
* jmp %g1+%lo(addr)
|
|
* nop
|
|
*
|
|
*/
|
|
where[6] = JMP | LOVAL(value, 0);
|
|
where[5] = ORG5;
|
|
where[4] = SLLX | 32;
|
|
where[3] = OR | LOVAL(value, 32);
|
|
where[2] = SETHIG5 | HIVAL(value, 10);
|
|
where[1] = SETHI | HIVAL(value, 42);
|
|
__asm volatile("iflush %0+24" : : "r" (where));
|
|
__asm volatile("iflush %0+20" : : "r" (where));
|
|
__asm volatile("iflush %0+16" : : "r" (where));
|
|
__asm volatile("iflush %0+12" : : "r" (where));
|
|
__asm volatile("iflush %0+8" : : "r" (where));
|
|
__asm volatile("iflush %0+4" : : "r" (where));
|
|
|
|
}
|
|
|
|
if (tp)
|
|
*tp = value;
|
|
|
|
return 0;
|
|
}
|